AON6504
30V N-Channel AlphaMOS
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 85A
R
DS(ON)
(at V
GS
=10V) < 1.8mΩ
R
DS(ON)
(at V
GS
= 4.5V) < 3.3mΩ
Application
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
V
GS
V
V
±20
Gate-Source Voltage
Parameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
30V
Drain-Source Voltage 30
• Latest Trench Power AlphaMOS (αMOS LV) technology
• Very Low RDS(on) at 4.5V
GS
• Low Gate Charge
• High Current Capability
• RoHS and Halogen-Free Compliant
• DC/DC Converters in Computing, Servers, and POL
• Isolated DC/DC Converters in Telecom and Industrial
Maximum Units
G
D
S
Top View
1
2
3
4
8
7
6
5
PIN1
DFN5X6
Top View Bottom View
V
GS
I
DM
I
AS
E
AS
V
DS
Spike V
SPIKE
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJC
mJ
100ns
A
I
D
85
66
T
C
=25°C
T
C
=100°C
41
Junction and Storage Temperature Range
A
Continuous Drain
Current
G
V
Maximum Junction-to-Ambient
A
°C/W
R
θJA
14
40 17 Units
V
±20
Gate-Source Voltage
322 A
-55 to 150 °C
Pulsed Drain Current
C
51
Parameter Typ Max
60Avalanche Current
C
7.3
33
Thermal Characteristics
W
T
C
=25°C
T
A
=25°C I
DSM
Continuous Drain
Current
36
Avalanche energy L=0.05mH
C
90
Power Dissipation
B
T
A
=70°C
T
A
=70°C
83
4.7
T
A
=25°C
T
C
=100°C P
D
W
°C/W
°C/W
Maximum Junction-to-Ambient
A D
1.1 55
1.5
Maximum Junction-to-Case
Power Dissipation
A
P
DSM
Rev0: Aug 2011
www.aosmd.com Page 1 of 6
AON6504
Symbol Min Typ Max Units
BV
DSS
30 V
V
DS
=30V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 1.2 1.7 2.2 V
1.4 1.8
T
J
=125°C 2.2 2.8
2.4 3.3 mΩ
g
FS
120 S
V
SD
0.7 1 V
I
S
85 A
C
iss
2719 pF
C
oss
1204 pF
C
rss
169 pF
R
g
0.9 2.0 3 Ω
Q
g
(10V) 44 60 nC
Q
g
(4.5V) 21 28 nC
Q
gs
9 nC
Q
gd
7 nC
t
D(on)
9.7 ns
t
r
5.2 ns
t
32.5
ns
Output Capacitance
Turn-Off DelayTime
R
DS(ON)
Static Drain-Source On-Resistance
Gate resistance
Forward Transconductance
SWITCHING PARAMETERS
Turn-On DelayTime
V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
Gate Drain Charge
Total Gate Charge
V
GS
=10V, V
DS
=15V, R
L
=0.75Ω,
R
=3
Ω
Gate Source Charge V
GS
=10V, V
DS
=15V, I
D
=20A
Turn-On Rise Time
µA
Zero Gate Voltage Drain Current
mΩ
Reverse Transfer Capacitance V
GS
=0V, V
DS
=15V, f=1MHz
V
DS
=V
GS,
I
D
=250µA
V
DS
=5V, I
D
=20A
Input Capacitance
Drain-Source Breakdown Voltage
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
I
D
=250µA, V
GS
=0V
I
DSS
Diode Forward Voltage
DYNAMIC PARAMETERS
V
GS
=4.5V, I
D
=20A
V
GS
=10V, I
D
=20A
Gate-Body leakage current V
DS
=0V, V
GS
= ±20V
I
S
=1A,V
GS
=0V
Maximum Body-Diode Continuous Current
G
t
D(off)
32.5
ns
t
f
10.3 ns
t
rr
19.6 ns
Q
rr
42.7 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Turn-Off DelayTime
Body Diode Reverse Recovery Charge
Body Diode Reverse Recovery Time I
F
=20A, dI/dt=500A/µs
I
F
=20A, dI/dt=500A/µs
R
GEN
=3
Ω
Turn-Off Fall Time
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev0: Aug 2011 www.aosmd.com Page 2 of 6
AON6504
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
20
40
60
80
100
0123456
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
0
1
2
3
4
0 5 10 15 20 25 30
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=20A
VGS=10V
ID=20A
25°C
125°C
V
DS
=5V
VGS=4.5V
VGS=10V
0
20
40
60
80
100
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=3V
3.5V
4.5V
10V
7.3
4.7
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
0
1
2
3
4
5
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=20A
25°C
125°C
Rev 0: Aug 2011 www.aosmd.com Page 3 of 6
AON6504
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0 10 20 30 40 50
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
500
1000
1500
2000
2500
3000
3500
4000
0 5 10 15 20 25 30
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
0
100
200
300
400
500
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-Case
Coss
C
rss
VDS=15V
ID=20A
TJ(Max)=150°C
TC=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased
10
µ
s
1ms
DC
RDS(ON)
TJ(Max)=150°C
T
C
=25°C
100
µ
s
40
7.3
4.7
(Note F)
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100
Zθ
θ
θ
θJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Safe Operating Area (Note F)
RθJC=1.5°C/W
Rev 0: Aug 2011 www.aosmd.com Page 4 of 6
AON6504
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Power Dissipation (W)
TCASE (°
°°
°C)
Figure 12: Power De-rating (Note F)
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Current rating ID(A)
TCASE (°
°°
°C)
Figure 13: Current De-rating (Note F)
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 14: Single Pulse Power Rating Junction-to-
Ambient (Note H)
TA=25°C
40
7.3
4.7
0.001
0.01
0.1
1
10
0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Ambient (Note H)
RθJA=55°C/W
Rev 0: Aug 2011 www.aosmd.com Page 5 of 6
AON6504
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev 0: Aug 2011 www.aosmd.com Page 6 of 6
