SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PERIPHERAL DRIVERS FOR
HIGH-VOLTAGE, HIGH-CURRENT DRIVER
APPLICATIONS
•Characterized for Use to 300 mA
•High-Voltage Outputs
•No Output Latch-Up at 30 V (After
Conducting 300 mA)
•Medium-Speed Switching
•Circuit Flexibility for Varied Applications
and Choice of Logic Function
•TTL-Compatible Diode-Clamped Inputs
•Standard Supply Voltages
•Plastic DIP (P) With Copper Lead Frame for
Cooler Operation and Improved Reliability
•Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
SUMMAR Y OF SERIES 55461/75461
DEVICE LOGIC PACKAGES
SN55461 AND FK, JG
SN55462 NAND FK, JG
SN55463 OR FK, JG
SN75461 AND D, P
SN75462 NAND D, P
SN75463 OR D, P
description
These dual peripheral drivers are functionally interchangeable with SN55451B through SN55453B and
SN75451B through SN75453B peripheral drivers, but are designed for use in systems that require higher
breakdown voltages than those devices can provide at the expense of slightly slower switching speeds. T ypical
applications include logic buffers, power drivers, relay drivers, lamp drivers, MOS drivers, line drivers, and
memory drivers.
The SN55461/SN75461, SN55462/SN75462, and SN55463/SN75463 are dual peripheral AND, NAND, and
OR drivers respectively (assuming positive logic), with the output of the gates internally connected to the bases
of the npn output transistors.
Series SN55461 drivers are characterized for operation over the full military temperature range of – 55°C
to 125°C. Series SN75461 drivers are characterized for operation from 0°C to 70°C.
1
2
3
4
8
7
6
5
1A
1B
1Y
GND
VCC
2B
2A
2Y
SN55461, SN55462, SN55463 . . . JG PACKAGE
SN75461, SN75462, SN75463 ...D OR P PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2B
NC
2A
NC
NC
1B
NC
1Y
NC
SN55461, SN55462, SN55463 . . . FK PACKAGE
(TOP VIEW)
NC
1A
NC
NC NC
NC
GND
NC
NC – No internal connection
CC
V
2Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
SN55’ SN75’ UNIT
Supply voltage, VCC (see Note 1) 7 7 V
Input voltage, VI5.5 5.5 V
Intermitter voltage (see Note 2) 5.5 5.5 V
Off-state output voltage, VO35 35 V
Continuous collector or output current (see Note 3) 400 400 mA
Peak collector or out
p
ut current (t ≤10 ms duty cycle ≤50% see Note 4)
500
500
mA
Peak
collector
or
o
u
tp
u
t
c
u
rrent
(t
w
≤
10
ms
,
d
u
t
y
c
y
cle
≤
50%
,
see
Note
4)
500
500
mA
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, TA–55 to 125 0 to 70 °C
Storage temperature range, Tstg –65 to 150 –65 to 150 °C
Case temperature for 60 seconds, TCFK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds JG package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D or P package 260 °C
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. Voltage values are with respect to network GND unless otherwise specified.
2. This is the voltage between two emitters A and B.
3. This value applies when the base-emitter resistance (RBE) is equal to or less than 500 Ω.
4. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°CDERATING FACTOR T
A
= 70°C T
A
= 125°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
A
POWER RATING
D725 mW 5.8 mW/°C464 mW –
FK 1375 mW 11.0 mW/°C 880 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 210 mW
P1000 mW 8.0 mW/°C640 mW –
recommended operating conditions
SN55’ SN75’
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
Supply voltage, VCC 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage, VIH 2 2 V
Low-level input voltage, VIL 0.8 0.8 V
Operating free-air temperature, TA–55 125 0 70 °C
VCC
A
GND
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω
schematic (each driver)
Resistor values shown are nominal.
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
2Y
1Y
7
6
2
1
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for D, JG, and P packages. GND
FUNCTION TABLE
(each driver)
ABY
L L L (on state)
LH L (on state)
HL L (on state)
H H H (off state)
positive logic:
Y = AB or A + B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55461 SN75461
UNIT
PARAMETER
TEST
CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA –1.2 –1.5 –1.2 –1.5 V
IOH
High level out
p
ut current
V
= MIN, V
IH
= MIN,
300
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
VOH = 35 V
IH ,
300
100
µ
A
V
CC
= MIN, V
IL
= 0.8 V,
025
05
025
04
VOL
Low level out
p
ut voltage
CC ,IL ,
IOL = 100 mA
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= MIN, V
IL
= 0.8 V,
05
08
05
07
V
CC ,IL ,
IOL = 300 mA
0
.
5
0
.
8
0
.
5
0
.
7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 –1.6 –1 –1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 811 811 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 56 76 56 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 30 55
tPHL Propagation delay time, high-to-low-level output I
O
≈ 200 mA, C
L
= 15 pF, 25 40
ns
tTLH T ransition time, low-to-high-level output
O,
RL = 50 Ω,
L,
See Figure 1 8 20
ns
tTHL T ransition time, high-to-low-level output 10 20
VOH
High level out
p
ut voltage after switching
SN55461 VS = 30 V, IO ≈ 300 mA, VS–10
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75461
S
See Figure 2
O
VS–10
mV
VCC
A
GND
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω
schematic (each driver)
Resistor values shown are nominal.
1 kΩ
1.6 kΩ
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for D, JG, and P packages.
FUNCTION TABLE
(each driver)
ABY
L L H (off state)
LH H (off state)
HL H (of f state)
H H L (on state)
positive logic:
Y = AB or A + B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55462 SN75462
UNIT
PARAMETER
TEST
CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA –1.2 –1.5 –1.2 –1.5 V
IOH
High level out
p
ut current
V
= MIN, V
= 0.8 V,
300
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
VOH = 35 V
300
100
µ
A
V
CC
= MIN, V
IH
= MIN,
025
05
025
04
VOL
Low level out
p
ut voltage
CC ,IH ,
IOL = 100 mA
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= MIN, V
IH
= MIN,
05
08
05
07
V
CC ,IH ,
IOL = 300 mA
0
.
5
0
.
8
0
.
5
0
.
7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1.1 –1.6 –1.1 –1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 0 13 17 13 17 mA
ICCL Supply current, outputs low VCC = MAX, VI = 5 V 61 76 61 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 45 65
tPHL Propagation delay time, high-to-low-level output I
O
≈ 200 mA, C
L
= 15 pF, 30 50
ns
tTLH T ransition time, low-to-high-level output
O,
RL = 50 Ω,
L,
See Figure 1 13 25
ns
tTHL T ransition time, high-to-low-level output 10 20
VOH
High level out
p
ut voltage after switching
SN55462 VS = 30 V, IO ≈ 300 mA, VS–10
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75462
S
See Figure 2
O
VS–10
mV
schematic (each driver)
Resistor values shown are nominal.
VCC
A
GND
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω
4 kΩ
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
≥1
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for D, JG, and P packages.
FUNCTION TABLE
(each driver)
ABY
L L L (on state)
LH H (off state)
HL H (of f state)
H H H (off state)
positive logic:
Y = A + B or A B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55463 SN75463
UNIT
PARAMETER
TEST
CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = –12 mA –1.2 –1.5 –1.2 –1.5 V
IOH
High level out
p
ut current
V
CC
= MIN, V
IH
= MIN,
300
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
CC ,
VOH = 35 V
IH ,
300
100
µ
A
V
CC
= MIN, V
IL
= 0.8 V,
025
05
025
04
VOL
Low level out
p
ut voltage
CC ,IL ,
IOL = 100 mA
0
.
25
0
.
5
0
.
25
0
.
4
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
CC
= MIN, V
IL
= 0.8 V,
05
08
05
07
V
CC ,IL ,
IOL = 300 mA
0
.
5
0
.
8
0
.
5
0
.
7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 –1.6 –1 –1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 811 811 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 58 76 58 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 30 55
tPHL Propagation delay time, high-to-low-level output I
O
≈ 200 mA, C
L
= 15 pF, 25 40
ns
tTLH T ransition time, low-to-high-level output
O,
RL = 50 Ω,
L,
See Figure 1 8 25
ns
tTHL T ransition time, high-to-low-level output 10 25
VOH
High level out
p
ut voltage after switching
SN55463 VS = 30 V, IO ≈ 300 mA, VS–10
mV
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
after
s
w
itching
SN75463
S
See Figure 2
O
VS–10
mV
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Generator
Pulse
GND
(see Note A)
2.4 VInput
SUB
10% 10%
90%90%
1.5 V1.5 V
≤ 5 ns
90% 90%
10%10%
1.5 V1.5 V
0.5 µs
10% 10%
90%90% 50% 50%
tPLH
tTHL
3 V
0 V
3 V
0 V
VOH
VOL
Output
Input
TEST CIRCUIT VOLTAGE WAVEFORMS
’461
’462
’463
0.4 V
CL = 15 pF
(see Note B)
Output
10 V
RL = 50 Ω
≤ 10 ns
≤ 5 ns ≤ 10 ns
tTLH
’461
’463
Input
’462
Circuit
Under
Test
(see Note B) tPHL
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms for Switching Times
Generator
Pulse
GND
(see Note A)
2.4 VInput
SUB
90%90%
1.5 V1.5 V
≤ 5 ns
90% 90%
10%10%
1.5 V1.5 V
40 µs
10% 10%
3 V
0 V
3 V
0 V
VOH
’461
’462
’463
0.4 V
Output
VS = 30 V ≤ 10 ns
≤ 5 ns ≤ 10 ns
65 Ω
2 mH
1N3064
5 V
VOL
Circuit
Under
Test
(see Note B)
TEST CIRCUIT VOLTAGE WAVEFORMS
CL = 15 pF
(see Note B)
Output
Input
’461
’463
Input
’462
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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Copyright 1998, Texas Instruments Incorporated