RT8026
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DS8026-02 March 2011 www.richtek.com
Features
zz
zz
zInput Voltage Range : 2.7V to 5.5V
zz
zz
zAdjustable Output Voltage : 1V to VIN
zz
zz
zOutput Current : 1A
zz
zz
zHigh Efficiency : up to 95%
zz
zz
zNo Schottky Diode Required
zz
zz
z1.5MHz Fixed Frequency PWM Operation
zz
zz
zCurrent Limiting Protection
zz
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zThermal Shutdown Protection
zz
zz
zSmall MSOP-10 Package
zz
zz
zRoHS Compliant and Halogen Free
Applications
zMobile Phones
zPersonal Information Appliances
zWireless and DSL Modems
zMP3 Players
zPortable Instruments
1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC
Converter
General Description
The RT8026 is a high-efficiency Pulse-Width-Modulated
(PWM) step-down DC/DC converter. Capable of delivering
1A output current over a wide input voltage range from
2.7V to 5.5V, the RT8026 is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs and hand-held devices.
Two operating modes are available including : PWM/Low-
Dropout autoswitch and shut-down modes. The Internal
synchronous rectifier with low RDS(ON) dramatically reduces
conduction loss at PWM mode. No external Schottky
diode is required in practical application.
The RT8026 enters Low-Dropout mode when normal PWM
cannot provide regulated output voltage by continuously
turning on the upper P-MOSFET. The RT8026 enter shut-
down mode and consumes less than 0.1μA when the EN
pin is pulled low.
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operating
frequency of 1.5MHz. This along with small MSOP-10
package provides small PCB area application. Other
features include soft start, lower internal reference voltage
with 2% accuracy, over temperature protection, and over
current protection.
Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Pin Configurations
(TOP VIEW)
MSOP-10
PGND
NC
VIN
NC
GND
LX
EN
FB NC
NC
56
7
8
4
3
2
10
9
RT8026
Package Type
F : MSOP-10
Lead Plating System
G : Green (Halogen Free and Pb Free)
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Function Block Diagram
Functional Pin Description
Pin No. Pi n Name Pin Functi on
1 VIN Power Input.
2, 4, 6, 7 NC No Internal Connection.
3 GND Ground Pin.
5 FB Feedback Input Pin. Receives the feedback voltage from a resistive divider
connected across the output.
8 EN Chip Enable (Active High). It is recommended to add a 100kΩ resistor bet ween EN
and GND pin.
9 LX Pin for Switching. Connect this pin to the inductor.
10 PGND Power Ground Pin.
Typical Application Circuit
Figure 1. Typical Application Circuit for RT8026
⎟
⎠
⎞
⎜
⎝
⎛+= R2
R1
1 x VV REFOUT
with R2 = 300kΩ to 60kΩ so the IR2 = 2μA to 10μA,
and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection.
4.7µF
10µF
VIN LX
RT8026
EN FB
2.2µH
2.7V to 5.5V
VIN VOUT
CIN
L
5
9
1
8COUT
R1
R2
C1
IR2
3
GND
PGND
10
COMP
RC
RS1
RS2
EN VIN
LX
FB
UVLO &
Power Good
Detector VREF
Slope
Compensation
Current
Sense
OSC &
Shutdown
Control
Current
Limit
Detector
Driver
Control
Logic
PWM
Comparator
Error
Amplifier
GND
Current
Detector
PGND
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Absolute Maximum Ratings (Note 1)
zSupply Input Voltage ------------------------------------------------------------------------------------------------------ 6.5V
zEN, FB Pin Voltage ------------------------------------------------------------------------------------------------------- −0.3V to VIN
zPower Dissipation, PD @ TA = 25°C
MSOP-10 -------------------------------------------------------------------------------------------------------------------- 833mW
zPackage Thermal Resistance (Note 2)
MSOP-10, θJA -------------------------------------------------------------------------------------------------------------- 120°C/W
zLead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
zStorage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
zJunction Temperature ----------------------------------------------------------------------------------------------------- 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Electrical Characteristics
(VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, C OUT = 10μF, T A = 25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Quiescent Current IQ I
OUT = 0mA, VFB = VREF + 5% -- 50 70 μA
Shutdown Current ISH DN EN = GND -- 0.1 1 μA
R eferenc e V ol tage VREF For Adjustable Output Voltage 0.588 0.6 0.612 V
Adjustable Output Range VOUT (Note 6) 1 -- VIN − 0.2V V
Output Voltage Accuracy ΔVOUT VIN = VOUT + ΔV to 5.5V
0A < IOUT < 1A (Note 5) −3 -- +3 %
FB Input Current IFB V
FB = VIN −50 -- 50 nA
PMOSFET RON R
DS(ON)_P IOUT = 200mA, VIN = 3.6V -- 0.28 -- Ω
NMOSFET RON R
DS(ON)_N IOUT = 200mA, VIN = 3.6V -- 0.25 -- Ω
P-Channel Current Limit ILIM_P VIN = 2.7V to 5.5 V 1.2 1.5 -- A
EN High-Level Input Voltage VEN_H V
IN = 2.7V to 5.5V 1.5 -- -- V
EN Low-Level Input Voltage VEN_L V
IN = 2.7V to 5.5V -- -- 0.4 V
Under Voltage Lock Out threshold UVLO -- 1.8 -- V
UVLO Hysteresis -- 0.1 -- V
Oscillator Frequency fOSC V
IN = 3.6V, IOUT = 100mA 1.2 1.5 1.8 MHz
Thermal Shutdown Temperature TSD -- 160 -- °C
Max. Duty Cycle 100 -- -- %
Recommended Operating Conditions (Note 4)
zSupply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 2.7V to 5.5V
zJunction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
zAmbient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C
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DS8026-02 March 2011www.richtek.com
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. ΔV = IOUT x PRDS(ON)
Note 6. Guarantee by design.
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Typical Operating Characteristics
Output Voltage vs. Temperature
3.40
3.43
3.45
3.48
3.50
3.53
3.55
3.58
3.60
-50 -25 0 25 50 75 100 125
Temperature (°C)
Output Voltage (V)
VIN = 5V, IOUT = 0mA
Frequency vs. Input Voltage
1.30
1.33
1.35
1.38
1.40
1.43
1.45
1.48
1.50
4 4.25 4.5 4.75 5 5.25 5.5
Input Voltage (V)
Frequency (MHz
)
VOUT = 3.5V, IOUT = 300mA
Frequency vs . Temperature
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.60
-50-250 255075100125
Temperature (°C)
Frequency (MHz
)
VIN = 5V, VOUT = 3.5V, IOUT = 300mA
Current Limit vs. Input Voltage
1.40
1.45
1.50
1.55
1.60
1.65
1.70
4 4.25 4.5 4.75 5 5.25 5.5
Input Voltage (V)
Current Limit (A)
VOUT = 3.5V
Current Lim it vs . Te m pe rature
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
-50-250 255075100125
Temperature (°C)
Current Limit (A)
VIN = 5V, VOUT = 3.5V
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1
Output Current (A)
Efficiency (%)
VOUT = 3.5V
VIN = 5.5V
VIN = 5V
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EN Threshold vs . Temperature
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
-50 -25 0 25 50 75 100 125
Temperature (°C)
EN Voltage (V)
Rising
Falling
VOUT = 3.5V
EN Threshold vs. Input Voltage
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
EN Voltage (V)
VOUT = 3.5V
Rising
Falling
Output Voltage vs. Output Current
3.535
3.540
3.545
3.550
3.555
3.560
0 0.2 0.4 0.6 0.8 1
Output Current (A)
Ouptut Voltage (V)
VIN = 5.5V
VIN = 5V
Power On from EN
Time (100μs/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
IIN
(1A/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 10mA
UVLO Threshold vs. Te m pe rature
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Input Voltage (V)
VOUT = 3.5V
Rising
Falling
Output Ripple
Time (500ns/Div)
VOUT
(10mV/Div)
VLX
(5V/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 500mA
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Load Transient Response
Time (50μs/Div)
IOUT
(500mA/Div)
VOUT
(50mV/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 50mA to 500mA
Load Transient Response
Time (50μs/Div)
IOUT
(500mA/Div)
VOUT
(50mV/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 50mA to 1A
Power Off from EN
Time (100μs/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
IIN
(1A/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 1A
Power On from EN
Time (100μs/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
IIN
(1A/Div)
VIN = 5V, VOUT = 3.5V, IOUT = 1A
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⎥
⎦
⎤
⎢
⎣
⎡+≤
OUT
LOUT 8fC
1
ESR ΔIΔV
Applications Information
The basic RT8026 application circuit is shown in the Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
⎥
⎦
⎤
⎢
⎣
⎡−
⎥
⎦
⎤
⎢
⎣
⎡
×
=
IN
OUTOUT
LV
V
1
Lf
V
ΔI
⎥
⎥
⎦
⎤
⎢
⎢
⎣
⎡−
⎥
⎦
⎤
⎢
⎣
⎡
Δ×
=
IN(MAX)
OUT
L(MAX)
OUT
V
V
1
If
V
L
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy materials
are small and don’t radiate energy but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs. size requirements and
any radiated field/EMI requirements.
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
1
V
V
V
V
II
OUT
IN
IN
OUT
OUT(MAX)RMS −=
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
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Output Voltage Programming
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 2.
)
R2
R1
(1VV REF
OUT +=
where VREF is the feedback reference voltage (0.6V typ.).
For adjustable output voltage mode, the output voltage is
set by an external resistive divider according to the following
equation :
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Ca pacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Figure 2. Setting the Output Voltage
RT8026
GND
FB
R1
R2
VOUT
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VIN quiescent current is due to two components :
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge ΔQ moves
from VIN to ground.
The resulting ΔQ/Δt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
IGATECHG = f(QT+QB)
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
Checking Tran sient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
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losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (DC) as follows :
RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Layout Considerations
For the best performance of the RT8026, the following
guidelines must be strictly followed.
` The input capacitor should be placed as close as possible
to the device pins (VIN and GND).
` The LX node is with high frequency voltage swing. It
should be kept at a small area.
` Place the feedback components as close as possible to
the IC and keep away from the noisy devices.
` The GND and PGND should be connected to a strong
ground plane for heat sinking and noise protection.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJAis the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8026, the maximum junction temperature is 125°C.The
junction to ambient thermal resistance θJA is layout
dependent. For MSOP-10 packages, the thermal
resistance θJA is 120°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for
MSOP-10 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT8026 packages, the Figure 3 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Figure 3. Derating Curves for RT8026 Packages
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0 153045607590105120135
Ambient Temperature (°C)
Maximum Power Dissipation (W
)
Four Layers PCB
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Layout note:
1. The distance that CIN connects to VIN is as close as possible (Under 2mm).
2. COUT should be placed near the RT8026.
L1
CIN
COUT
VIN
R1 CF
CIN must be placed as close
as possible to the IC
LX should be connected to Inductor by
wide and short trace, keep sensitive
compontents away from this trace
Output capacitor must
be placed near the
RT8026
Place the feedback components as close as possible
to the FB pin.
RT8026
FB
NC
NC
LX
EN
NC
GND
PGND
VIN
NC
10
2
3
9
8
7
5
4
6
R2
C om ponent Suppl ier L1 ( μH) COUT (μF) R1 (kΩ) R2 (kΩ) VOUT (V)
TAI YO Y UDEN 10 10 300 62 3.5
TAI YO Y UDEN 10 10 120 27 3.3
GOTREND 2.2 10 200 62 2.5
GOTREND 2.2 10 150 75 1.8
GOTREND 2.2 10 100 100 1.2
Table 1. Recommended Components for Different Output Voltage Application
Figure 4. Layout Guide
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Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Outline Dimension
L
A2
A
b
A1
D
E1
E
e
Dimensions In Millimeters Dimensions In Inches
Symbol Min Max Min Max
A 0.810 1.100 0.032 0.043
A1 0.000 0.150 0.000 0.006
A2 0.750 0.950 0.030 0.037
b 0.170 0.270 0.007 0.011
D 2.900 3.100 0.114 0.122
e 0.500 0.020
E 4.800 5.000 0.189 0.197
E1 2.900 3.100 0.114 0.122
L 0.400 0.800
0.016 0.031
10-Lead MSOP Plastic Package
