7-142
ICL7663S
Detailed Description
The ICL7663S is a CMOS integrated circuit incorporating all
the functions of a voltage regulator plus protection circuitry
on a single monolithic chip. Referring to the Functional Dia-
gram, the main blocks are a bandgap-type voltage reference,
an error amplifier, and an output driver with both PMOS and
NPN pass transistors.
The bandgap output voltage, trimmed to 1.29V ± 15mV for
the ICL7663SA, and the input voltage at the VSET terminal
are compared in amplifier A. Error amplifier A drives a
P-channel pass transistor which is sufficient for low (under
about 5mA) currents. The high current output is passed by
an NPN bipolar transistor connected as a follower. This
configuration gives more gain and lower output impedance.
Logic-controlled shutdown is implemented via a N-channel
MOS transistor. Current-sensing is achieved with
comparator C, which functions with the VOUT2 terminal. The
ICL7663S has an output (VTC) from a buffer amplifier (B),
which can be used in combination with amplifier A to
generate programmable-temperature-coefficient output
voltages.
The amplifier, reference and comparator circuitry all operate
at bias levels well below 1µA to achieve extremely low
quiescent current. This does limit the dynamic response of
the circuits, however, and transients are best dealt with
outside the regulator loop.
Basic Operation
The ICL7663S is designed to regulate battery voltages in the
5V to 15V region at maximum load currents of about 5mA to
30mA. Although intended as low power devices, power dissi-
pation limits must be observed. For example, the power dis-
sipation in the case of a 10V supply regulated down to 2V
with a load current of 30mA clearly exceeds the power dissi-
pation rating of the Mini-DIP:
(10 - 2) (30) (10-3) = 240mW
The circuit of Figure 8 illustrates proper use of the device.
CMOS devices generally require two precautions: every
input pin must go somewhere, and maximum values of
applied voltages and current limits must be rigorously
observed. Neglecting these precautions may lead to, at the
least, incorrect or nonoperation, and at worst, destructive
device failure. To avoid the problem of latchup, do not apply
inputs to any pins before supply voltage is applied.
Input Voltages - The ICL7663S accepts working inputs of
1.5V to 16V. When power is applied, the rate-of-rise of the
input may be hundreds of volts per microsecond. This is
potentially harmful to the regulators, where internal operat-
ing currents are in the nanoampere range. The 0.047µF
capacitor on the device side of the switch will limit inputs to a
safe level around 2V/µs. Use of this capacitor is suggested in
all applications. In severe rate-of-rise cases, it may be advis-
able to use an RC network on the SHutDowN pin to delay
output turn-on. Battery charging surges, transients, and
assorted noise signals should be kept from the regulators by
RC filtering, zener protection, or even fusing.
NOTES:
FIGURE 7. ICL7663S TEST CIRCUIT
Output Voltages - The resistor divider R2/R1 is used to
scale the reference voltage, VSET, to the desired output using
the formula VOUT = (1 + R2/R1) VSET. Suitable arrangements
of these resistors, using a potentiometer, enables exact
values for VOUT to be obtained. In most applications the
potentiometer may be eliminated by using the ICL7663SA.
The ICL7663SA has VSET voltage guaranteed to be 1.29V
±15mV and when used with ±1% tolerance resistors for R1
and R2 the initial output voltage will be within ±2.7% of ideal.
The low leakage current of the VSET terminal allows R1 and
R2 to be tens of megohms for minimum additional quiescent
drain current. However, some load current is required for
proper operation, so for extremely low-drain applications it is
necessary to draw at least 1µA. This can include the current
for R2 and R1.
Output voltages up to nearly the VIN supply may be obtained
at low load currents, while the low limit is the reference
voltage. The minimum input-output differential in each
regulator is obtained using the VOUT1, terminal. The input-
output differential increases to 1.5V when using VOUT2.
Output Currents - Low output currents of less than 5mA are
obtained with the least input-output differential from the
VOUT1 terminal (connect VOUT2 to VOUT1). Where higher cur-
rents are needed, use VOUT2 (VOUT1, should be left open in
this case).
High output currents can be obtained only as far as package
dissipation allows. It is strongly recommended that output
current-limit sensing be used in such cases.
Current-Limit Sensing - The on-chip comparator (C in the
Functional Diagram) permits shutdown of the regulator
1. S1 when closed disables output current limiting.
2. Close S2 for VOUT1, open S2 for VOUT2.
3. VOUT = R2 + R1
R1VSET.
4. IQ quiescent currents measured at GND pin by meter M.
5. S3 when ON, permits normal operation, when OFF, shuts
down both VOUT1 and VOUT2.
SHDN
VOUT2
VOUT1
VTC
VSET
SENSE
GND
1µA MIN
+
-
IQ
S2S1
RCL
R2
RLCL
R1
(7663 ONLY)
VOUT
ON
OFF
S3
1MΩ1.4V < VSHDN < V+IN
0.047µF
+
-M