© Semiconductor Components Industries, LLC, 2009
October, 2009 − Rev. 17
1Publication Order Number:
CS8361/D
CS8361
5.0 V Dual Micropower
Low Dropout Regulator
with ENABLE and RESET
The CS8361 is a precision Micropower dual voltage regulator with
ENABLE and RESET.
The 5.0 V standby output is accurate within ±2% while supplying
loads of 100 mA and has a typical dropout voltage of 400 mV.
Quiescent current is low, typically 140 mA with a 300 mA load. The
active RESET output monitors the 5.0 V standby output and is low
during power−up and regulator dropout conditions. The RESET
circuit includes hysteresis and is guaranteed to operate correctly with
1.0 V on the standby output.
The second output tracks the 5.0 V standby output through an
external adjust lead, and can supply loads of 250 mA with a typical
dropout voltage of 400 mV. The logic level ENABLE lead is used to
control this tracking regulator output.
Both outputs are protected against overvoltage, short circuit, reverse
battery and overtemperature conditions. The robustness and low
quiescent current of the CS8361 makes it not only well suited for
automotive microprocessor applications, but for any battery powered
microprocessor applications.
Features
•2 Regulated Outputs
−Standby Output 5.0 V ± 2%; 100 mA
−Tracking Output 5.0 V; 250 mA
•Low Dropout Voltage (0.4 V at Rated Current)
•RESET Option
•ENABLE Option
•Low Quiescent Current
•Protection Features
−Independent Thermal Shutdown
−Short Circuit
−60 V Load Dump
−Reverse Battery
•Internally Fused Leads in SO−16L Package
•These are Pb−Free Devices
CS8361 = Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
SO−16L
DW SUFFIX
CASE 751G
RESETENABLE
116
NCNC
NCAdj
GNDGND
GNDGND
NCVTRK
NCNC
VSTBY
VIN
D2PAK−7
DPS SUFFIX
CASE 936AB
PIN CONNECTIONS AND
MARKING DIAGRAM
SO−16L
Pin 1. VSTBY
2. VIN
3. VTRK
4. GND
5. Adj
6. ENABLE
7. RESET
D2PAK−7
CS8361
AWLYYWWG
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CS
8361
AWLYWWG
1
1
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
CS8361
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2
Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option
+
−
VIN
Overvoltage
Shutdown
Current
Limit Bandgap
Current
Limit
Thermal
Shutdown −
+
RESET
+
−
GND
−
+
OVSD
TSD OVSD
BG BG
RESET
VSTBY
5.0 V, 100 mA, 2.0%
VTRK
250 mA
VIN
Adj
TSD
TSD OVSD
VSTBY
ENABLE
BG
RESET
MAXIMUM RATINGS*
Rating Value Unit
Supply Voltage, VIN −16 to 26 V
Positive Transient Input Voltage, tr > 1.0 ms 60 V
Negative Transient Input Voltage, T < 100 ms, 1.0 % Duty Cycle −50 V
Input Voltage Range (ENABLE, RESET)−0.3 to 10 V
Tracking Regulator (VTRK, Adj) 20 V
Standby Regulator (VSTBY) 10 V
Junction Temperature −40 to +150 °C
Storage Temperature Range −55 to +150 °C
ESD Susceptibility (Human Body Model) 2.0 kV
Lead Temperature Soldering Wave Solder (through hole styles only) Note 1
Reflow (SMD styles only) Note 2
260 peak
230 peak
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 10 seconds max.
2. 60 seconds max above 183°C
*The maximum package power dissipation must be observed.
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ELECTRICAL CHARACTERISTICS (6.0 V ≤ VIN ≤ 26 V, IOUT1 = IOUT2 = 100 mA, −40°C ≤ TA ≤ +125°C,
−40°C ≤ TJ ≤ +150°C; unless otherwise stated.)
Characteristic Test Conditions Min Typ Max Unit
Tracking Output (VTRK)
VTRK Tracking Error (VSTBY − VTRK) 6.0 V ≤ VIN ≤ 26 V, 100 mA ≤ ITRK ≤ 250 mA.
Note 3
−25 −+25 mV
Adjust Pin Current, IAdj Loop in Regulation −1.5 5.0 mA
Line Regulation 6.0 V ≤ VIN ≤ 26 V. Note 3 −5.0 50 mV
Load Regulation 100 mA ≤ ITRK ≤ 250 mA. Note 3 −5.0 50 mV
Dropout Voltage (VIN − VTRK)ITRK = 100 mA.
ITRK = 250 mA
−
−
100
400
150
700
mV
mV
Current Limit VIN = 12 V, VTRK = 4.5 V 275 500 −mA
Quiescent Current VIN = 12 V, ITRK = 250 mA, No Load on VSTBY −25 50 mA
Reverse Current VTRK = 5.0 V, VIN = 0 V −200 1500 mA
Ripple Rejection f = 120 Hz, ITRK = 250 mA, 7.0 V ≤ VIN ≤ 17 V 60 70 −dB
Standby Output (VSTBY)
Output Voltage, VSTBY 6.0 V ≤ VIN ≤ 26 V, 100 mA ≤ ISTBY ≤ 100 mA. 4.9 5.0 5.1 V
Line Regulation 6.0 V ≤ VIN ≤ 26 V. −5.0 50 mV
Load Regulation 100 mA ≤ ISTBY ≤ 100 mA. −5.0 50 mV
Dropout Voltage (VIN − VSTBY)ISTBY = 100 mA.
ISTBY = 100 mA
−
−
100
400
150
600
mV
mV
Current Limit VIN = 12 V, VSTBY = 4.5 V 125 200 −mA
Short Circuit Current VIN = 12 V, VSTBY = 0 V 10 100 −mA
Quiescent Current VIN = 12 V, ISTBY = 100 mA, ITRK = 0 mA
VIN = 12 V, ISTBY = 300 mA, ITRK = 0 mA
−
−
10
140
20
200
mA
mA
Reverse Current VSTBY = 5.0 V, VIN = 0 V −100 200 mA
Ripple Rejection f = 120 Hz, ISTBY = 100 mA, 7.0 V ≤ VIN ≤ 17 V 60 70 −dB
RESET ENABLE Functions
ENABLE Input Threshold −0.8 1.2 2.0 V
ENABLE Input Bias Current VENABLE = 0 V to 10 V −10 0 10 mA
RESET Threshold High (VRH) VSTBY Increasing 4.59 4.87 VSTBY − 0.02 V
RESET Hysteresis −60 120 180 mV
RESET Threshold Low (VRL) VSTBY Decreasing 4.53 4.75 VSTBY − 0.08 V
RESET Leakage − − − 25 mA
Output Voltage, Low (VRLO)1.0 V ≤ VSTBY ≤ VRL, RRST = 10 kW−0.1 0.4 V
Output Voltage, Low (VRPEAK) VSTBY
, Power Up, Power Down −0.6 1.0 V
Protection Circuitry (Both Outputs)
Independent Thermal Shutdown VSTBY
VTRK
150
150
180
165
−
−
°C
°C
Overvoltage Shutdown −30 34 38 V
3. VTRK connected to Adj lead. VTRK can be set to higher values by using an external resistor divider.
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PACKAGE PIN DESCRIPTION
PACKAGE PIN #
D2PAK, 7 Pin SO−16L PIN SYMBOL FUNCTION
1 16 VSTBY Standby output voltage delivering 100 mA.
2 1 VIN Input voltage.
3 3 VTRK Tracking output voltage controlled by ENABLE delivering 250 mA.
44, 5, 12, 13 GND Reference ground connection.
5 6 Adj Resistor divider from VTRK to Adj. Sets the output voltage on
VTRK. If tied to VTRK, VTRK will track VSTBY
.
6 8 ENABLE Provides on/off control of the tracking output, active LOW.
7 9 RESET CMOS compatible output lead that goes low whenever VSTBY falls
out of regulation.
2, 7, 10, 11,
14, 15
NC No connection.
CIRCUIT DESCRIPTION
ENABLE Function
The ENABLE function switches the output transistor for
VTRK on and off. When the ENABLE lead voltage exceeds
1.4 V (Typ), VTRK turns off. This input has several hundred
millivolts of hysteresis to prevent spurious output activity
during power−up or power−down.
RESET Function
The RESET is an open collector NPN transistor,
controlled by a low voltage detection circuit sensing the
VSTBY (5.0 V) output voltage. This circuit guarantees the
RESET output stays below 1.0 V (0.1 V Typ) when VSTBY
is as low as 1.0 V to ensure reliable operation of
microprocessor− based systems.
VTRK Output Voltage
This output uses the same type of output device as VSTBY
,
but is rated for 250 mA. The output is configured as a
tracking regulator of the standby output. By using the
standby output as a voltage reference, giving the user an
external programming lead (Adj lead), output voltages from
5.0 V to 20 V are easily realized. The programming is done
with a simple resistor divider (Figure 2), and following the
formula:
VTRK +VSTBY (1 )R1ńR2) )IAdj R1
If another 5.0 V output is needed, simply connect the Adj
lead to the VTRK output lead.
C1*
0.1 mF
GND
CS8361 MCU
B+ VIN
VTRK
Adj
ENABLE
RESET
VSTBY
R3
VDD
C2**
10 mF
ESR < 8.0 W
5.0 V, 100 mA
RESET
I/O
R2
R1
C3**
10 mF
ESR < 8.0 W
SW 8.0 V,
250 mA GND
VTRK ∼ VSTBY(1 + R1/R2)
For VTRK ∼ 8.0 V, R1/R2 ∼ 0.6
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 2. Test and Application Circuit, 5.0 V, 8.0 V Regulator
CS8361
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C1*
0.1 mF
GND
CS8361 MCU
B+ VIN
VTRK
Adj
ENABLE
RESET
VSTBY
R3
VDD
C2**
10 mF
ESR < 8.0 W
5.0 V, 100 mA
RESET
I/O
C3**
10 mF
ESR < 8.0 W
SW 5.0 V,
250 mA GND
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 3. Test and Application Circuit, Dual 5.0 V Regulator
APPLICATION NOTES
External Capacitors
Output capacitors for the CS8361 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief
conditions of negative input transients that might be
characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. To maintain regulator stability down
to −40°C, capacitors rated at that temperature must be used.
More information on capacitor selection for SMART
REGULATOR®s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through the
Literature Distribution Center or via our website at
http://www.onsemi.com.
Calculating Power Dissipation in a
Dual Output Linear Regulator
The maximum power dissipation for a dual output
regulator (Figure 4) is
PD(max) +NJVIN(max) *VOUT1(min)NjIOUT1(max) )
NJVIN(max) *VOUT2(min)NjIOUT2(max) )VIN(max)IQ (1)
where:
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1,
VOUT2(min) is the minimum output voltage from VOUT2,
IOUT1(max) is the maximum output current, for the
application,
IOUT2(max) is the maximum output current, for the
application, and
IQ is the quiescent current the regulator consumes at both
IOUT1(max) and IOUT2(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
RQJA +150°C*TA
PD(2)
The value of RqJA can be compared with those in the
package section of the data sheet. Those packages with
RqJA
’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 4. Dual Output Regulator With Key
Performance Parameters Labeled.
SMART
REGULATOR
Control
Features
VOUT1
IOUT1
VOUT2
IOUT2
VIN
IIN
IQ
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Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
RQJA +RQJC )RQCS )RQSA (3)
where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heatsink thermal resistance, and
RqSA = the heatsink−to−ambient thermal resistance.
RqJC appears in the package section of the data sheet. Like
RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
ORDERING INFORMATION*
Device Package Shipping†
CS8361YDPS7G D2PAK−7
(Pb−Free)
50 Units/Rail
CS8361YDPSR7G D2PAK−7
(Pb−Free)
750 / Tape & Reel
CS8361YDWF16G SO−16L
(Pb−Free)
46 Units/Rail
CS8361YDWFR16G SO−16L
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-
cifications Brochure, BRD8011/D.
*Contact your local sales representative for other package options including PSOP−20, TO−220−7, DIP−16, and SO−20L.
CS8361
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PACKAGE DIMENSIONS
SO−16L
DWF SUFFIX
CASE 751G−03
ISSUE C
D
14X
B16X
SEATING
PLANE
S
A
M
0.25 B S
T
16 9
81
hX 45_
M
B
M
0.25
H8X
E
B
A
e
T
A1
A
L
C
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INLCUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
B0.35 0.49
C0.23 0.32
D10.15 10.45
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
q0 7
__
PACKAGE THERMAL DATA
Parameter SO−16L D2PAK, 7−Pin Unit
RqJC Typical 18 3.5 °C/W
RqJA Typical 75 10−50* °C/W
*Depending on thermal properties of substrate. RqJA = RqJC + RqCA.
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PACKAGE DIMENSIONS
D
2
PAK−7 (SHORT LEAD)
DPS SUFFIX
CASE 936AB−01
ISSUE B
0.539
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
E0.380 0.420 9.65 10.67
D0.325 0.368 8.25 9.53
A0.170 0.180 4.32 4.57
b0.026 0.036 0.66 0.91
c2 0.045 0.055 1.14 1.40
e0.050 BSC 1.27 BSC
H0.579 13.69 14.71
L1
A1 0.000 0.010 0.00 0.25
c0.017 0.026 0.43 0.66
E
D
L1 c2
c
be
E1
D1
H
−−− 0.066 −−− 1.68
L0.058 0.078 1.47 1.98
M
L3 0.010 BSC 0.25 BSC
0 8 °°0 8 °°
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH AND GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.005 MAXIMUM PER SIDE. THESE DIMENSIONS
TO BE MEASURED AT DATUM H.
4. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS E, L1, D1, AND E1. DIMENSIONS
D1 AND E1 ESTABLISH A MINIMUM MOUNTING
SURFACE FOR THE THERMAL PAD.
D1 0.270 −−− 6.86 −−−
E1 0.245 −−− 6.22 −−−
A
DIMENSIONS: MILLIMETERS
0.424
7X
0.584
0.310
0.136
0.040 0.050
PITCH
SOLDERING FOOTPRINT*
A1
L3
B
H
L
M
DETAIL C
SEATING
PLANE
GAUGE
PLANE
A
7X
M
A
M
0.13 B
E/2
BSEATING
PLANE
A
A
DETAIL C
VIEW A−A
M
A
M
0.10 B
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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CS8361/D
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
PUBLICATION ORDERING INFORMATION
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USA/Canada
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