LTC5540 600MHz to 1.3GHz High Dynamic Range Downconverting Mixer Description Features n n n n n n n n n n n n n n Conversion Gain: 7.9dB at 900MHz IIP3: 25.9dBm at 900MHz Noise Figure: 9.9dB at 900MHz 16.2dB NF Under +5dBm Blocking High Input P1dB 3.3V Supply, 640mW Power Consumption Shutdown Pin 50 Single-Ended RF and LO Inputs LO Inputs 50 Matched when Shutdown High Isolation LO Switch 0dBm LO Drive Level High LO-RF and LO-IF Isolation Small Solution Size 20-Lead (5mm x 5mm) QFN package The LTC(R)5540 is part of a family of high dynamic range, high gain passive downconverting mixers covering the 600MHz to 4GHz frequency range. The LTC5540 is optimized for 0.6GHz to 1.3GHz RF applications. The LO frequency must fall within the 0.7GHz to 1.2GHz range for optimum performance. A typical application is a LTE or GSM receiver with a 700MHz to 915MHz RF input and high-side LO. The LTC5540 is designed for 3.3V operation, however; the IF amplifier can be powered by 5V for the highest P1dB. An integrated SPDT LO switch with fast switching accepts two active LO signals, while providing high isolation. The LTC5540's high conversion gain and high dynamic range enable the use of lossy IF filters in high-selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation. Applications n n n Wireless Infrastructure Receivers (LTE, GSM, W-CDMA) Point-to-Point Microwave links High Dynamic Range Downmixer Applications High Dynamic Range Downconverting Mixer Family L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. PART# RF RANGE LO RANGE LTC5540 600MHz -1.3GHz 700MHz - 1.2GHz LTC5541 1.3GHz - 2.3GHz 1.4GHz - 2.0GHz LTC5542 1.6GHz - 2.7GHz 1.7GHz - 2.5GHz LTC5543 2.3GHz - 4GHz 2.4GHz - 3.6GHz Typical Application Wideband Receiver 190MHz SAW VCCIF 3.3V or 5V 1F 22pF 1.5pF 5.6pF LNA IF+ IF - LTC5540 IF 100pF SYNTH 2 ALTERNATE LO FOR FREQUENCY-HOPPING LO 100pF BIAS SHDN VCC2 VCC 3.3V LO2 RF IMAGE BPF SHDN (0V/3.3V) ADC 1F VCC1 22pF VCC3 LO1 LOSEL LO SELECT (0V/3.3V) 16 28 15 27 14 26 13 12 11 LO 1090MHz 5540 TA01 25 IIP3 24 23 10 22 9 8 SYNTH 1 NF TA = +25C fIF = 190MHz fLO = fRF + fIF 21 20 GC 7 6 600 IIP3 (dBm) RF 700MHz TO 915MHz CT IF AMP 1nF 150nH 150nH Wideband Conversion Gain, IIP3 and NF vs RF Input Frequency 190MHz BPF GC (dB), NF (dB) 1nF 19 800 700 900 RF FREQUENCY (MHz) 18 1000 5540 TA01a 5540f LTC5540 Absolute Maximum Ratings Pin Configuration (Note 1) IFGND GND IF- IFBIAS IF+ TOP VIEW Mixer Supply Voltage (VCC1, VCC2)...........................3.8V LO Switch Supply Voltage (VCC3).............................3.8V IF Supply Voltage (IF+, IF -).......................................5.5V Shutdown Voltage (SHDN).................-0.3V to VCC +0.3V LO Select Voltage (LOSEL).................-0.3V to VCC +0.3V LO1, LO2 Input Power (0.2GHz to 2GHz)................9dBm LO1, LO2 Input DC Voltage.....................................0.5V RF Input Power (0.2GHz to 2GHz).........................15dBm RF Input DC Voltage................................................ 0.1V Operating Temperature Range..................-40C to 85C Storage Temperature Range................... -65C to 150C Junction Temperature (TJ)..................................... 150C 20 19 18 17 16 15 LO2 NC 1 RF 2 14 VCC3 21 GND CT 3 GND 4 13 GND 12 GND 11 LO1 8 VCC2 VCC1 9 10 GND 7 LOSEL 6 LOBIAS SHDN 5 UH PACKAGE 20-LEAD (5mm s 5mm) PLASTIC QFN TJMAX = 150C, JA = 34C/W, JC = 3C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC5540IUH#PBF LTC5540IUH#TRPBF 5540 20-Lead (5mm x 5mm) Plastic QFN -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ AC Electrical Characteristics VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4) PARAMETER CONDITIONS MIN LO Input Frequency Range TYP MAX UNITS 700 to 1200 MHz 800 to 1300 600 to 1100 MHz MHz 5 to 500 MHz RF Input Frequency Range Low-Side LO High-Side LO IF Output Frequency Range Requires External Matching RF Input Return Loss ZO = 50, 600MHz to 1300MHz >12 dB LO Input Return Loss ZO = 50, 700MHz to 1200MHz >12 dB IF Output Return Loss Requires External Matching >12 dB LO Input Power fLO = 700MHz to 1200MHz -4 0 6 dBm LO to RF Leakage fLO = 700MHz to 1200MHz <-30 dBm LO to IF Leakage fLO = 700MHz to 1200MHz <-37 dBm LO Switch Isolation LO1 Selected, 700MHz < fLO < 1200MHz LO2 Selected, 700MHz < fLO < 1200MHz >50 >47 dB dB RF to LO Isolation fRF = 600MHz to 1300MHz >55 dB RF to IF Isolation fRF = 600MHz to 1300MHz >37 dB 5540f LTC5540 AC Electrical Characteristics VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (f = 2MHz for two-tone IIP3 tests),unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4) High-Side LO Downmixer Application: RF = 600MHz to 1100MHz, IF = 190MHz, fLO = fRF +fIF PARAMETER CONDITIONS Conversion Gain RF = 700MHz RF = 900MHz RF = 1100MHz MIN TYP 6.3 7.6 7.9 7.9 MAX UNITS dB dB dB Conversion Gain Flatness RF = 900 30MHz, LO = 1090MHz, IF=190 30MHz 0.20 dB Conversion Gain vs Temperature TA = -40C to +85C, RF = 900MHz -0.008 dB/C Input 3rd Order Intercept RF = 700MHz RF = 900MHz RF = 1100MHz 26.5 25.9 23.8 dBm dBm dBm SSB Noise Figure RF = 700MHz RF = 900MHz RF = 1100MHz 10.0 9.9 10.4 SSB Noise Figure Under Blocking fRF = 900MHz, fLO = 1090MHz, fBLOCK = 800MHz, PBLOCK = 5dBm 16.2 dB 2LO - 2RF Output Spurious Product (fRF = fLO - fIF/2) fRF = 995MHz at -10dBm, fLO = 1090MHz, fIF = 190MHz -70 dBc 3LO - 3RF Output Spurious Product (fRF = fLO - fIF/3) fRF = 1026.67MHz at -10dBm, fLO = 1090MHz, fIF = 190MHz -75 dBc Input 1dB Compression RF = 900MHz, VCCIF = 3.3V RF = 900MHz, VCCIF = 5V 11 14.5 dBm dBm 23.4 11.7 dB dB dB Low-Side LO Downmixer Application: RF = 800MHz-1300MHz, IF = 190MHz, fLO = fRF -fIF PARAMETER CONDITIONS Conversion Gain RF = 900MHz RF = 1100MHz RF = 1300MHz MIN TYP 7.0 7.8 8.0 MAX UNITS dB dB dB Conversion Gain Flatness RF = 900MHz 30MHz, LO = 710MHz, IF = 190 30MHz 0.33 dB Conversion Gain vs Temperature TA = -40C to 85C, RF = 900MHz -0.007 dB/C Input 3rd Order Intercept RF = 900MHz RF = 1100MHz RF = 1300MHz 24.4 24.1 23.6 dBm dBm dBm SSB Noise Figure RF = 900MHz RF = 1100MHz RF = 1300MHz 10.6 10.5 10.3 dB dB dB SSB Noise Figure Under Blocking fRF = 900MHz, fLO = 710MHz, fIF = 190MHz, fBLOCK = 1000MHz, PBLOCK = 5dBm 16.7 dB 2RF - 2LO Output Spurious Product (fRF = fLO + fIF/2) fRF = 805MHz at -10dBm, fLO = 710MHz, fIF = 190MHz -61.5 dBc 3RF - 3LO Output Spurious Product (fRF = fLO + fIF/3) fRF = 773.33MHz at -10dBm, fLO = 710MHz, fIF = 190MHz -68 dBc Input 1dB Compression RF = 900MHz, VCCIF = 3.3V RF = 900MHz, VCCIF = 5V 11 14 dBm dBm 5540f LTC5540 DC Electrical Characteristics noted. Test circuit shown in Figure 1. (Note 2) PARAMETER VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, unless otherwise CONDITIONS MIN TYP MAX UNITS VCC Supply Voltage (Pins 6, 8 and 14) 3.1 3.3 3.5 VCCIF Supply Voltage (Pins 18 and 19) 3.1 3.3 5.3 V 97 96 193 116 120 236 mA mA mA 500 A Power Supply Requirements (VCC, VCCIF) VCC Supply Current (Pins 6 + 8 + 14) VCCIF Supply Current (Pins 18 + 19) Total Supply Current (VCC + VCCIF) Total Supply Current - Shutdown SHDN = High V Shutdown Logic Input (SHDN) Low = On, High = Off SHDN Input High Voltage (Off) 3 V SHDN Input Low Voltage (On) -0.3V to VCC + 0.3V SHDN Input Current -20 0.3 V 30 A Turn On Time 1 s Turn Off Time 1.5 s LO Select Logic Input (LOSEL) Low = LO1 Selected, High = LO2 Selected LOSEL Input High Voltage 3 V LOSEL Input Low Voltage -0.3V to VCC + 0.3V LOSEL Input Current -20 LO Switching Time VCC Supply Current vs Supply Voltage (Mixer and LO Switch) 90 110 90 70 85 3.3 3.2 3.4 3.5 VCC SUPPLY VOLTAGE (V) 3.6 5540 G01 50 3.0 220 210 SUPPLY CURRENT (mA) 95 ns Total Supply Current vs Temperature (VCC + VCCIF) 85C 25C -40C 130 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 150 85C 25C -40C 3.1 A SHDN = Low, Test circuit shown in Figure 1. VCCIF Supply Current vs Supply Voltage (IF Amplifier) 100 80 3.0 30 Note 3: SSB Noise Figure measured with a small-signal noise source, bandpass filter and 6dB matching pad on RF input, bandpass filter and 6dB matching pad on the LO input, and no other RF signals applied. Note 4: LO switch isolation is measured at the IF output port at the IF frequency with fLO1 and fLO2 offset by 2MHz. Typical DC Performance Characteristics 105 V 50 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC5540 is guaranteed functional over the operating temperature range from -40C to 85C. 110 0.3 200 VCC = 3.3V, VCCIF = 5V (DUAL SUPPLY) 190 VCC = VCCIF = 3.3V (SINGLE SUPPLY) 180 170 3.3 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 5.4 5540 G02 160 -45 -25 -5 15 55 35 TEMPERATURE (C) 75 95 5540 G03 5540f LTC5540 Typical AC Performance Characteristics High-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and NF vs RF Frequency LO Leakage vs LO Frequency RF Isolation vs RF Frequency 22 26 20 IIP3 16 10 20 14 8 NF 12 -20 LO LEAKAGE (dBm) 18 85C 16 25C 14 -40C 12 22 6 10 6 600 55 LO-RF -30 -40 -60 700 0 1100 800 900 1000 RF FREQUENCY (MHz) RF-IF 35 30 800 900 1000 1100 LO FREQUENCY (MHz) 25 600 1200 700 800 900 1000 1100 1200 1300 RF FREQUENCY (MHz) 5540 G05 700MHz Conversion Gain, IIP3 and NF vs LO Input Power 5540 G06 900MHz Conversion Gain, IIP3 and NF vs LO Input Power 1100MHz Conversion Gain, IIP3 and NF vs LO Input Power 28 20 26 18 24 18 24 18 22 16 20 85C 16 25C -40C 14 22 20 85C 16 25C -40C 14 20 14 18 12 18 12 18 12 16 10 16 10 16 10 14 8 14 8 IIP3 22 10 6 GC 8 6 -6 -4 -2 0 2 4 LO INPUT POWER (dBm) 6 NF 12 4 10 2 8 0 6 6 GC -6 -4 -2 0 2 4 LO INPUT POWER (dBm) 5540 G07 6 22 14 4 10 2 8 0 6 GC -6 26 24 18 24 18 85C 16 25C -40C 14 22 18 12 16 10 14 8 NF 12 10 8 6 3.0 6 GC 3.2 3.3 3.1 3.4 3.5 VCC , VCCIF SUPPLY VOLTAGE (V) 3.6 5540 G10 20 18 RF = 900MHz VCC = 3.3V 85C 16 25C -40C 14 12 16 10 14 8 NF 12 4 10 2 8 0 6 3.0 6 4 GC 4 4.5 3.5 5 VCCIF SUPPLY VOLTAGE (V) 5.5 5540 G11 GC (dB), IIP3 (dBm), P1dB (dBm) 28 20 GC (dB), IIP3 (dBm) 22 26 SSB NF (dB) 28 20 SSB NF (dB) 22 RF = 900MHz VCC = VCCIF -2 0 2 4 LO INPUT POWER (dBm) 6 0 900MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature 26 20 4 5540 G09 Conversion Gain, IIP3 and NF vs IF Supply Voltage (Dual Supply) IIP3 6 2 -4 28 IIP3 8 NF 85C 25C -40C 12 5540 G08 Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply) 22 20 IIP3 SSB NF (dB) NF 12 IIP3 GC (dB), IIP3 (dBm) 22 26 GC (dB), IIP3 (dBm) 28 20 SSB NF (dB) 22 26 SSB NF (dB) 28 24 GC (dB), IIP3 (dBm) 40 LO-IF 5540 G04 GC (dB), IIP3 (dBm) 45 2 700 RF-LO 50 -50 4 GC 8 65 60 18 SSB NF (dB) GC (dB), IIP3 (dBm) 24 -10 ISOLATION (dB) 28 24 RF = 900MHz VCCIF = 5.0V VCCIF = 3.3V IIP3 22 20 18 16 14 P1dB 12 10 2 8 0 6 -45 GC -25 -5 15 35 55 TEMPERATURE (C) 75 95 5540 G12 5540f LTC5540 Typical AC Performance Characteristics High-Side LO (continued) VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power 20 10 10 0 -10 -20 RF1 = 899 MHz -30 RF2 = 901MHz LO = 1090MHz -40 -50 -60 LO = 1090MHz IFOUT RF = 900MHz -10 -20 3LO-3RF RF = 1026.67MHz -30 -40 -50 2LO-2RF RF = 995MHz -60 IM3 IM5 -70 -80 -12 -55 0 IFOUT -9 -6 -3 0 3 RF INPUT POWER (dBm/TONE) -80 -12 6 -9 -6 -3 0 3 RF INPUT POWER (dBm) -75 3LO-3RF RF = 1026.67MHz -80 14 55 LO2 SELECTED 50 6 fRF = 850MHz TO 950MHz fLO = 1090MHz 9 LO1 SELECTED GAIN (dB) 16 -3 0 3 LO INPUT POWER (dBm) Wideband Conversion Gain vs IF Frequency 10 60 18 -6 5540 G15 65 ISOLATION (dB) SSB NF (dBm) -70 -85 6 70 8 7 45 12 10 8 -20 -15 -10 -5 0 5 RF BLOCKER POWER (dBm) 6 40 RF = 900MHz BLOCKER = 800MHz 35 700 10 800 900 1000 1100 1200 LO FREQUENCY (MHz) 900MHz Conversion Gain Distribution 35 35 90C 25C -45C 30 30 25 20 15 10 0 6.5 7 7.5 8 GAIN (dB) 8.5 9 25 20 15 10 5540 G19 0 45 90C 25C -45C 240 90C 25C -45C 40 35 30 25 20 15 10 5 5 180 200 220 IF FREQUENCY (MHz) 900MHz SSB Noise Figure Distribution DISTRIBUTION (%) 40 160 5540 G18 900MHz IIP3 Distribution DISTRIBUTION (%) 45 5 140 1300 85C 25C -40C 5540 G17 5540 G16 DISTRIBUTION (%) 2LO-2RF RF = 995MHz -65 LO Switch Isolation vs LO Frequency PLO = -3dBm PLO = 0dBm PLO = +3dBm PLO = +6dBm 20 -60 5540 G14 SSB Noise Figure vs RF Blocker Level 22 RF = 900MHz PRF = -10dBM LO = 1090MHz -70 5540 G13 24 2 x 2 and 3 x 3 Spur Suppression vs LO Power RELATIVE SPUR LEVEL (dBc) 20 OUTPUT POWER (dBm) OUTPUT POWER (dBm/TONE) 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power 5 24 24.5 25 25.5 26 26.5 27 27.5 28 IIP3 (dBm) 5540 G20 0 8 8.5 9 9.5 10 10.5 11 11.5 12 NOISE FIGURE (dB) 5540 G21 5540f LTC5540 Typical AC Performance Characteristics Low-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. 900MHz SSB Noise Figure vs RF Blocker Level 28 22 26 20 24 18 IIP3 14 18 18 12 16 10 14 85C 25C -40C 12 10 8 NF 6 800 14 12 4 10 2 900 0 1300 1000 1100 1200 RF FREQUENCY (MHz) 26 16 6 GC 8 SSB NF (dB) 20 SSB NF (dB) 20 28 PLO = -3dBm PLO = 0dBm PLO = +3dBm PLO = +6dBm 22 16 22 GC (dB), IIP3 (dBm) 24 900MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature GC (dB), IIP3 (dBm), P1dB (dBm) Conversion Gain, IIP3 and NF vs RF Frequency -15 -10 -5 0 5 RF BLOCKER POWER (dBm) 5540 G22 18 16 14 P1dB 12 10 GC 8 6 -45 10 -25 -5 15 35 55 TEMPERATURE (C) 75 95 5540 G24 1300MHz Conversion Gain, IIP3 and NF vs LO Power 1100MHz Conversion Gain, IIP3 and NF vs LO Power 28 20 26 18 24 18 24 18 22 16 22 16 22 16 20 14 20 14 20 14 18 12 18 12 18 12 16 10 16 10 16 10 85C 25C -40C 12 10 NF 8 6 GC 8 6 -6 -4 -2 0 2 4 LO INPUT POWER (dBm) 6 14 85C 25C -40C 12 4 10 2 8 0 6 -6 GC -4 20 10 10 IFOUT RF = 900MHz 0 OUTPUT POWER (dBm) IFOUT -20 RF1 = 899MHz RF2 = 901MHz -40 LO = 710MHz -30 -50 -60 -80 -12 IM3 85C 25C -40C 12 4 10 2 8 0 6 -6 GC 6 4 -4 -2 0 2 4 LO INPUT POWER (dBm) -30 LO = 710MHz 3RF-3LO RF = 733.33MHz -40 -50 6 0 5540 G27 -10 -20 8 NF 2 2 x 2 and 3 x 3 Spur Suppression vs LO Power -50 2RF-2LO RF = 805MHz -60 -55 2RF-2LO RF = 805MHz RF = 900MHz PRF = -10dBM LO = 710MHz -60 -65 3RF-3LO RF = 773.33MHz -70 -75 -70 IM5 -9 -6 -3 0 3 RF INPUT POWER (dBm/TONE) 6 14 Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power 20 -70 6 20 IIP3 5540 G26 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power -10 8 -2 0 2 4 LO INPUT POWER (dBm) 5540 G25 0 NF 22 SSB NF (dB) 14 IIP3 RELATIVE SPUR LEVEL (dBc) IIP3 GC (dB), IIP3 (dBm) 22 26 GC (dB), IIP3 (dBm) 28 20 SSB NF (dB) 22 26 SSB NF (dB) 28 24 GC (dB), IIP3 (dBm) 20 5540 G23 900MHz Conversion Gain, IIP3 and NF vs LO Power OUTPUT POWER (dBm/TONE) VCCIF = 5.0V VCCIF = 3.3V 22 RF = 900MHz BLOCKER = 1000MHz 8 -20 IIP3 24 6 5540 G28 -80 -12 -9 -6 -3 0 3 RF INPUT POWER (dBm) 6 5540 G29 -80 -6 -3 0 3 LO INPUT POWER (dBm) 6 5540 G30 5540f LTC5540 Pin Functions NC (Pin 1): This pin is not connected internally. It can be left floating, connected to ground or to VCC . LOBIAS (Pin 7): This Pin Allows Adjustment of the LO Buffer Current. Typical DC voltage is 2.2V. RF (Pin 2): Single-Ended Input for the RF Signal. This pin is internally connected to the primary side of the RF input transformer, which has low DC resistance to ground. A series DC-blocking capacitor should be used to avoid damage to the integrated transformer. The RF input is impedance matched, as long as the selected LO input is driven with a 0dBm 6dB source between 0.7GHz and 1.2GHz. LOSEL (Pin 9): LO1/LO2 Select Pin. When the input voltage is less than 0.3V, the LO1 port is selected. When the input voltage is greater than 3V, the LO2 port is selected. Typical input current is 11A for LOSEL = 3.3V. This pin must not be allowed to float. CT (Pin 3): RF Transformer Secondary Center-Tap. This pin may require a bypass capacitor to ground. See the Applications Information section. This pin has an internally generated bias voltage of 1.2V. It must be DC-isolated from ground and VCC. GND (Pins 4, 10, 12, 13, 17, Exposed Pad Pin 21): Ground. These pins must be soldered to the RF ground plane on the circuit board. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. SHDN (Pin 5): Shutdown Pin. When the input voltage is less than 0.3V, the internal circuits supplied through pins 6, 8, 14, 18 and 19 are enabled. When the input voltage is greater than 3V, all circuits are disabled. Typical input current is less than 10A. This pin must not be allowed to float. VCC2 (Pin 6) and VCC1 (Pin 8): Power Supply Pins for the LO Buffer and Bias Circuits. These pins are internally connected and must be externally connected to a regulated 3.3V supply, with bypass capacitors located close to the pin. Typical current consumption is 97mA. LO1 (Pin 11) and LO2 (Pin 15): Single-Ended Inputs for the Local Oscillators. These pins are internally biased at 0V and require external DC blocking capacitors. Both inputs are internally matched to 50, even when the chip is disabled (SHDN = high). VCC3 (Pin 14): Power Supply Pin for the LO Switch. This pin must be connected to a regulated 3.3V supply and bypassed to ground with a capacitor near the pin. Typical DC current consumption is less than 100A. IFGND (Pin 16): DC Ground Return for the IF Amplifier. This pin must be connected to ground to complete the IF amplifier's DC current path. Typical DC current is 96mA. IF - (Pin 18) and IF + (Pin 19): Open-Collector Differential Outputs for the IF Amplifier. These pins must be connected to a DC supply through impedance matching inductors, or a transformer center-tap. Typical DC current consumption is 48mA into each pin. IFBIAS (Pin 20): This Pin Allows Adjustment of the IF Amp Current. Typical DC voltage is 2.1V. 5540f LTC5540 Block Diagram 20 19 18 21 16 IFBIAS IF - IFGND EXPOSED IF+ PAD IF AMP 2 3 5 LO2 15 VCC3 14 RF LO AMP LOSEL PASSIVE MIXER CT SHDN 9 LO1 11 BIAS VCC2 VCC1 6 8 7 LOBIAS GND PINS ARE NOT SHOWN 5540 BD Test Circuit IFOUT 190MHz 50 4:1 T1 L1 VCCIF 3.1V TO 5.3V 96mA C9 L1, L2 vs IF Frequencies C10 IF (MHz) L1, L2 (nH) L2 140 270 190 150 240 100 380 33 450 22 C8 L3 R2 20 19 18 IFBIAS IF+ IF - 17 16 GND IFGND 1 NC RFIN 50 C4 LO2IN 50 LO2 15 C1 2 RF VCC3 14 C2 LTC5540 3 CT C7 GND 13 4 GND GND 12 C3 SHDN (0V/3.3V) 5 SHDN VCC2 LOBIAS 7 6 VCC 3.1V TO 3.5V 97mA VCC1 LOSEL 9 8 LO1IN 50 LO1 11 GND 10 REF DES VALUE SIZE COMMENTS C3, C4 100pF 0402 AVX C6, C7, C8 22pF 0402 AVX C5, C9 1F 0603 AVX C10 1000pF 0402 AVX L1, L2 150nH 0603 Coilcraft 0603CS L3 30nH 0603 Coilcraft 0603CS R2 2.05k 0402 T1 (Alternate) TC4-1W-7ALN+ (WBC4-6TLB) Mini-Circuits (Coilcraft) HIGH-SIDE LO C5 0.015" 0.062" 0.015" 5541 TC C6 LOSEL (0V/3.3V) RF GND DC1431A BOARD BIAS STACK-UP GND (NELCO N4000-13) C1 5.6pF 0402 AVX C2 1.5pF 0402 AVX 100pF 0402 AVX LOW-SIDE LO C1, C2 Figure 1. Standard Downmixer Test Circuit Schematic (190MHz IF) 5540f LTC5540 Applications Information Introduction The LTC5540 consists of a high linearity passive doublebalanced mixer core, IF buffer amplifier, high speed singlepole double-throw (SPDT) LO switch, LO buffer amplifier and bias/enable circuits. See Pin Functions section for a description of each pin function. The RF and LO inputs are single-ended. The IF output is differential. Low-side or high-side LO injection can be used. The evaluation circuit, shown in Figure 1, utilizes bandpass IF output matching and an IF transformer to realize a 50 single-ended IF output. The evaluation board layout is shown in Figure 2. 2mm of pin 3 for proper high-frequency decoupling. The nominal DC voltage on the CT pin is 1.2V. For the RF input to be properly matched, the selected LO input must be driven. The values of C1 and C2 can be chosen to optimize the performance for high-side or low-side LO (see the table in Figure 1). For high-side applications, a broadband input match is realized with C1 = 5.6pF. The measured input return loss is shown in Figure 4 for LO frequencies of 700MHz, 1090MHz and 1200MHz. As shown in Figure 4, the RF input impedance is dependent on LO frequency, although a single value of C1 is adequate to cover a wide RF range. TO MIXER RFIN C1 2 3 RF CT C2 LTC5540 5540 F03 5540 F02 Figure 3. RF Input Schematic Figure 2. Evaluation Board Layout 0 RF Input The secondary winding of the RF transformer is internally connected to the passive mixer. The center-tap of the transformer secondary is connected to pin 3 (CT) to allow the connection of bypass capacitor, C2. The value of C2 is LO frequency-dependent. C2 should be located within -5 RETURN LOSS (dB) The mixer's RF input, shown in Figure 3, is connected to the primary winding of an integrated transformer. A 50 match is realized when a series capacitor, C1, is connected to the RF input. C1 is also needed for DC blocking if the RF source has DC voltage present, since the primary side of the RF transformer is DC-grounded internally. The DC resistance of the primary is approximately 5. LO = 700MHz LO = 1090MHz LO = 1200MHz -10 -15 -20 -25 600 C1 = 5.6pF 700 800 900 1000 FREQUENCY (MHz) 1200 1100 5541 F04 Figure 4. RF Input Return Loss 5540f 10 LTC5540 Applications Information The RF input impedance and input reflection coefficient, versus RF frequency, is listed in Table 1. The reference plane for this data is pin 2 of the IC, with no external matching, and the LO is driven at 1090MHz. Table 1. RF Input Impedance and S11 (at Pin 2, No External Matching, LO Input Driven at 1090MHz) S11 The LO switch is designed for high isolation and fast (<50ns) switching. This allows the use of two active synthesizers in frequency-hopping applications. If only one synthesizer is used, then the unused LO input may be grounded. The LO switch is powered by VCC3 (Pin 14) and controlled by the LOSEL logic input (Pin 9). The LO1 and LO2 inputs are always 50-matched when VCC is applied to the chip, even when the chip is shutdown. The DC resistance of the selected LO input is approximately 23 and the unselected input is approximately 50. A logic table for the LO switch is shown in Table 2. Measured LO input return loss is shown in Figure 6. RF (GHz) RF INPUT IMPEDANCE MAG ANGLE 0.4 14.7 + j19.7 0.6 133.8 0.5 18.1 + j24.4 0.6 122.9 0.6 23.1 + j27.7 0.5 113.4 0.7 29.9 + j30.6 0.4 102.3 0.8 39.0 + j32.9 0.4 88.2 0.9 52.8 + j31.7 0.3 67.8 LOSEL ACTIVE LO INPUT 1.0 67.3 + j15.4 0.2 34.3 Low LO1 1.1 55.2 - j13.4 0.1 -61.4 High LO2 1.2 36.2 - j11.2 0.2 -133.5 1.3 31.2 - j4.8 0.2 -162.4 1.4 29.8 - j0.2 0.3 -179.2 LO2 C4 LO2IN 15 LO BUFFER VCC3 14 TO MIXER LO1 11 4mA BIAS 7 LOBIAS 6 VCC2 8 VCC1 9 The LO amplifiers are powered by VCC1 and VCC2 (pin 8 and pin 6). When the chip is enabled (SHDN = low), the internal bias circuit provides a regulated 4mA current to the amplifier's bias input, which in turn causes the amplifiers to draw approximately 80mA of DC current. This 4mA reference is also connected to LOBIAS (Pin 7) to allow modification of the amplifier's DC bias current for special applications. The recommended application circuits require no LO amplifier bias modification, so this pin should be left open-circuited. 0 C3 LO1IN LOSEL 5540 F05 Figure 5. LO Input Schematic LO Inputs The mixer's LO input circuit, shown in Figure 5, consists of an integrated SPDT switch, a balun transformer, and a two-stage high-speed limiting differential amplifier to drive the mixer core. The LTC5540's LO amplifiers are optimized for the 0.7GHz to 1.2GHz LO frequency range. LO frequencies above or below this frequency range may be used with degraded performance. C3 = C4 = 100pF -5 RETURN LOSS (dB) LTC5540 Table 2. LO Switch Logic Table -10 SELECTED -15 -20 -25 NOT SELECTED OR SHUTDOWN -30 500 600 700 800 900 1000 1100 1200 1300 FREQUENCY (MHz) 5540 F06 Figure 6. LO Input Return loss 5540f 11 LTC5540 Applications Information The nominal LO input level is 0dBm although the limiting amplifiers will deliver excellent performance over a 6dBm input power range. LO input power greater than 6dBm may cause conduction of the internal ESD diodes. Series capacitors C3 and C4 optimize the input match and provide DC blocking. The LO1 input impedance and input reflection coefficient, versus frequency, is shown in Table 3. The LO2 port is identical due to the symmetric device layout and packaging. T1 IFOUT 4:1 C10 L1 R1 (OPTION TO REDUCE DC POWER) IFBIAS 20 L2 VCCIF C8 96mA 19 IF+ R2 IF - 18 16 L3 (OR SHORT) IFGND VCC Table 3. LO1 Input Impedance vs Frequency (at Pin 11, No External Matching, LOSEL = Low) IF AMP 4mA S11 FREQUENCY (GHz) INPUT IMPEDANCE MAG ANGLE 0.6 48.9 + j30.6 0.3 74.9 0.7 62.8 + j29.4 0.28 51.9 0.8 78.0 + j17.2 0.25 23.9 0.9 80.4 - j4.55 0.24 -6.5 1.0 68.3 - j20.5 0.23 -38.4 1.1 54.6 - j24.1 0.23 -66.3 1.2 44.7 - j22.3 0.24 -90.1 1.3 38.1 - j18.7 0.25 -110.5 1.4 33.8 - j14.9 0.26 -127.3 IF Output The IF amplifier, shown in Figure 7, has differential opencollector outputs (IF+ and IF -), a DC ground return pin (IFGND), and a pin for modifying the internal bias (IFBIAS). The IF outputs must be biased at the supply voltage (VCCIF), which is applied through matching inductors L1 and L2. Alternatively, the IF outputs can be biased through the center tap of a transformer. Each IF output pin draws approximately 48mA of DC supply current (96mA total). Resistor R2 is used to improve the impedance match. IFGND (pin 16) must be grounded or the amplifier will not draw DC current. Grounding through inductor L3 improves LO-IF and RF-IF leakage performance but is otherwise not necessary. High DC resistance in L3 will reduce the IF amplifier supply current, which will degrade RF performance. For optimum single-ended performance, the differential IF outputs must be combined through an external IF LTC5540 BIAS 5540 F07 Figure 7. IF Amplifier Schematic with Bandpass Match transformer or discrete IF balun circuit. The evaluation board (see Figures 1 and 2) uses a 4:1 ratio IF transformer for impedance transformation and differential to singleended transformation. It is also possible to eliminate the IF transformer and drive differential filters or amplifiers directly. The IF output impedance can be modeled as 320 in parallel with 2.3pF at IF frequencies. An equivalent smallsignal model (including bondwire inductance) is shown in Figure 8. Frequency-dependent differential IF output impedance is listed in Table 4. This data is referenced to the package pins (with no external components) and includes the effects of IC and package parasitics. 19 18 IF+ 0.9nH RIF IF - 0.9nH CIF LTC5540 5540 F08 Figure 8. IF Output Small-Signal Model 5540f 12 LTC5540 Applications Information Bandpass IF Matching The IF output can be matched for IF frequencies as low as 70MHz or as high as 500MHz using the bandpass IF matching shown in Figure 1 and Figure 7. L1 and L2 resonate with the internal IF output capacitance at the desired IF frequency. The value of L1, L2 is calculated as follows: T1 C9 1F C8 22pF L1 82nH 19 18 IF + LTC5540 where CIF is the internal IF capacitance (listed in Table 4). Figure 9. IF Output with Lowpass Matching 0 RETURN LOSS (dB) -5 Table 4. IF Output Impedance vs Frequency 70 674 || -j1137 (2pF) 140 628 || -j569 (2pF) 190 606 || -j419 (2pF) 240 584 || -j316 (2.1pF) 300 561 || -j253 (2.1pF) 380 532 || -j182 (2.3pF) 450 511 || -j154 (2.3pF) IF - 5540 F09 Values of L1 and L2 are tabulated in Figure 1 for various IF frequencies. For IF frequencies below 70MHz, the values of L1, L2 become unreasonably high and the lowpass topology shown in Figure 9 is preferred. Measured IF output return loss for bandpass IF matching is plotted in Figure 10. DIFFERENTIAL OUTPUT IMPEDANCE (RIF || XIF (CIF)) L2 82nH C13 1.5pF R2 1k L1 = L2 = 1/[(2 fIF)2 * 2 * CIF] FREQUENCY (MHz) IFOUT 50 30MHz TO 150MHz 4:1 VCCIF 3.1-5.3V -10 -15 270nH 150nH 100nH -20 33nH 50 100 150 200 250 300 350 400 450 500 FREQUENCY (MHz) 5540 F10 Figure 10. IF Output Return Loss - Bandpass Matching IF Amplifier Bias Lowpass IF Matching An alternative IF matching network shown in Figure 9 uses a lowpass topology, which provides excellent RF to IF and LO to IF isolation. VCCIF is supplied through the center tap of the 4:1 transformer. A lowpass impedance transformation is realized by shunt elements R2 and C13 (in parallel with the internal RIF and CIF), and series inductors L1 and L2. Resistor R2 is used to reduce the IF output resistance, or it can be deleted for the highest conversion gain. The final impedance transformation to 50 is realized by transformer T1. The matching element values shown in Figure 9 are optimized for a wideband 30MHz-150MHz IF match. The demo board (see Figure 2) has been laid out to accommodate this matching topology with very few modifications. The IF amplifier delivers excellent performance with VCCIF = 3.3V, which allows the VCC and VCCIF supplies to be common. With VCCIF increased to 5V, the RF input P1dB increases by almost 3dB, at the expense of higher power consumption. Mixer performance at 900MHz is shown in Table 5 with VCCIF = 3.3V and 5V. For the highest conversion gain, high-Q wire-wound chip inductors are recommended for L1 and L2, especially when using VCCIF = 3.3V. Low-cost multilayer chip inductors may be substituted, with a slight reduction in conversion gain. Table 5. Performance Comparison with VCCIF = 3.3V and 5V (RF = 900MHz, High-Side LO, IF = 190MHz) VCCIF ICCIF GC P1dB IIP3 NF 3.3V 96 7.9 11 25.9 9.9 5V 99 7.9 14.5 25.9 10.0 5540f 13 LTC5540 Applications Information The IFBIAS pin (pin 20) is available for reducing the DC current consumption of the IF amplifier, at the expense of IIP3. This pin should be left open-circuited for optimum performance. The internal bias circuit produces a 4mA reference for the IF amplifier, which causes the amplifier to draw approximately 96mA. If resistor R1 is connected to pin 20 as shown in Figure 7, a portion of the reference current can be shunted to ground, resulting in reduced IF amplifier current. For example, R1 = 1k will shunt away 1.5mA from pin 20 and the IF amplifier current will be reduced by 38% to approximately 59mA. The nominal, open-circuit DC voltage at pin 20 is 2.1V. Table 6 lists RF performance at 900MHz versus IF amplifier current. The SHDN pin must be pulled high or low. If left floating, then the on/off state of the IC will be indeterminate. If a three-state condition can exist at the SHDN pin, then a pull-up or pull-down resistor must be used. LTC5540 VCC2 6 SHDN 5 500 Table 6. Mixer Performance with Reduced IF Amplifier Current (RF = 900MHz, High-Side LO, IF = 190MHz, VCC = VCCIF = 3.3V) R1 (k) ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) OPEN 96 7.9 25.9 11.0 9.9 4.7 86 7.7 25.3 11.1 9.9 2.2 77 7.6 24.7 11.3 9.9 1 59 7.3 23.0 10.8 9.8 (RF = 900MHz, Low-Side LO, IF = 190MHz, VCC = VCCIF = 3.3V) R1 (k) 5540 F11 Figure 11. Shutdown Input Circuit ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) Supply Voltage Ramping OPEN 96 7.0 24.4 11.0 10.6 4.7 86 6.9 23.4 11.0 10.6 Fast ramping of the supply voltage can cause a current glitch in the internet ESD protection circuits. Depending on the supply inductance, this could result in a supply voltage transient that exceeds the maximum rating. A supply voltage ramp time of greater than 1ms is recommended. 2.2 77 6.8 23.2 11.1 10.6 1 59 6.3 22.4 10.5 10.5 Shutdown Interface Figure 11 shows a simplified schematic of the SHDN pin interface. To disable the chip, the SHDN voltage must be higher than 3.0V. If the shutdown function is not required, the SHDN pin should be connected directly to GND. The voltage at the SHDN pin should never exceed the power supply voltage (VCC) by more than 0.3V. If this should occur, the supply current could be sourced through the ESD diode, potentially damaging the IC. 5540f 14 LTC5540 Package Description UH Package 20-Lead Plastic QFN (5mm x 5mm) (Reference LTC DWG # 05-08-1818 Rev O) 0.70 p0.05 5.50 p 0.05 4.10 p 0.05 2.60 REF 2.70 p 0.05 2.70 p 0.05 PACKAGE OUTLINE 0.25 p0.05 0.65 BSC PIN 1 NOTCH R = 0.30 TYP OR 0.35 s 45o CHAMFER RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 p 0.10 0.75 p 0.05 R = 0.05 TYP R = 0.125 TYP 19 20 0.40 p 0.10 PIN 1 TOP MARK (NOTE 6) 5.00 p 0.10 1 2.60 REF 2 2.70 p 0.10 2.70 p 0.10 (UH20) QFN 0208 REV O 0.200 REF 0.00 - 0.05 0.25 p 0.05 0.65 BSC NOTE: BOTTOM VIEW--EXPOSED PAD 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 5540f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC5540 Typical Application 450MHz Downconverting Mixer Application T1 4:1 Gain, NF and IIP3 vs RF Frequency 27 IFOUT 25 GAIN (dB), NF (dB), IIP3 (dBm) 190MHz 1nF 150nH VCCIF 3.3V OR 5V 150nH 2k 22pF 1F IF+ 3.3pF IF - RF 400MHz TO 540MHz LO2 LTC5542 IF 10pF VCC2 VCC 3.3V 1F 17 15 13 VCC1 VCC3 NF 11 9 GC 420 440 460 480 500 520 RF INPUT FREQUENCY (MHz) LO1 LOSEL 540 5541 TA02 LO 590MHz TO 730MHz BIAS SHDN 19 5 400 LO 6.8pF TA = 25C fIF = 190MHz fLO = fRF + fIF IIP3 21 7 RF SHDN (0V/3.3V) 23 22pF 5540 TA02 Related Parts PART NUMBER Infrastructure LT5527 LT5557 LTC6400-X LTC6401-X LTC6416 LTC6412 LT5554 LT5575 DESCRIPTION COMMENTS 400MHz to 3.7GHz, 5V Downconverting Mixer 400MHz to 3.8GHz, 3.3V Downconverting Mixer 300MHz Low Distortion IF Amp/ADC Driver 140MHz Low Distortion IF Amp/ADC Driver 2GHz 16-Bit ADC Buffer 31dB Linear Analog VGA Ultralow Distort IF Digital VGA 700MHz to 2.7GHz Direct Conversion I/Q Demodulator LT5578 400MHz to 2.7GHz Upconverting Mixer LT5579 1.5GHz to 3.8GHz Upconverting Mixer LTC5598 5MHz to 1.6GHz I/Q Modulator RF Power Detectors LT5534 50MHz to 3GHz Log RF Power Detector with 60dB Dynamic Range LT5537 Wide Dynamic Range Log RF/IF Detector LT5570 2.7GHz Mean-Squared Detector 2.3dB Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply 2.9dB Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O Fixed Gain of 8dB, 14dB, 20dB and 26dB; >40dBm OIP3 at 140MHz, Differential I/O 40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping 35dBm OIP3 at 240MHz, Continuous Gain Range -14dB to 17dB 48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps Integrated Baluns, 28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match, 0.4 Phase Match 27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer 27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports 27.7dBm OIP3 at 140MHz, 22.9dBm at 900MHz, -161.2dBm/Hz Noise Floor LT5581 ADCs LTC2208 LTC2262-14 LTC2242-12 6GHz Low Power RMS Detector 40dB Dynamic Range, 1dB Accuracy Over Temperature, 1.5mA Supply Current 16-Bit, 130Msps ADC 14-Bit, 150Msps ADC Ultralow Power 12-Bit, 250Msps ADC 78dBFS Noise Floor, >83dB SFDR at 250MHz 72.8dB SNR, 88dB SFDR, 149mW Power Consumption 65.4dB SNR, 78dB SFDR, 740mW Power Consumption 1dB Output Variation over Temperature, 38ns Response Time, Log Linear Response Low Frequency to 1GHz, 83dB Log Linear Dynamic Range 0.5dB Accuracy Over Temperature and >50dB Dynamic Range, 500ns Rise Time 5540f 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LT 0410 * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2010