SY89833L
3.3V Ultra-Precision 1:4 LVDS Fanout
Buffer/Translator with Internal Termination
General Description
The S Y89833L is a 3.3V, h igh-speed 2GH z differ ential low
voltage differential swing (LVDS) 1:4 fanout buffer
optimized for ultra-low skew applications. Within device
skew is guaranteed to be less than 20ps over supply
voltage and temperature.
The differential input buffer has a unique internal
termination design that allows access to the termination
network thr ough a VT pin. This feature a llo ws t he d ev i ce to
easily interface to different logic standards. A VREF-AC
reference is included for AC-coupled applications.
The SY89833L is part of Micrel’s high-speed clock
synchronization family. For 2.5V applications, the
SY89832U provides similar functionality while operating
from a 2.5V ±5% supply. For applications that require a
different I/O combination, consult the Micrel website at
www.micrel.com, and choose from a comprehensive
product line of high-speed, low-skew fanout buffers,
translators and clock generators.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
• Guaranteed AC performance over temperature and
voltage:
− DC-to > 2GHz throughput
− <600ps propagation delay (IN-to-Q)
− <20ps withi n-device skew
− <150ps rise/fall times
• Ultra-low jitter design:
− 98fsRMS phase jitter
• Patented Any-In input termination and VT pin accepts
DC- and AC-coupl ed inp uts
• High-sp eed LVD S outp uts
• 3.3V power supply operation:
− Industrial temperature range: -40°C to +85°C
• Available in 16-pin (3mm × 3mm) QFN package
Applications
• Processor clock distribution
• SONET clock distribution
• Fibre Channel clock distribution
• Gigabit Ethernet clock distribution
Functional Block Diagram
Typical Performance
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
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SY89833L
Ordering Information(1)
Part Number Package Type Operating Range Package Marking Lead Finish
SY89833LMG QFN-16 Industrial 833L with Pb-Free Bar Line Indicator NiPdAu
Pb-Free
SY89833LMG TR(2) QFN-16 Industrial 833L with Pb-Free Bar Line Indicator NiPdAu
Pb-Free
Notes:
1. Contact f act ory for die avail abi lit y. Dice are guaranteed at TA = 25°C, DC Electr ic als on l y.
2. Tape and Reel.
Pin Configuration
16-Pin 3mm × 3mm QFN
Pin Description
Pin Number Pin Name Pin Function
15, 16
1, 2
3, 4
5, 6
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
LVDS Differential Outputs: Normally terminated with 100Ω across the pair (Q, / Q) . See “LV D S
Outputs” section. Unused outputs should be terminated with a 100Ω resistor across each pair.
8 EN
This single-ended TTL/CMOS-com pati ble inp ut functions as a synchronous output enable. The
synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW
state. Note that thi s input is int ernal ly connec ted to a 25kΩ pull-up resistor and will default to logic
HIGH state (enabled) if left open.
9, 12 /IN, IN
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC-
or DC-Coupled differe nti al sig nals as small as 100mV. Each pin of a pair internally terminates to a VT
pin through 50Ω. Note that these inputs will default to an intermediate state if left open. Please refer to
the “Input Interface Applications” section for more details.
10 VREF-AC
Reference Voltage: These outputs bias to VCC-1.4V.They are used when AC coupling the input s (IN,
/IN). For AC-Coupled applications, connect VREF-AC to VT pin and bypass with 0.01µF low ESR
capacitor to VCC. See “Input Interface Applications” section for more details. Maximum sink/source
cu rrent is ±1.5mA. Due to the limited drive capability, each VREF-AC pin is only intended to drive its
respective VT pin.
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SY89833L
Pin Description (Continued)
Pin Number Pin Name Pin Function
11 VT Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT
pins provide a center-tap to a termination network for maximum interface flexibility. See “Input
Interface Applications” section for more details.
13 GND Ground. GND pins and exposed pad must be connected to the most negative potential of the device
ground.
7, 14 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to each
VCC pin as possible.
Truth Tables
IN /IN EN Q /Q
0 1 1 0 1
1 0 1 1 0
X X 0 0
(3)
1
(3)
Note:
3. On next negative trans iti on of the input signal (IN).
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SY89833L
Absolute Maximum Ratings(4)
Supply Voltage (VCC) .................................... −0.5V to +4.0V
Input Voltage (VIN) .................................. −0.5 to VCC +0.3V
LVDS Output Current (IOUT) ....................................... +10mA
Input Current
Source or Sink Current on (IVT) ............................. ±2mA
Maximum Operating Junction Temperature ............... 125°C
Lead Temperature (Soldering, 20 s) .......................... 260°C
Storage Temperature (TS) ......................... −65°C to +150°C
Operating Ratings(5)
Supply Voltage Range ................................. +3.0V to +3.6V
Ambient Temperature (TA) .......................... –40°C to +8 5°C
Junction Thermal Resistance(6)
QFN (θJA)
Still-Air ........................................................... 60°C/W
QFN (ΨJB).......................................................... 33°C/W
Electrical Characteristics(7)
TA = −40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min. Typ. Max. Units
VCC Power Supply Voltage Range 3.0 3.3 3.6 V
ICC Power Supply Current No load, maximum VCC 75 100 mA
RIN Input Resistance (IN-to-VT) 45 50 55 Ω
RDIFF-IN Differential Input Resistance
(IN-to-/IN) 90 100 110 Ω
VIH Input HIGH Voltage (IN-to-/IN) 0.1 VCC + 0.3 V
VIL Input LO W Voltage (IN-to-/IN) −0.3 VIH – 0.1 V
VIN Input Voltage Swing (IN-to-/IN) Note 8, see Figure 4. 0.1 VCC V
VDIFF_IN Differential Input Voltage Note 8, see Figure 5. 0.2 V
|IIN| Input Current (IN, /IN) Note 8. 45 mA
VREF-AC Reference Voltage VCC − 1.525 VCC − 1.425 VCC − 1.325 V
Notes:
4. Permanent device dam age may occur if absolute maximum ratings are exceeded. This is a stress rating only and funct i onal operati on is not impli ed
at conditions other than thos e detailed in the operati onal sections of this data sheet. Exposure to absol ute maximum rating conditions for extended
periods may affect device reliabi l i ty.
5. The data sheet limits are not guaranteed if the device is operated beyond the operating rati ngs.
6. Package t hermal resist ance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. ψJB and θJA values
are determined for a 4-layer board in still-air num ber, unless otherwise stated.
7. The ci rcuit is designed to meet the DC specifications shown in the above table after therm al equili bri um has been establis hed.
8. Due to the internal term i nation (see "Input Buff er Structure" section) the input current depends on the applied voltages at IN, /IN and VT inputs. Do
not apply a combination of voltages that causes the input current to exceed the maximum limit.
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SY89833L
LVDS Outputs DC Electrical Characteristics(9)
VCC = 3.3V±10%, RL = 100Ω across the outputs; TA = -40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
VOUT Output Voltage Swing See Figure 4. 250 325 mV
VDIFF_OUT Differential Output Voltage Swing See Figure 5. 500 650 mV
VOCM Output Common Mode Voltage 1.125 1.275 V
∆VOCM Change in Common Mode Voltage −50 50 mV
Note:
9. The ci rcuit is designed to meet the DC specifications shown in the above table after therm al equili bri um has been establ is hed.
LVTTL/CMOS DC Electrical Characteristics(9)
VCC = 3.3V±10%, TA = -40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
VIH Input HIGH Voltage 2.0 VCC V
VIL Input LO W Voltage 0 0.8 V
IIH Input HIGH Current −125 30 V
IIL Input LO W Current -300 mV
AC Electrical Characteristics(10)
VCC = 3.3V±10%, RL = 100Ω across the outputs; TA = -40°C to +85°C unless otherwise stated
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX Maximum Frequency VOUT ≥ 200mV 2.0 GHz
tpd Propagation Delay IN-to-Q VIN < 400mV 400 500 600 ps
VIN ≥ 400mV 330 440 530 ps
tSKEW Within-Device Skew Note 11 4 20 ps
Part-to-Part Skew Note 12 200 ps
tS Set-up Time EN to IN, /IN Note 13 300 ps
tH Hold Time EN to IN, /IN Note 13 500 ps
tJITTER Additiv e Jitt er O utput = 622M Hz
Integration Range: 12kHz – 20MHz 98 fs
tr, tf Output Rise/Fall Times
(20% to 80%) At full output swing. 60 110 190 ps
Notes:
10. High-frequency AC parameters are guaranteed by design and characteri zat i on.
11. Within device skew is measured between two different out puts under ident ic al input trans iti ons.
12. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective
inputs.
13. Set-up and hold times apply to synchronous appl ic ations t hat int end to enable/di sable before the next clock cycle. For asynchronous applications,
set-up and hold times do not apply.
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SY89833L
Input Stage
Figure 1. Simplified Differential Input Buffer
LVDS Outputs
LVDS specifies a small swing of 325mV typical, on a
nominal 1.20V common mode above ground. The
common-mode voltage has tight limits to permit large
variations in ground noise between a LVDS driver and
receiver.
Figure 2. LVDS Differential Measurement
Figure 3. LVDS Common Mode Measurement
Figure 4. Single-Ended Swing
Figure 5. Differential Swing
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SY89833L
Input Interface Applications
Figure 6. DC-Coupled CML
Input Interface
Figure 7. AC-Coupled CML
Input Interface
Figure 8. DC-Coupled LVPECL
Input Interface
Figure 9. AC-Coupled LVPECL
Input Interface Figure 10. LVDS Input Interface Figure 11. AC-Coupled LVDS
Input Interface
Note: Be certain that the LVD S driver
can be AC-coupled.
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SY89833L
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global manufacturer of IC s
olutions for t he worldwide high-performance linear and power, LAN, and timing & communicati
ons
markets. The Company’s products include advanced mixed
-signal, analog & power semiconductors; high-
performance communication, clock
management,
MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs.
Company
customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and comp
uter products.
Corporation headquarters and state
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advanced technol ogy design centers situat ed throughout the Americas, E urope, and Asia.
Additionally, the Company maintains an extensive network
of distribut ors and reps worldwide.
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entations or warranties with respect to the accuracy or completeness of the information furnished in this data
sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use.
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circuitry,
specifications and descriptions at any time without notice.
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