LM614
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LM614 Quad Operational Amplifier and Adjustable Reference
Check for Samples: LM614
1FEATURES DESCRIPTION
The LM614 consists of four op-amps and a
23Op Amp programmable voltage reference in a 16-pin package.
Low Operating Current: 450μAThe op-amp out-performs most single-supply op-
Wide Supply Voltage Range: 4V to 36V amps by providing higher speed and bandwidth along
with low supply current. This device was specifically
Wide Common-Mode Range: V to (V+1.8V) designed to lower cost and board space requirements
Wide Differential Input Voltage: ±36V in transducer, test, measurement and data acquisition
Reference systems.
Adjustable Output Voltage: 1.2V to 5.0V Combining a stable voltage reference with four wide
Initial Tolerance: ±2.0% output swing op-amps makes the LM614 ideal for
single supply transducers, signal conditioning and
Wide Operating Current Range: 17μA to bridge driving where large common-mode-signals are
20mA common. The voltage reference consists of a reliable
Tolerant of Load Capacitance band-gap design that maintains low dynamic output
impedance (1Ωtypical), initial tolerance (2.0%), and
APPLICATIONS the ability to be programmed from 1.2V to 5.0V via
two external resistors. The voltage reference is very
Transducer Bridge Driver and Signal stable even when driving large capacitive loads, as
Processing are commonly encountered in CMOS data acquisition
Process and Mass Flow Control Systems systems.
Power Supply Voltage Monitor As a member of TI's new Super-Block™ family, the
Buffered Voltage References for A/D's LM614 is a space-saving monolithic alternative to a
multichip solution, offering a high level of integration
without sacrificing performance.
Connection Diagram
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Super-Block is a trademark of dcl_owner.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM614
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Voltage on Any Pins except VR36V (Max)(3)
(referred to Vpin) 0.3V (Min)(4)
Current through Any Input Pin & VRPin ±20
Differential Input Voltage LM614I ±36V
LM614C ±32V
Storage Temperature Range 65°C TJ+150°C
Maximum Junction Temperature 150°C
Thermal Resistance, Junction-to-Ambient(5) 150°C
Soldering Information (Soldering, 10 sec.) 220°C
ESD Tolerance(6) ±1kV
(1) Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Input voltage above V+ is allowed.
(4) More accurately, it is excessive current flow, with resulting excess heating, that limits the voltages on all pins. When any pin is pulled a
diode drop below V, a parasitic NPN transistor turns ON. No latch-up will occur as long as the current through that pin remains below
the Maximum Rating. Operation is undefined and unpredictable when any parasitic diode or transistor is conducting.
(5) Junction temperature may be calculated using TJ = TA + P DθjA. The given thermal resistance is worst-case for packages in sockets in
still air. For packages soldered to copper-clad board with dissipation from one comparator or reference output transistor, nominal θjA is
90°C/W for the DW package.
(6) Human body model, 100 pF discharged through a 1.5 kΩresistor.
Operating Temperature Range
LM614I 40°C TJ+85°C
LM614C 0°C TJ+70°C
Electrical Characteristics
These specifications apply for V= GND = 0V, V+= 5V, VCM = VOUT = 2.5V, IR= 100μA, FEEDBACK pin shorted to GND,
unless otherwise specified. Limits in standard typeface are for TJ= 25°C; limits in Boldface type apply over the Operating
Temperature Range.
Symbol Parameter Conditions Typ(1) LM614I Units
LM614C
Limits(2)
ISTotal Supply Current RLOAD =, 450 1000 μA max
4V V+36V (32V for LM614C) 550 1070 μA max
VSSupply Voltage Range 2.2 2.8 V min
2.9 3 V min
46 32 V max
43 32 V max
OPERATIONAL AMPLIFIER
VOS1 VOS Over Supply 4V V+36V 1.5 5.0 mV max
(4V V+32V for LM614C) 2.0 7.0 mV max
VOS2 VOS Over VCM VCM = 0V through VCM = 1.0 5.0 mV max
(V +1.8V), V+= 30V 1.5 7.0 mV max
VOS3 Average VOS Drift See (2) μV/°C
15
ΔT max
IBInput Bias Current 10 35 nA max
11 40 nA max
IOS Input Offset Current 0.2 4 nA max
0.3 5 nA max
(1) Typical values in standard typeface are for TJ = 25°C; values in boldface type apply for the full operating temperature range. These
values represent the most likely parametric norm.
(2) All limits are ensured at room temperature (standard type face) or at operating temperature extremes (bold type face).
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Electrical Characteristics (continued)
These specifications apply for V= GND = 0V, V+= 5V, VCM = VOUT = 2.5V, IR= 100μA, FEEDBACK pin shorted to GND,
unless otherwise specified. Limits in standard typeface are for TJ= 25°C; limits in Boldface type apply over the Operating
Temperature Range.
Symbol Parameter Conditions Typ(1) LM614I Units
LM614C
Limits(2)
IOS1 Average Offset 4pA/°C
ΔT Drift Current
RIN Input Resistance Differential 1800 MΩ
Common-Mode 3800 MΩ
CIN Input Capacitance Common-Mode Input 5.7 pF
enVoltage Noise f = 100 Hz, Input Referred 74 nV/Hz
InCurrent Noise f = 100 Hz, Input Referred 58 fA/Hz
CMRR Common-Mode V += 30V, 0V VCM (V+1.8V), 95 75 dB min
Rejection Ratio CMRR = 20 log (ΔVCM/ΔVOS)90 70 dB min
PSRR Power Supply 4V V+30V, VCM = V+/2, 110 75 dB min
Rejection Ratio PSRR = 20 log (ΔV+/ΔVOS)100 70 dB min
AVOpen Loop R L= 10 kΩto GND, V+= 30V, 500 94 V/mV
Voltage Gain 5V VOUT 25V 50 40 min
SR Slew Rate V += 30V(3) ±0.70 ±0.50 V/μs
±0.65 ±0.45
GBW Gain Bandwidth C L= 50 pF 0.8 MHz
0.52 MHz
VO1 Output Voltage R L= 10 kΩto GND V +1.4 V +1.8 V min
Swing High V += 36V (32V for LM614C) V+1.6 V+1.9 V min
VO2 Output Voltage R L= 10 kΩto V+V+ 0.8 V + 0.95 V max
Swing Low V += 36V (32V for LM614C) V+ 0.9 V+ 1.0 V max
IOUT Output Source V OUT = 2.5V, V+IN = 0V, 25 16 mA min
VIN =0.3V 15 13 mA min
ISINK Output Sink V OUT = 1.6V, V+IN = 0V, 17 13 mA min
Current V IN = 0.3V 9 8 mA min
ISHORT Short Circuit Current V OUT = 0V, V+IN = 3V, 30 50 mA max
VIN = 2V, Source 40 60 mA max
VOUT = 5V, V+IN = 2V, 30 70 mA max
VIN = 3V, Sink 32 90 mA max
VOLTAGE REFERENCE
VRVoltage Reference See (4) 1.244 1.2191 V min
1.2689 V max
2.0%)
ΔVRAverage Temperature Drift See (5) 10 150 PPM/°C
ΔT max
ΔVRHysteresis See (6) 3.2 μV/°C
ΔTJVRChange V R(100 μA) VR(17 μA) 0.05 1 mV max
with Current 0.1 1.1 mV max
ΔVR
ΔIRVR(10 mA) VR(100 μA)(7) 1.5 5 mV max
2.0 5.5 mV max
(3) Slew rate is measured with op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from 5V to 25V,
and the output voltage transition is sampled at 10V and @20V. For falling slew rate, the input voltage is driven from 25V to 5V, and the
output voltage transition is sampled at 20V and 10V.
(4) VRis the Cathode-feedback voltage, nominally 1.244V.
(5) Average reference drift is calculated from the measurement of the reference voltage at 25°C and at the temperature extremes. The drift,
in ppm/°C, is 106ΔVR/(VR[25°C] ΔTJ), where ΔVRis the lowest value subtracted from the highest, VR[25°C] is the value at 25°C, and ΔTJ
is the temperature range. This parameter is ensured by design and sample testing.
(6) Hysteresis is the change in VRcaused by a change in TJ, after the reference has been “dehysterized”. To dehysterize the reference; that
is minimize the hysteresis to the typical value, cycle its junction temperature in the following pattern, spiraling in toward 25°C: 25°C,
85°C, 40°C, 70°C, 0°C, 25°C.
(7) Low contact resistance is required for accurate measurement.
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Electrical Characteristics (continued)
These specifications apply for V= GND = 0V, V+= 5V, VCM = VOUT = 2.5V, IR= 100μA, FEEDBACK pin shorted to GND,
unless otherwise specified. Limits in standard typeface are for TJ= 25°C; limits in Boldface type apply over the Operating
Temperature Range.
Symbol Parameter Conditions Typ(1) LM614I Units
LM614C
Limits(2)
R Resistance ΔVR(100.1 mA)/9.9 mA 0.2 0.56 Ωmax
0.6 13 Ωmax
ΔVR(10017 μA)/83 μA
ΔVRVRChange V R(Vro = Vr) VR(Vro = 5.0V) 2.5 7 mV max
AVRO with High VRO (3.76V between Anode and FEEDBACK) 2.8 10 mV max
VRChange with V R(V + = 5V) VR(V + = 36V) 0.1 1.2 mV max
V+Change (V+= 32V for LM614C) 0.1 1.3 mV max
ΔVR
ΔV+ VR(V + = 5V) VR(V + = 3V) 0.01 1 mV max
0.01 1.5 mV max
IFB FEEDBACK Bias Current V ANODE VFB 5.06V 22 50 nA max
29 55 nA max
enVoltage Noise BW = 10 Hz to 10 kHz, VRO = VR30 μVRMS
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Typical Performance Characteristics (Reference)
TJ= 25°C, FEEDBACK pin shorted to V= 0V, unless otherwise noted
Reference Voltage vs Temperature
on 5 Representative Units Reference Voltage Drift
Figure 1. Figure 2.
Accelerated Reference Voltage Drift vs. Time Reference Voltage vs. Current and Temperature
Figure 3. Figure 4.
Reference Voltage vs. Current and Temperature Reference Voltage vs. Reference Current
Figure 5. Figure 6.
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Typical Performance Characteristics (Reference) (continued)
TJ= 25°C, FEEDBACK pin shorted to V= 0V, unless otherwise noted
Reference Voltage vs. Reference Current Reference AC Stability Range
Figure 7. Figure 8.
FEEDBACK Current vs. FEEDBACK-to-Anode Voltage FEEDBACK Current vs. FEEDBACK-to-Anode Voltage
Figure 9. Figure 10.
Reference Noise Voltage vs. Frequency Reference Small-Signal Resistance vs. Frequency
Figure 11. Figure 12.
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Typical Performance Characteristics (Reference) (continued)
TJ= 25°C, FEEDBACK pin shorted to V= 0V, unless otherwise noted
Reference Power-Up Time Reference Voltage with FEEDBACK Voltage Step
Figure 13. Figure 14.
Reference Voltage with 10012 μA Current Step Reference Step Response for 100 μA 10 mA Current Step
Figure 15. Figure 16.
Reference Voltage Change with Supply Voltage Step
Figure 17.
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Typical Performance Characteristics (Op Amps)
V+= 5V, V= GND = 0V, VCM = V+/2, VOUT = V+/2, TJ= 25°C, unless otherwise noted
Input Common-Mode Voltage Range vs. Temperature VOS vs. Junction Temperature on 9 Representative Units
Figure 18. Figure 19.
Input Bias Current vs. Common-Mode Voltage Slew Rate vs. Temperature and Output Sink Current
Figure 20. Figure 21.
Large-Signal Step Response Output Voltage Swing vs. Temp. and Current
Figure 22. Figure 23.
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Typical Performance Characteristics (Op Amps) (continued)
V+= 5V, V= GND = 0V, VCM = V+/2, VOUT = V+/2, TJ= 25°C, unless otherwise noted
Output Source Current vs. Output Voltage and Temp. Output Sink Current vs. Output Voltage and Temp.
Figure 24. Figure 25.
Output Swing, Large Signal Output Impedance vs. Frequency and Gain
Figure 26. Figure 27.
Small-Signal Pulse Response vs. Temp. Small-Signal Pulse Response vs. Load
Figure 28. Figure 29.
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Typical Performance Characteristics (Op Amps) (continued)
V+= 5V, V= GND = 0V, VCM = V+/2, VOUT = V+/2, TJ= 25°C, unless otherwise noted
Op Amp Voltage Noise vs. Frequency Op Amp Current Noise vs. Frequency
Figure 30. Figure 31.
Small-Signal Voltage Gain vs. Frequency and Temperature Small-Signal Voltage Gain vs. Frequency and Load
Figure 32. Figure 33.
Follower Small-Signal Frequency Response Common-Mode Input Voltage Rejection Ratio
Figure 34. Figure 35.
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Typical Performance Characteristics (Op Amps) (continued)
V+= 5V, V= GND = 0V, VCM = V+/2, VOUT = V+/2, TJ= 25°C, unless otherwise noted
Power Supply Current vs. Power Supply Voltage Positive Power Supply Voltage Rejection Ratio
Figure 36. Figure 37.
Negative Power Supply Voltage Rejection Ratio Input Offset Current vs. Junction Temperature
Figure 38. Figure 39.
Input Bias Current vs. Junction Temperature
Figure 40.
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Typical Performance Distributions
Average VOS Drift Industrial Temperature Range Average VOS Drift Commercial Temperature Range
Figure 41. Figure 42.
Average IOS Drift Industrial Temperature Range Average IOS Drift Commercial Temperature Range
Figure 43. Figure 44.
Voltage Reference Broad-BandNoise Distribution Op Amp Voltage Noise Distribution
Figure 45. Figure 46.
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Typical Performance Distributions (continued)
Op Amp Current Noise Distribution
Figure 47.
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APPLICATION INFORMATION
VOLTAGE REFERENCE
Reference Biasing
The voltage reference is of a shunt regulator topology that models as a simple zener diode. With current Ir
flowing in the “forward” direction there is the familiar diode transfer function. Irflowing in the reverse direction
forces the reference voltage to be developed from cathode to anode. The cathode may swing from a diode drop
below Vto the reference voltage or to the avalanche voltage of the parallel protection diode, nominally 7V. A
5.0V reference with V+= 3V is allowed.
Figure 48. Voltages Associated with Reference
(Current Source Iris External)
The reference equivalent circuit reveals how Vris held at the constant 1.2V by feedback, and how the
FEEDBACK pin passes little current.
To generate the required reverse current, typically a resistor is connected from a supply voltage higher than the
reference voltage. Varying that voltage, and so varying Ir, has small effect with the equivalent series resistance of
less than an ohm at the higher currents. Alternatively, an active current source, such as the LM134 series, may
generate Ir.
Figure 49. Reference Equivalent Circuit
Figure 50. 1.2V Reference
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Capacitors in parallel with the reference are allowed. See Reference AC Stability Range typical curve for
capacitance values—from 20 μA to 3 mA any capacitor value is stable. With the reference's wide stability range
with resistive and capacitive loads, a wide range of RC filter values will perform noise filtering.
Adjustable Reference
The FEEDBACK pin allows the reference output voltage, Vro, to vary from 1.24V to 5.0V. The reference attempts
to hold Vrat 1.24V. If Vris above 1.24V, the reference will conduct current from Cathode to Anode; FEEDBACK
current always remains low. If FEEDBACK is connected to Anode, then Vro = Vr= 1.24V. For higher voltages
FEEDBACK is held at a constant voltage above Anode—say 3.76V for Vro = 5V. Connecting a resistor across the
constant Vrgenerates a current I=Vr/R1 flowing from Cathode into FEEDBACK node. A Thevenin equivalent
3.76V is generated from FEEDBACK to Anode with R2=3.76/I. For a 1% error, use R1 such that I is greater than
one hundred times the FEEDBACK bias current. For example, keep I 5.5μA.
Figure 51. Thevenin Equivalent
of Reference with 5V Output
R1 = Vr/I = 1.24/32μ= 39k
R2 = R1 {(Vro/Vr) 1} = 39k {(5/1.24) 1)} = 118k
Figure 52. Resistors R1 and R2 Program
Reference Output Voltage to be 5V
Understanding that Vris fixed and that voltage sources, resistors, and capacitors may be tied to the FEEDBACK
pin, a range of Vrtemperature coefficients may be synthesized.
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Figure 53. Output Voltage has Negative Temperature
Coefficient (TC) if R2 has Negative TC
Figure 54. Output Voltage has Positive TC
if R1 has Negative TC
Figure 55. Diode in Series with R1 Causes Voltage
across R1 and R2 to be Proportional to
Absolute Temperature (PTAT)
Connecting a resistor across Cathode-to-FEEDBACK creates a 0 TC current source, but a range of TCs may be
synthesized.
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I = Vr/R1 = 1.24/R1
Figure 56. Current Source is Programmed by R1
Figure 57. Proportional-to-Absolute-Temperature
Current Source
Figure 58. Negative-TC Current Source
Hysteresis
The reference voltage depends, slightly, on the thermal history of the die. Competitive micro-power products
vary—always check the data sheet for any given device. Do not assume that no specification means no
hysteresis.
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OPERATIONAL AMPLIFIERS
Any amp or the reference may be biased in any way with no effect on the other amps or reference, except when
a substrate diode conducts (see Electrical Characteristics). One amp input may be outside the common-mode
range, another amp may be operated as a comparator, another with all terminals floating with no effect on the
others (tying inverting input to output and non-inverting input to Von unused amps is preferred). Choosing
operating points that cause oscillation, such as driving too large a capacitive load, is best avoided.
Op Amp Output Stage
These op amps, like their LM124 series, have flexible and relatively wide-swing output stages. There are simple
rules to optimize output swing, reduce cross-over distortion, and optimize capacitive drive capability:
1. Output Swing: Unloaded, the 42μA pull-down will bring the output within 300 mV of Vover the military
temperature range. If more than 42μA is required, a resistor from output to Vwill help. Swing across any
load may be improved slightly if the load can be tied to V+, at the cost of poorer sinking open-loop voltage
gain
2. Cross-over Distortion: The LM614 has lower cross-over distortion (a 1 VBE deadband versus 3 VBE for the
LM124), and increased slew rate as shown in the characteristic curves. A resistor pull-up or pull-down will
force class-A operation with only the PNP or NPN output transistor conducting, eliminating cross-over
distortion
3. Capacitive Drive: Limited by the output pole caused by the output resistance driving capacitive loads, a pull-
down resistor conducting 1 mA or more reduces the output stage NPN reuntil the output resistance is that of
the current limit 25Ω. 200pF may then be driven without oscillation.
Op Amp Input Stage
The lateral PNP input transistors, unlike most op amps, have BVEBO equal to the absolute maximum supply
voltage. Also, they have no diode clamps to the positive supply nor across the inputs. These features make the
inputs look like high impedances to input sources producing large differential and common-mode voltages.
Typical Applications
Figure 59. Simple Low Quiescent Drain Voltage Regulator.
Total supply current approximately 320μA, when VIN = +5V.
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*10k must be low
t.c. trimpot.
Figure 60. Ultra Low Noise 10.00V Reference.
Total output noise is typically 14μVRMS.
VOUT = (R1/Pe + 1) V REF
R1, R2should be 1% metal film
Pβshould be low T.C. trim pot
Figure 61. Slow Rise Time Upon Power-Up, Adjustable Transducer Bridge Driver.
Rise time is approximately 1ms.
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(1) Set zero code voltage, then adjust 10Ωgain adjust pot for full scale.
Figure 62. Transducer Data Acquisition System.
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Simplified Schematic Diagrams
Figure 63. Op Amp
Figure 64. Reference / Bias
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REVISION HISTORY
Changes from Revision B (March 2013) to Revision C Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 21
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM614 MDC ACTIVE DIESALE Y 0 100 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85
LM614CWM/NOPB LIFEBUY SOIC DW 16 45 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR 0 to 70 LM614CWM
LM614IWM/NOPB LIFEBUY SOIC DW 16 45 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR 0 to 70 LM614IWM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Aug-2017
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
DW 16 SOIC - 2.65 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
4040000-2/H
www.ti.com
PACKAGE OUTLINE
C
TYP
10.63
9.97
2.65 MAX
14X 1.27
16X 0.51
0.31
2X
8.89
TYP
0.33
0.10
0 - 8 0.3
0.1
(1.4)
0.25
GAGE PLANE
1.27
0.40
A
NOTE 3
10.5
10.1
BNOTE 4
7.6
7.4
4220721/A 07/2016
SOIC - 2.65 mm max heightDW0016A
SOIC
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.
5. Reference JEDEC registration MS-013.
116
0.25 C A B
9
8
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 1.500
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ALL AROUND 0.07 MIN
ALL AROUND
(9.3)
14X (1.27)
R0.05 TYP
16X (2)
16X (0.6)
4220721/A 07/2016
SOIC - 2.65 mm max heightDW0016A
SOIC
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
OPENING
SOLDER MASK METAL
SOLDER MASK
DEFINED
LAND PATTERN EXAMPLE
SCALE:7X
SYMM
1
89
16
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
R0.05 TYP
16X (2)
16X (0.6)
14X (1.27)
(9.3)
4220721/A 07/2016
SOIC - 2.65 mm max heightDW0016A
SOIC
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:7X
SYMM
SYMM
1
89
16
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