SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
features
DPower-On Reset Generator with Fixed
Delay Time of 200 ms, no External
Capacitor Needed
DPrecision Supply Voltage Monitor 2.5 V, 3 V,
3.3 V, and 5 V
DPin-For-Pin Compatible with the MAX705
through MAX708 Series
DIntegrated Watchdog Timer (TPS3705 only)
DVoltage Monitor for Power-Fail or
Low-Battery Warning
DMaximum Supply Current of 50 µA
DMSOP-8 and SO-8 Packages
DTemperature Range ...−40°C to 85°C
typical applications
DDesigns Using DSPs, Microcontrollers or
Microprocessors
DIndustrial Equipment
DProgrammable Controls
DAutomotive Systems
DPortable/Battery Powered Equipment
DIntelligent Instruments
DWireless Communication Systems
DNotebook/Desktop Computers
Figure 1. Typical MSP430 Application
MR RESET
TPS3705−50
PFI
VDD
GND
100 nF RESET/NMI
VDD
GND
5 V12 V
910 kΩ
120 kΩ
MSP430P112
PFO
WDI
WDO I/O
I/O
Copyright 1999−2005, Texas Instruments Incorporated
! " #$%! " &$'(#! )!%*
)$#!" # ! "&%##!" &% !+% !%" %" "!$%!"
"!)) ,!-* )$#! &#%"". )%" ! %#%""(- #($)%
!%"!. (( &%!%"*
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
MR
VDD
GND
PFI
WDO
RESET
WDI
PFO
TPS3705 ...D PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
RESET
RESET
NC
PFO
TPS3707 ...D PACKAGE
(TOP VIEW)
NC − No internal connection
MR
VDD
GND
PFI
1
2
3
4
8
7
6
5
RESET
WDO
MR
VDD
WDI
PFO
PFI
GND
TPS3705 . . . DGN PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
NC
PFO
PFI
GND
TPS3707 . . . DGN PACKAGE
(TOP VIEW)
NC − No internal connection
RESET
RESET
MR
VDD
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description
The TPS3705, TPS3707 family of microprocessor supply-voltage supervisors provide circuit initialization and
timing supervision, primarily for DSP and processor-based systems.
During power- o n , RESET is asserted when the supply voltage V DD becomes higher than 1.1 V. Thereafter , t he
supply voltage supervisor monitors VDD and keeps RESET active as long as VDD remains below the threshold
voltage V IT+. An internal timer delays the return of the output to the inactive state (high) to ensure proper system
reset. The delay time, td typ = 200 ms, starts after VDD has risen above the threshold voltage VIT+. When the supply
voltage drops below the threshold voltage VIT– , the output becomes active (low) again. No external components
are required. All the devices of this family have a fixed-sense threshold voltage VIT– set by an internal voltage
divider.
The TPS3705-xx and TPS3707-xx devices incorporate a manual reset input, MR. A low level at MR causes
RESET to become active.
The TPS370x-xx families integrate a power-fail comparator which can be used for low-battery detection,
power-fail warning, or for monitoring a power supply other than the main supply.
The TPS3705-xx devices have a watchdog timer that is periodically triggered by a positive or negative transition
at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,
tt(out) = 1.6 s, WDO becomes active. This event also reinitializes the watchdog timer. Leaving WDI unconnected
disables the watchdog.
The TPS3707-xx devices do not have the Watchdog function, but include a high-level output RESET.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in
either 8-pin MSOP or standard SOIC packages. The TPS3705, TPS3707 devices are characterized for
operation over a temperature range of −40°C to 85°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
TATHRESHOLD
VOLTAGE SMALL OUTLINE
(D)
POWER−PAD
µ-SMALL OUTLINE
(DGN)
MARKING DGN
PACKAGE CHIP FORM
(Y)
2.63 V TPS3705−30D TPS3705−30DGN TIAAT TPS3705-30Y
2.93 V TPS3705−33D TPS3705−33DGN TIAAU TPS3705−33Y
4.55 V TPS3705−50D TPS3705−50DGN TIAAV TPS3705−50Y
−40°C to 85°C2.25 V TPS3707−25D TPS3707−25DGN TIAAW TPS3707−25Y
−40 C to 85 C
2.63 V TPS3707−30D TPS3707−30DGN TIAAX TPS3707−30Y
2.93 V TPS3707−33D TPS3707−33DGN TIAAY TPS3707−33Y
4.55 V TPS3707−50D TPS3707−50DGN TIAAZ TPS3707−50Y
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Function Tables
TRUTH TABLE, TPS3705
MR VDD>VIT RESET TYPICAL
DELAY
H→L 1 H→L30 ns
L→H1L→H200 ms
H 1→0H→L3 µs
H 0→1 L→H200 ms
TRUTH TABLE, TPS3707
MR VDD>VIT RESET RESET TYPICAL
DELAY
H→L 1 H→L L→H30 ns
L→H1L→H H→L 200 ms
H 1→0H→L L→H3 µs
H 0→1 L→H H→L200 ms
TRUTH TABLE, TPS370x
PFI>VIT PFO TYPICAL
DELAY
0→1 L→H0.5 µs
1→0 H→L0.5 µs
functional block diagram
Reset
Logic + T imer
_
+
_
+
R1
R2
14 kΩ
Reference
Voltage
of 1.25 V
Watchdog
Logic + Timer
Oscillator
40 kΩ
Transition
Detection
VDD
MR
GND
PFI
WDI
RESET
RESET
PFO
WDO
Only
TPS3705
Only
TPS3707
Only
TPS3705
TPS3705
TPS3707
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing diagrams
t
t
t
VDD
5 V
4.5 V
1.1 V
0 V
MR
5 V
4.5 V
1.1 V
0 V
RESET
5 V
4.5 V
1.1 V
0 V
t dt dt d
Undefined Behavior
t
WDI
5 V
4.5 V
1.1 V
0 V
t
WDO
5 V
4.5 V
1.1 V
0 V
t t(out)
Don’t Care
Don’t Care
Don’t Care
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS370xY chip information
These chips, when properly assembled, display characteristics similar to those of the TPS370x. Thermal
compression or ultrasonic bonding may be caused on the doped-aluminum bonding pads. The chips may be
mounted with conductive epoxy or a gold-silicon preform.
TPS3705Y
TPS3707Y
(1)
(2)
(3)
(8)
(6)
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 10 MILS TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJ max = 150°C
TOLERANCES ARE ±10%
ALL DIMENSIONS ARE IN MILS
46
50
(4)
(7)
(5)
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
MR 1 I Manual reset
VDD 2 Supply voltage
GND 3 Ground
PFI 4 I Power-fail comparator input
PFO 5 O Power-fail comparator output
WDI TPS3705
6
IWatchdog timer input
NC TPS3707 6No internal connection
RESET 7 O Active-low reset output
WDO TPS3705
8
OWatchdog timer output
RESET TPS3707 8OActive-high reset output
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VDD (see Note1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PFI voltage range, VPFI −0.3 V to VDD + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
All other pins (see Note 1) −0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum low output current, IOL 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum high output current, IOH −5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VDD)±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VDD)±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA−40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soldering temperature 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute−maximum−rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000h
continuously.
DISSIPATION RATING TABLE
PACKAGE TA <25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
DGN
D2.14 W
725 mW 17.1 mW/_C
5.8 mW/_C1.37 W
464 mW 1.11 W
377 mW
recommended operating conditions at specified temperature range
MIN MAX UNIT
Supply voltage, VDD 2 6 V
Input voltage, VI0 VDD+0.3 V
High-level input voltage, VIH 0.7×VDD V
Low-level input voltage, VIL 0.3×VDD V
Input transition rise and fall rate at MR or WDI, ∆t/∆V 100 ns/V
Operating free-air temperature range, TA−40 85 _C
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS370x-xx VDD = 1.1 V IOH = −4 µA 0.8
TPS3707-25
VDD = VIT+ + 0.2 V,
TPS370x-30 VDD = VIT+ + 0.2 V,
IOH = −500 µA
0.7×V
DD
VOH High-level output voltage TPS370x-33
IOH = −500
µ
A
0.7 VDD
V
VOH
High-level output voltage
TPS370x-50 VDD = VIT+ + 0.2 V,
IOH = −800 µA
VDD −1.5 V
V
TPS370x-xx VDD = 6 V, IOH = −800 µA
VDD −1.5 V
TPS3707-25
TPS370x-30 V
DD
= V
IT+
+0.2 V, I
OL
= 1 mA 0.3 V
VOL
Low-level output voltage
TPS370x-33
VDD = VIT++0.2 V, IOL = 1 mA
0.3
V
V
OL
Low-level output voltage
TPS370x-50 VDD = VIT++0.2 V,
IOL = 2.5 mA
0.4
V
TPS370x-xx VDD = 6 V IOL = 3 mA
0.4
V
Power-up reset voltage (see Note 2) VDD ≥1.1 V, IOL = 50 µA 0.3 V
TPS3707-25 2.20 2.25 2.30
TPS370x-30
TA = 0°C to 85°C
2.57 2.63 2.68
V
TPS370x-33
T
A
= 0
°
C to 85
°
C
2.87 2.93 2.98
V
Negative-going input
TPS370x-50 4.45 4.55 4.63
V
IT−
Negative-going input
threshold voltage
(see Note 3)
TPS3707-25 2.20 2.25 2.32
VIT−
threshold voltage
(see Note 3) TPS370x-30
TA = −40°C to 85°C
2.57 2.63 2.70
V
TPS370x-33
T
A
= −40
°
C to 85
°
C
2.87 2.93 3.0
V
TPS370x-50 4.45 4.55 4.65
PFI TPS370x-xx VDD ≥ 2 V, TA = −40°C to 85°C 1.20 1.25 1.30 V
TPS3707-25 40
VDD
TPS370x-30 50
V
hys
Hysteresis
V
DD TPS370x-33 50 mV
Vhys
Hysteresis
TPS370x-50 70
mV
PFI TPS370x-xx 10
IIH(AV) Average high-level input
current
WDI
WDI = VDD = 6 V,
Time average (dc = 88%) 100 150 µA
IIL(AV) Average low-level input
current
WDI
WDI = 0 V, VDD = 6 V,
Time average (dc = 12%) −15 −20 µA
IIH
High-level input current
WDI WDI = VDD = 6 V 120 170
µA
I
IH
High-level input current
MR MR = 0.7×VDD, VDD = 6 V −130 −180 µ
A
IIL
Low-level input current
WDI WDI = 0 V, VDD = 6 V −120 −170
µA
I
IL
Low-level input current
MR MR = 0 V, VDD = 6 V −430 −600 µ
A
IIInput current PFI VDD = 6 V, 0 V ≤ VI ≤ VDD −1 0 1 µA
IDD
Supply current
TPS3707-xx VDD = 2 V to 6 V, MR = VDD, MR,
WDI and outputs unconnected 20 50 µA
I
DD
Supply current
TPS3705-xx VDD = 2 V to 6 V, MR= VDD, MR,
WDI and outputs unconnected 30 50 µA
CiInput capacitance VI = 0 V to VDD 5 pF
NOTES: 2. The lowest supply voltage at which RESET becomes active. tr,VDD ≥15 µs/V
3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near to the supply terminals.
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
at VDD VDD = VIT+ + 0.2 V, VDD = VIT−−0.2 V 6µs
t
w
Pulse width at MR VDD ≥VIT++ 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 ×VDD 100 ns
tw
Pulse width
at WDI VDD ≥VIT++ 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 ×VDD 100 ns
switching characteristics at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tt(out) Watchdog time out VDD ≥VIT+ + 0.2 V,
See timing diagram 1.1 1.6 2.3 s
tdDelay time VDD > VIT+ + 0.2 V,
See timing diagram 140 200 280 ms
tPHL Propagation (delay) time, high-to-low-level
output MR to RESET delay VDD ≥VIT+ + 0.2 V,
VIL = 0.3 ×VDD
50 250
ns
tPLH Propagation (delay) time, low-to-high-level
output MR to RESET delay
(TPS3707−xx only)
DD IT+
V
IL
= 0.3
×
V
DD
VIH = 0.7 × VDD 50 250
ns
tPHL Propagation (delay) time, high-to-low-level
output VDD to RESET delay 3 5
s
tPLH Propagation (delay) time, low-to-high-level
output VDD to RESET delay
(TPS3707-xx only) 3 5 µs
tPHL Propagation (delay) time, high-to-low-level
output
PFI to PFO delay
VDD = 2 V to 6 V
0.5 1
s
tPLH Propagation (delay) time, low-to-high-level
output
PFI to PFO delay
VDD = 2 V to 6 V 0.5 1 µs
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
1
0.999
−40 −15 10 35
Normalized Input Threshold Voltage VIT(TA), VIT (25 )
1.001
NORMALIZED INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE AT VDD
1.002
60 85
VDD = 6 V
PFI = 1.05 V
MR = Open
T
A
− Free-Air Temperature − °C
C
°
Figure 2
Figure 3
−10
−30
−50
−0.5 0.5 2.5 3.5
− Supply Current −
10
30
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
50
4.5 6.51.5 5.5
PFI = 1.05 V
MR = Open
TA = 25°C
TPS3707−50
VDD − Supply Voltage − V
AµIDD
Figure 4
−200
−300
−400
−500−10123
− Input Current −
−100
0
INPUT CURRENT
vs
INPUT VOLTAGE AT MR
100
456
VI − Input Voltage at MR − V
IIA
µ
−40°C
85°C
VDD = 6 V
PFI = 1.05 V
SLVS184C − NOVEMBER 1998 − REVISED DECEMBER 2005
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 5
4
2
00 200 400 600
− Minimum Pulse Duration at
6
8
MINIMUM PULSE DURATION AT VDD
vs
VDD THRESHOLD OVERDRIVE
10
800 1000
PFI = 1.05 V
MR = Open
VDD − Threshold Overdrive − mV
VDD sµ
tw−
Figure 6
2
1
0.5
00−1−2−3−4−5−6
− High-Level Output Voltage − V
2.5
3
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
3.5
−7 −8 −9 −10
1.5 −40°C
85°C
VOH
IOH − High-Level Output Current − mA
VDD = 3.2 V
PFI = 1.05 V
MR = Open
Figure 7
3.5
2.5
1
00 −5 −10 −15
5
6
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
6.5
−20 −25 −30
5.5
4.5
4
3
2
1.5
0.5
−40°C
85°C
VDD = 6 V
PFI = 1.05 V
MR = Open
− High-Level Output Voltage − V
VOH
IOH − High-Level Output Current − mA
Figure 8
1.5
1
0.5
001234 67
− Low-Level Output Voltage − V
2
2.5
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
3
89 11 1351012
VOL
IOL − Low-Level Output Current − mA
−40°C
85°C
VDD = 2.67 V
PFI = 1.05 V
MR = Open
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS3705-30D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-30DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-30DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-30DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-30DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-30DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-33DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3705-50DR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
no Sb/Br)
TPS3705-50DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-25DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-30DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
Addendum-Page 2
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS3707-33DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-33DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS3707-50DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
Addendum-Page 3
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
Addendum-Page 4
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS3705-30DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3705-33DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS3705-33DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3705-50DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS3705-50DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3707-25DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS3707-25DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3707-30DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS3707-30DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3707-30DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3707-33DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Oct-2010
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS3707-33DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TPS3707-50DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS3707-50DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS3705-30DR SOIC D 8 2500 346.0 346.0 29.0
TPS3705-33DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3705-33DR SOIC D 8 2500 346.0 346.0 29.0
TPS3705-50DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3705-50DR SOIC D 8 2500 346.0 346.0 29.0
TPS3707-25DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3707-25DR SOIC D 8 2500 346.0 346.0 29.0
TPS3707-30DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3707-30DR SOIC D 8 2500 346.0 346.0 29.0
TPS3707-30DR SOIC D 8 2500 346.0 346.0 29.0
TPS3707-33DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3707-33DR SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Oct-2010
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS3707-50DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPS3707-50DR SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Oct-2010
Pack Materials-Page 3
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