Rev. 1.3 October 2012
www.aosmd.com
Page 1 of 18
AOZ1232-01
28V/6A Synchronous EZBuck
TM
Regulator
General Description
The AOZ1232-01 is a high-efficiency, easy-to-use DC/DC
synchronous buck regulator that operates up to 28V.
The device is capable of supplying 6A of continuous
output current with an output voltage adjustable down to
0.8V (±1.0%).
The AOZ1232-01 integrates an internal linear regulator
to generate 5. 3V VCC from input. If input voltage is lower
than 5.3V, the linear regulator operates at low drop-
output mode , whic h allo ws th e V CC voltage is equal to
input voltage minus the drop-output voltage of the
internal linear regulator.
A proprietary constant on-time PWM control wit h input
feed-forward result s in ultra- fast transient re sponse while
maintaining relatively constant switching frequency over
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.
The device featur es multiple protection f unctions such as
VCC under-voltage lockout, cycle-by-current limit, output
over-voltage protection, short-circuit protection, as well
as thermal shutdown.
The AOZ1232-01 is a v ailabl e in a 5 mm x 5m m QF N- 30L
package and is rated over a -40°C to +85°C ambient
temperature range.
Features
Wide input voltage range
– 2.7V to 28V
6A continuous output current
Output voltage adjustable down to 0.8V (±1.0%)
Low RDS(ON) internal NFETs
– 35m high-side
– 12m low-side SRFET™
Constant On-Time with input feed-forward
Programmable frequency up to 1MHz
Internal 5.3V/20mA linear regulator
Ceramic capacitor stable
Adjustable soft start
Power Good output
Integrated bootstrap diode
Cycle-by-cycle current limit
Short-circuit protection
Thermal shutdown
Thermally enhanced 5mm x 5mm QFN-30L package
Applications
Portable computers
Compact desktop PCs
Servers
Graphics cards
Set-top boxes
LCD TVs
Cable modems
Point-of-load DC/DC converters
Telecom/Networking/Datacom equipment
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 2 of 18
Typical Application for V
IN
= 12V or above
Typical Application for V
IN
= 5V
AOZ1232-01
Input = 12V or above
Output
C3
100μF
R1
R3
100kΩ
R2
C2
22μF
C5
0.1μF
IN
TONAIN
Analog Ground
Power Ground
Power Good
Off On
VCC
PGOOD
EN
SS
C
SS
R
TON
C4
1μF
BST
LX
FB
AGND
PGND
L1
AOZ1232-01
Input = 5V
Output
C3
100μF
R1
R3
100kΩ
R2
C2
22μF
C5
0.1μF
IN
TON
Analog Ground
Power Ground
Power Good
Off On
VCC
PGOOD
EN
SS
C
SS
R
TON
C4
1μF
BST
LX
FB
AGND
PGND
L1
AIN
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 3 of 18
Typical Application for High Light Load Efficiency Requirement or V
IN
= 2.7V ~ 6.5V
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Part Number Ambient Temperature Range Package Environmental
AOZ1232QI-01 -40°C to +85°C 30-Pin 5mm x 5mm QFN Green Product
AOZ1232-01
Input
C3
100μF
R1
R3
100kΩ
R2
C2
22μF
C5
0.1μF
IN
TON
Analog Ground
Power Ground
Power Good
Off On
VCC
PGOOD
EN
SS
C
SS
R
TON
C4
1μF
BST
LX
FB
AGND
PGND
L1
AIN
5V
Output
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 4 of 18
Pin Configuration
Pin Description
1
30 29 28 27 26 25 24 23
8 9 10 11 12 13 14
2
3
4
5
6
7
PGOOD
IN
IN
IN
IN
PGND
PGND
PGND
SS
AGND
VCC
BST
PGND
LX
LX
LX
EN
PFM
AGND
FB
TON
AIN
30-pin 5mm x 5mm QFN
(Top View)
22
21
20
18
17
16
15
LX
LX
LX
PGND
PGND
PGND
PGND
PGND
LX
IN
AGND
19
Pin Number Pin Name Pin Function
1 PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 10% lower than
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
2EN
Enable Input. The AOZ1232-01 is enabled when EN is pulled high. The device shuts
down when EN is pulled low.
3PFM
PFM Selection Input. Connect PF M pin to VCC/VIN for forced PWM operation. Conn ect
PFM pin to ground for PFM operation to improve light load efficiency.
4, 29 AGND Analog Ground.
5FB
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7 AIN Supply Input for analog functions.
8, 9, 10, 11 IN Supply Input. IN is the regulator input. All IN pins must be connected together.
12, 13, 14, 15, 16,
17, 18, 19, 26 PGND Power Ground.
20, 21, 22, 23,
24, 25 LX Switching Node.
27 BST Bootstrap Capacitor Connection. The AOZ1232-01 includes an internal bootstrap diode.
Connect an external capacitor between BST and LX as shown in the Typical Application
diagrams.
28 VCC Output for internal linear regulator. Bypass VCC to AGND with a 1µF ceramic capacitor.
Place the capacitor close to VCC pin.
30 SS Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 5 of 18
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may da mage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k
in series with 100pF.
2. LX to PGND Transient (t<20ns) ------ -7V to V
IN
+ 7V.
Maximum Operating Ratings
The device is not guaranteed to operate beyond the
Maximum Operating ratings.
Note:
1. Connect V
CC
and AIN to external 5V for V
IN
= 2.7V ~ 6.5V
application.
Parameter Rating
IN, AIN, TON, PFM to AGND -0.3V to 30V
LX to AGND -2V to 30V
BST to AGND -0.3V to 36V
SS, PGOOD, FB, EN to AGND -0.3V to 6V
PGND to AGND -0.3V to +0.3V
Junction Temperature (T
J
) +150°C
Storage Temperature (T
S
) -65°C to +150°C
ESD Rating
(1)
2kV
Parameter Rating
Supply Voltage (V
IN
)2.7V
(1)
to 28V
Output Voltage Range 0.8V to 0.85*V
IN
Ambient Temperature (T
A
) -40°C to +85°C
Package Thermal Resistance
HS MOSFET 25°C/W
LS MOSFET 20°C/W
PWM Controller 50°C/W
Symbol Parameter Conditions Min. Typ. Max Units
V
IN
IN Supply Voltage 2.7 28 V
V
UVLO
Under-Voltage Lockout Threshold of V
cc
V
cc
rising
V
cc
falling 3.2 4.0
3.7 4.4 V
I
q
Quiescent Supply Current of V
cc
I
OUT
= 0, V
FB
= 1.0V, V
EN
> 2V 23mA
I
OFF
Shutdown Supply Current V
EN
= 0V 120A
V
FB
Feedback Voltage T
A
= 25°C
T
A
= 0°C to 85°C 0.792
0.788 0.800
0.800 0.808
0.812 V
Load Regulation 0.5 %
Line Regulation 1%
I
FB
FB Input Bias Curren t 200 nA
Enable
V
EN
EN Input Threshold Off threshold
On threshold 2.5 0.5 V
V
EN_HYS
EN Input Hysteresis 100 mV
PFM Control
V
PFM
PFM Input Threshold PFM Mode threshold
Force PWM threshold 2.5 0.5 V
V
PFMHYS
PFM Input Hysteresis 100 mV
Modulator
T
ON
On Time R
TON
= 100k, V
IN
= 12V
R
TON
= 100k, V
IN
= 24V 200 250
150 300 ns
T
ON
_
MIN
Minimum On T i me 100 ns
T
OFF
_
MIN
Minimum Off Time 250 ns
Electrical Characteristics
T
A
= 25°C, V
IN
= 12V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a te mperature range of -40°C to +85°C.
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 6 of 18
Soft-Start
I
SS
_
OUT
SS Source Current V
SS
= 0, C
SS
= 0.001F to 0.1F 7 10 15 A
Power Good Signal
V
PG_LOW
PGOOD Low Voltage I
OL
= 1mA 0.5 V
PGOOD Leakage Curren t ±1 A
V
PGH
V
PGL
PGOOD Threshold FB rising
FB falling 12
-12 15
-10 18
-8 %
PGOOD Threshold Hysteresis 3 %
T
PG_L
PGOOD Fault Delay Time (FB falling) 50 s
Under Voltage and Over Voltage Protection
V
PL
Under Voltage Threshold FB falling -30 -25 -20 %
T
PL
Under Voltage Delay Time 128 s
V
PH
Over Vo ltage Threshold FB rising 12 15 18 %
T
UV_LX
Under Voltage Shutdown Blanking Time V
IN
= 12V, V
EN
= 0V, V
CC
= 5V 20 mS
Power Stage Output
R
DS(ON)
High-Side NFET On-Resistance V
IN
= 12V, V
CC
= 5V 35 45 m
High-Side NFET Leakage V
EN
= 0V, V
LX
= 0V 10 A
R
DS(ON)
Low-Side NFET On-Resistance V
LX
= 12V, V
CC
= 5V 12 15 m
Low-Side NFET Leakage V
EN
= 0V 10 A
Over-current and Th ermal Protection
I
LIM
Valley Current Limit 6 A
Thermal Shutdown Thre sh o ld T
J
rising
T
J
falling 145
100 °C
Symbol Parameter Conditions Min. Typ. Max Units
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 7 of 18
Functional Block Diagram
TON
Generator
ISENSE
ILIM_VALLEY
Error Comp
ILIM Comp
0.8V
ISENSE
(AC) FB
Decode
OTP
Reference
& Bias
BST
PG Logic
LX
AGNDPGND
ISENSE (DC)
ISENSE (AC)
Current
Information
Processing
Vcc
IN
AIN
PGood
UVLO
LDO
TON
Timer
Q
TOFF_MIN
S
RQ
Timer
Q
TON
PFM
FB
SS
EN
VCC
Light Load
Threshold
ISENSE
Light Load
Comp
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 8 of 18
5μs/div
Normal Operation
Full Load (6A) Start-UP Full Load Short
Load transient 1.2A (20%) to 4.8A (80%)
500μs/div
1ms/div 1ms/div
VLX
10V/div
ILX
2A/div
VO Ripple
20mV/div
VLX
10V/div
ILX
2A/div
VO
1V/div
EN
5V/div
VLX
10V/div
IO
5A/div
VO
500mV/div
VLX
10V/div
ILX
5A/div
VO Ripple
100mV/div
Typical Performance Characteristics
Circuit of Typical Application. TA = 25°C, VIN = 12V, VOUT = 1.5V, fs = 300kHz unless otherwise specified.
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 9 of 18
Detailed Description
The AOZ1232-01 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 6A of
continuous output current with an output voltage
adjustable down to 0.8V. The programmable operating
frequency range of 100kHz to 1MHz enables optimizing
the configuration for PCB area and efficiency.
The input volt a ge of AOZ123 2-0 1 can be as low a s 2.7V.
The highest input voltage of AOZ1232-01 can be 28V.
Constant on-time PWM with input feed-forward control
scheme results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input range. True AC current mode control
scheme guarantees the regulator can be stable with a
ceramic output capacitor. The switching frequ ency can
be externally programmed up to 1MHz. Protection
features include VCC under-voltage lockout, valley
current limit, output over voltage and under voltage
protection, short-circuit protection, and thermal
shutdown.
The AOZ1232-01 is availab le in 30-pin 5mm x 5mm QF N
package.
Input Power Architecture
The AOZ1232-01 integrates an internal linear regulator
to generate 5.3V VCC from input. If input voltage is lower
than 5.3V, the linear regulator operates at low drop-
output mode; the VCC voltage is equal to input voltage
minus the drop-ou tput volta ge of interna l linear regu lator.
Enable and Soft Start
The AOZ1232-01 has external soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when VCC rises to 4.0V and voltage on EN pin is
HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of
soft-start pin (VSS) when it is lower t han 0.8V. Whe n VSS
is higher than 0.8V, the FB voltage is regulated by
internal precise band-gap voltage (0.8V). The soft-start
time can be calculated by the following formula:
TSS(s) = 330 x CSS(nF)
If CSS is 1nF, the soft-start time will be 330µs; if CSS is
10nF, the soft-start time will be 3.3ms.
Constant-On-Time PWM Control with Input
Feed-Forward
The control algo rithm of AOZ1232-01 is constant -on-time
PWM Control with input feed-forward.
The simplified control schematic is shown in Figure 1.
Figure 1. Simplified Control Schematic of AO Z1232-01
The high-side switch on-time is determined solely by a
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal
0.8V is lower than the combined information of FB
voltage a nd the AC curre nt information of inductor, which
is processed and obt ained through the se nsed lower-side
MOSFET current once it tur ns on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
have very low ESR. The AC current information has no
DC offset, which does not cause offset with output load
change, which is fundamentally different from other V2
constant-on time control schemes.
The constant-on-time PWM control architecture is a
pseudo-fixed frequency with input voltage feed-forward.
The internal circuit of AOZ1232-01 sets the on-time of
high-side switch inversely proportional to the IN.
To achieve the flux balance of inductor, the buck
converter has the equation:
0.8V
FB Voltage/
AC Current
Information
Comp
Programmable
One-Shot
IN
PWM
+
–
TON 26.3 10 12–RTON 
VIN V
----------------------------------------------------------------
=(1)
FSW VOUT
VIN TON
---------------------------
=(2)
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 10 of 18
Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
voltage.
An external resistor between the IN and T ON pin sets the
switching frequency according to the following equation:
A further simplified equation will be:
If VOUT is 1.8V, RTON is 137k, the switching frequency
will be 500kHz.
This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency cloc k
generator.
True Current Mode Control
The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually cannot be used as output capacitor.
The AOZ1232-01 senses the low-side MOSFET current
and processes it into DC and AC current information
using AOS proprietary technique. The AC current
information is decoded and added on the FB pin on
phase. With AC current information, the stability of
constant-o n- tim e co nt rol is signific an tly imp r ove d eve n
without the help of output capacitor’s ESR, and thus the
pure ceramic capacitor solution can be applicable. The
pure ceramic capacitor solution can significantly reduce
the output ripp le (n o ESR cau se d over sh oo t an d
undershoot) and less board area design.
Valley Current-Limit Protection
The AOZ1232-01 uses the valley current-limit protectio n
by using RDSON of the lower MOSFET current sensing.
To detect real cu rren t info rm a tio n, a minim u m co nst an t-
off (150ns typical) is implemented after a constant-on
time. If the current exceeds the valley current-limit
threshold, th e PW M cont ro ller is not allo we d to initiat e a
new cycle. The actual peak current is greater than the
valley current-limit threshold by an amount equal to the
inductor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value as well as input and output
voltages. The current limit will keep the low-side
MOSFET ON and will not allow another high-side on-
time, until the current in the low-side MOSFET reduces
below the current limit. Figure 2 shows the inductor
current durin g the cu rren t limi t .
Figure 2. Inductor Current
After 128s (typical), the AOZ1232-01 considers this is a
true failed condition and therefore, turns-off both high-
side and low-side MOSFETs and latches off. When
triggered, only the enable can restart the AOZ1232-01
again.
Output Voltage Under-Voltage Protection
If the outp ut voltage is lo wer than 2 5% by over -curr ent or
short circuit, th e AOZ1232-0 1 wil l wait for 12 8s (typical)
and turns-off both high-side and low-side MOSFETs and
latches off. When triggered, only the enable can restart
the AOZ1232-01 again.
Output Voltage Over-Voltage Protection
The threshold of OVP is set 15% higher than 800mV.
When the VFB voltage exceeds the OVP threshold, high-
side MOSFET is turned-off and low-side MOSFETs is
turned-on until VFB voltage is lower than 800mV.
Power Good Output
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output volta ge is 10% below than the nominal regulation
voltage for 50s (typical), the PGOOD is pulled low.
When the output voltage is 15% higher than the nominal
regulation voltage, the PGOOD is also pulled low.
When combined with the under-voltage-protection circuit,
this current limit method is effectiv e in alm o st eve ry
circumstance. In forced-PWM mo de, the AOZ1232-01
also implemen ts a ne ga tiv e cur re n t limit to pre ven t
excessive reverse inductor currents when VOUT is
sinking current.
FSW kHz
38000 VOUT
V
RTON k
-----------------------------------------------
=(4)
Inductor
Current
Time
Ilim
Rev. 1.3 October 2012
www.aosmd.com
Page 11 of 18
AOZ1232-01
Application Information
The basic AOZ1232-01 application circuit is shown in
pages 2 and 3. Component selection is explained below.
Input Capacitor
The input capacitor m ust be connected to t he IN pins and
PGND pin of the AOZ1232-01 to maintain steady input
voltage and filter out the pulsing input current. A small
decoupling capacitor, usually 1F, should be connected
to the VCC pin and AGND pin for stable operation of the
AOZ1232-01. The voltage rating of input capacitor must
be greater than maximum input voltage plus ripple
voltage.
The input ripple voltage can be approximated by
equation below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
if let m equal the conversion ratio:
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that when V O is half of VIN, CIN it
is under the worst curr ent str es s. The wo rst curr ent
stress on CIN is 0.5 x IO.
Figure 3. I
CIN
vs. Voltage Conversion Ratio
For reliable operation and best per formance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depend ing on the
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic cap ac ito rs ar e pr ef er re d for th eir bett er
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
The peak inductor current is:
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
50% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on the indu ctor needs to be checked
for thermal and efficiency requirements.
Surface mount inductors in different shapes and styles
are available from Coilcraft, Elytone and Murata.
Shielded inductors are small and radiate less EMI noise,
but they do cost more than unshielded inductors. The
choice depends on EMI requirement, price and size.
IO
fC
IN
----------------- 1VO
VIN
---------
–



VO
VIN
---------
ICIN_RMS IOVO
VIN
---------1VO
VIN
---------
–



=
VO
VIN
---------m=
ILVO
fL
-----------1VO
VIN
---------
–



=
ILpeak IO
IL
2
--------
+=
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1
m
I
CIN_RMS
(m)
I
O
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 12 of 18
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple volt age specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck con-
verter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where,
C
O
is output capacitor value and
ESR
CO
is the Equivalent Series Resistor of output capacitor.
When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the out put ripple volt age is mainly decide d by
capacitor ESR and inductor ri pple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tant alum are recomme nded
to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
Usually, the ripple current rating of the output ca pacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Thermal Management and Layout
Consideration
In the AOZ1232-01 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then returns to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The se co nd lo op star t s fr om t he indu ctor, t o
the output capacitors and load, to the low side switch.
Current flows in the second loop when the low side
switch is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A grou nd
plane is strongly recommended to connect the input
capacitor, output capacitor and PGND pin of the
AOZ1232-01.
In the AOZ1232-01 buck regulator circuit, the major
power dissipating components are the AOZ1232-01 and
output inductor. The total power dissipation of the con-
verter circuit can be measured by input power minus out-
put power.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
output cu rrent.
The actual junction temperature can be calculated with
power dissipation in the AOZ1 23 2 -01 an d th er ma l
impedance from junction to ambient.
The maximum junction temperature of AOZ1232-01 is
150ºC, which limits the maximum load current capability.
The thermal performance of the AOZ1232-01 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
VOILESRCO 1
8fC
O
-------------------------
+


=
VOIL1
8fC
O
-------------------------
=
VOILESRCO
=
ICO_RMS
IL
12
----------
=
Ptotal_loss VIN IIN VOIO
–=
Pinductor_loss IO2Rinductor 1.1=
Tjunction Ptotal_loss Pinductor_loss
–
JA
=
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 13 of 18
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help ther-
mal dissipation.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance ther-
mal conduction path. Connect a large copper plane
to IN pins to help thermal dissipation.
3. Do not use thermal relief connection on the PGND
pin. Pour a maximized copper ar ea on the PGND pin
to help thermal dissipation.
4. Input ca pa citors should be connec te d to the IN pin
and the PGND pin as close as possible to red uce the
switching spikes.
5. Decoupling capacitor CVCC should be connected to
VCC and AGND as close as possible.
6. Voltage divider R1 a nd R2 should be placed as clo se
as possible to FB and AGND.
7. RTON should be connected as close as possible to
Pin 6 (TON pin).
8. A ground plane is preferred; Pin 26 (PGND) is con-
nected to the ground plane through via.
9. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
10. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
PGND 12
PGND 13
PGND 14
19 PGND
18 PGND
17 PGND
16 PGND
15 PGND
PGND
1
2
P
G
ND
13
P
G
ND
14
19
PG
ND
18
PG
ND
1
7
PG
ND
16
PG
ND
15
PG
ND
IN
IN
IN
IN
LX
LX
LX
AGND
SS
VCC
BST
PGND
1
2
3
4
5
6
7
P G
OO D
E N
AGN D
F
B
T
O N
8
9
10
11
23
24
25
26
27
28
29
22
21
20
LX
LX
LX
LX
IN
AGN
D
30
Rton
C in
L X
C o u t
V o
V o
Cvc c
G N D
Vc c
C b
R1
R 2
AIN
PFM
L
X
L
X
L
X
2
3
2
4
2
5
2
2
2
1
2
0
L
X
L
X
L
X
L
X
V
o
IN
I
N
I
N
I
N
7
8
9
1
0
1
1
I
N
AIN
AGND
D
4
N
D
2
9
AG
N
D
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 14 of 18
Package Dimensions, QFN 5x5, 30 Lead EP3_S
22
23
1
30
14
15
7
8
22
23
30
14
15
7
8
TOP VIEW
SIDE VIEW
L1
L2
E1 E1
E2
D3
D2
L4
L3
L5
L
L5
L5
D/2
D
B
A
E
E/2
2
INDEX AREA
(D/2xE/2)
aaa C
2x
2x
e
A3
4
A
A1
A3
SEATING
PLANE
C
30 x b
Cbbb MAB
3
1
D1
e
e/2
PIN#1 DIA
L1
L5
D3/2
C0.35x45˚
2e
A3/2
e/2
A3/2
Notes:
ccc C
ddd C
aaa C
1. All dimensions are in millimeters.
2. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SPP-002.
3. Dimension b applies to metallized terminal and is measured between 0.20mm and 0.35mm from the terminal tip.
If the terminal has the optional radius on the other end of the terminal, the dimension b should not be measured in that radius area.
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 15 of 18
Package Dimensions, QFN 5x5, 30 Lead EP3_S
(Continued)
UNIT: MM
UNIT: MM
0.30X45°
0.3861.494
0.116
1.88
2.32
0.71
0.44
0.500 REF
0.22
0.22
0.25
0.22
0.22
22
23
1
30
15
7
8
14
3.76
1.996
1.17
0.25
2.50 2.50
2.50 2.50
0.25
0.75
0.80
1.25
0.30X45°
0.436
0.622
0.116
0.975
0.39
0.500 REF
0.27
0.27
RECOMMENDED STENCIL DESIGN
0.25
0.27
0.27
22
23
1
30
15
7
8
14
1.04
0.873
1.07
0.22
2.50 2.50
2.50 2.50
0.25
0.75
0.80
0.27
0.14
0.52
0.81
0.15
0.15
0.37
0.27
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 16 of 18
Package Dimensions, QFN 5x5, 30 Lead EP3_S
(Continued)
Symbols Min. Typ. Max.
Dimensions in millimeters Dimensions in inches
0.39
L3
0.0070.003—0.1660.066—
L2
0.0210.0170.0130.5360.4360.336
L1
0.006
0.004
0.197 BSC
0.000
0.031
0.001
0.035
0.002
0.039
1.00
0.05
0.90
0.02
2.22
0.80
0.00
A
A1
E
D2
D1
5.00 BSC
bbb
aaa
L
A3 0.20 REF
0.350.250.20
b0.008
0.008 REF
0.010 0.014
0.500.400.30 0.020
0.020 BSC0.50 BSC
D5.00 BSC 0.197 BSC
E1
ccc
ddd
0.004
0.003
0.15
0.10
0.10
0.08
0.0160.012
1.294 1.4941.394
e
2.12 2.32
0.97 1.07 1.17
E2 1.796 1.9961.896
0.490.29
0.76
L4 0.860.66
0.27
L5 0.370.17
D3
L3
L2
L1
A
A1
E
D2
D1
bbb
aaa
L
A3
b
D
E1
ccc
ddd
e
E2
L4
L5
D3
3.56 3.66 3.76 0.140 0.144 0.148
0.087
0.083 0.091
0.038 0.042 0.046
0.051 0.0590.055
0.110 0.1180.114
0.0190.0150.011
0.0340.0300.026
0.0150.0110.007
Symbols Min. Typ. Max.
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 17 of 18
Tape and Reel Dimensions, QFN 5x5, 30 Lead EP3_S
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.0
±2.0
N
ø79.0
±1.0
UNIT: mm
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min.
75 Empty Pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
125 Empty Pockets
H
ø13.0
±0.5
W
12.4
+2.0/-0.0
W1
17.0
+2.6/-1.2
K
10.5
±0.2
S
2.0
±0.5
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
P1
D1 P2
B0
P0 D0
E2
E1
E
A0 Feeding Direction
Package A0 B0 K0 E E1 E2D0 D1 P0 P1 P2 T
5.25
±0.10 ±0.10
5.25
±0.10
1.10 1.50 1.50 12.00
±0.10
1.75
±0.05
5.50
±0.10
8.00
±0.10
4.00
±0.05
2.00
±0.05
0.30
+0.3
+0.10/-0Min.
QFN 5x5
(12mm)
T
K0
AOZ1232-01
Rev. 1.3 October 2012
www.aosmd.com
Page 18 of 18
Part Marking
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
Z1232QI1
FAYWLT
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical impla nt into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use pr ovided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its sa fety or
effectiveness.
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.