
TECHNICAL NOTES
+25°C 0 to +70°C –55 to +125°C
ANALOG OUTPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Internal Reference
Voltage +9.95 +10.0 +10.05 +9.95 +10.0 +10.05 +9.95 +10.0 +10.05 Volts
Drift — ±5 — — ±5 — — ±5 — ppm/°C
External Current — — 1.5 — — 1.5 — — 1.5 mA
DIGITAL OUTPUTS
Logic Levels
Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts
Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts
Logic Loading "1" — — –4 — — –4 — — –4 mA
Logic Loading "0" — — +4 — — +4 — — +4 mA
Delay, Falling Edge of EOC to
Output Data Valid — — 35 — — 35 — — 35 ns
Output Coding Straight Binary
POWER REQUIREMENTS , ±15V
Power Supply Ranges
+15V Supply +14.5 +15.0 +15.5 +14.5 +15.0 +15.5 +14.5 +15.0 +15.5 Volts
–15V Supply –14.5 –15.0 –15.5 –14.5 –15.0 –15.5 –14.5 –15.0 –15.5 Volts
+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 Volts
Power Supply Currents
+15V Supply — +50 +65 — +50 +65 — +50 +65 mA
–15V Supply — –41 –50 — –41 –50 — –41 –50 mA
+5V Supply — +70 +85 — +70 +85 — +70 +85 mA
Power Dissipation — 1.7 1.9 — 1.7 1.9 — 1.7 1.9 Watts
Power Supply Rejection — — ±0.01 — — ±0.01 — — ±0.01 %FSR/%V
POWER REQUIREMENTS, ±12V
Power Supply Ranges
+12V Supply +11.5 +12.0 +12.5 +11.5 +12.0 +12.5 +11.5 +12.0 +12.5 Volts
–12V Supply –11.5 –12.0 –12.5 –11.5 –12.0 –12.5 –11.5 –12.0 –12.5 Volts
+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 Volts
Power Supply Currents
+12V Supply — +50 +65 — +50 +65 — +50 +65 mA
–12V Supply — –40 –48 — –40 –48 — –40 –48 mA
+5V Supply — +70 +80 — +70 +80 — +70 +80 mA
Power Dissipation — 1.4 1.6 — 1.4 1.6 — 1.4 1.6 Watts
Power Supply Rejection — — ±0.01 — — ±0.01 — — ±0.01 %FSR/%V
Footnotes:
➀ All power supplies must be on before applying a start convert pulse. All supplies and
the clock (START CONVERT) must be present during warmup periods. The device
must be continuously converting during this time. There is a slight degradation in
performance when using ±12V supplies.
➁ See Ordering Information for availability of ±5V input range. Contact DATEL for
availability of other input voltage ranges.
➂ A 1MHz clock with a 200ns wide start convert pulse is used for all production testing.
See Timing Diagram for more details.
➄ This is the time required before the A/D output data is valid once the analog input is
back within the specifi ed range.
(SNR + Distortion) – 1.76 + 20 log Full Scale Amplitude
Actual Input Amplitude
6.02
➃ Effective bits is equal to:
1. Obtaining fully specifi ed performance from the ADS-917 requires care-
ful attention to pc-card layout and power supply decoupling. The device's
analog and digital ground systems are connected to each other internally.
For optimal performance, tie all ground pins (14, 19 and 23) directly to a
large analog ground plane beneath the package.
Bypass all power supplies and the REFERENCE OUTPUT (pin 21) to ground
with 4.7F tantalum capacitors. Locate the bypass capacitors as close to
the unit as possible. If the user-installed offset and gain adjusting circuit
shown in Figure 2 is used, also locate it as close to the ADS-917 as pos-
sible.
2. The ADS-917 achieves its specifi ed accuracies without the need for exter-
nal calibration. If required, the device's small initial offset and gain errors
can be reduced to zero using the input circuit of Figure 2. When using this
circuit, or any similar offset and gain-calibration hardware, make adjust-
ments following warmup. To avoid interaction, always adjust offset before
gain.
3. When operating the ADS-917 from ±12V supplies, do not drive external
circuitry with the REFERENCE OUTPUT. The reference's accuracy and drift
specifi cations may not be met, and loading the circuit may cause accuracy
errors within the converter.
4. Applying a start convert pulse while a conversion is in progress (EOC =
logic "1") initiates a new and inaccurate conversion cycle. Data from the
interrupted and subsequent conversions will be invalid.
ADS-917
14-Bit, 1MHz, Low-Power Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-917.B02 Page 3 of 8