VUI72-16NOXT
T = 125°C
V
CES
V1200
collector emitter voltage
collector emitter saturation voltage
T = 25°C
collector current A
58
A
C
VJ
Symbol Definition
Ratings
typ. max.min.Conditions Unit
40
V
V
CE(sat)
total power dissipation 195 W
collector emitter leakage current
6.5 V
turn-on delay time 70 ns
t
reverse bias safe operating area
A
V
GES
V±20
V
GEM
max. transient gate emitter voltage
T = °C
C
V
P
tot
gate emitter threshold voltage
RBSOA
105
±30
T = 125°C
T = 125°C
VJ
V
max. DC gate voltage
I
C25
I
C
T = 25°C
VJ
I = A; V = 15 V
CGE
T = 25°C
VJ
V
GE(th)
I
CES
I = mA; V = V
CGECE
V = V ; V = 0 V
CE CES GE
I
GES
T = 25°C
VJ
gate emitter leakage current V = ±20 V
GE
2.15
2.15
5.95.4
mA
0.1 mA
0.1
500
G(on)
total gate charge V = V; V = 15 V; I = A
CE
Q
GE C
110 nC
t
t
t
E
E
d(on)
r
d(off)
f
on
off
40 ns
250 ns
100 ns
3.8 mJ
4.1 mJ
current rise time
turn-off delay time
current fall time
turn-on energy per pulse
turn-off energy per pulse
inductive load
V = V; I = A
V = ±15 V; R = Ω
CE C
GE G
V = ±15 V; R = Ω
GE G
V = V
CEK
1200
short circuit safe operating area
µs
SCSOA
10T = 125°C
VJ
V = V; V = ±15 V
CE GE
short circuit duration
t
short circuit current
I
SC
SC
R = Ω; non-repetitive
G
140 A
R
thJC
thermal resistance junction to case
0.25
K/W
V
RRM
V1200
max. repe titive rev erse volt a g e T = 25°C
VJ
T = 25°C
forward current A
0
A
C
tbd
T = °C
C
I
F25
I
F
T = 25°C
forward voltage V
tbd
V
VJ
tbdT = 125°C
VJ
V
F
I = A
F
T = 25°C
reverse current mA
tbd
mA
VJ
tbdT = 125°C
VJ
I
RR RRM
T = 125°C
VJ
Q
I
t
rr
RM
rr
tbd µC
tbd A
tbd ns
reverse recovery charge
max. reverse recovery current
reverse recovery time
V =
-di /dt = A/µs
I = A
F
F
R
R
thJC
thermal resistance junction to case tbd K/W
V = V
T = 25°C
C
T = 25°C
VJ
T = 125°C
VJ
VJ
35
1.5
35
35
27
27
27
600
900
600
I
CM
1.85
R
thCH
thermal resistance case to heatsink
0.65
K/W
0R
thCH
thermal resistance case to heatsink K/W
Brake IGBT
Brake Diode
600 V
80
80
80
80
nA
IXYS reserves the right to change limits, conditions and dimensions. 20130521cData according to IEC 60747and per semiconductor unless otherwise specified
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