DC1786A - LINEAR TECHNOLOGY

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DEMO MANUAL DC1786A

DESCRIPTION

LTC2871IUHF

RS232/RS485 Multiprotocol Transceiver

with Integrated Termination

Demonstration circuit 1786A showcases the LTC2871

RS232/RS485 multiprotocol transceiver with integrated

termination. Separate supply inputs power the interface

and logic sections, permitting operation of the logic con-

trol and I/O down to 1.7V. LEDs indicate when supplies

are present. All control pins are accessible via a turret

for external connections, or they may be set by jumpers.

All logic I/O and interface I/O lines are routed to turrets.

The RS485 interface lines are also available at a terminal

L, LT, LTC, LTM, μModule, Linear Technology and the Linear logo are registered trademarks of

Linear Technology Corporation. All other trademarks are the property of their respective owners.

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block for convenient connection of a transmission line.

Because the LTC2871 contains half-/full-duplex switching

control it is unnecessary to jumper A and B to Y and Z for

half-duplex operation.

Design files for this circuit board are available at

http://www.linear.com/demo

The LTC2871 multiprotocol transceiver contains two RS232

drivers, two RS232 receivers, one RS485 driver and one

RS485 receiver. All drivers and receivers may be accessed

independently and simultaneously. The LTC2871 also in-

cludes on-chip supply generation for RS232, permitting

operation from a single 3V to 5.5V VCC supply. A separate

logic I/O supply pin (VL) permits the LTC2871 to adapt to

any logic level ranging from 1.7V up to VCC.

The LTC2871 also includes selectable RS485 termina-

tions, as well as switching for half- and full-duplex modes,

eliminating the need for external jumpers or relays for

configuration in different modes.

DC1786A Includes:

• Bananas and turrets for supply connections along

the upper edge of the board

• Turrets for logic I/O along the left edge of the board

• Turrets for RS232 and RS485 interface connections

along the right edge of the board

• A terminal block, J5, for RS485 connections

• Turrets and jumpers for selecting modes along bot-

tom edge of board. There are no pull-up or pull-down

resistors on the control lines; known states must be

asserted by jumpers or by applying a definitive logic

level to the turrets.

• Green LEDs to indicated the presence of VCC and

VL. Note that the VL LED, D1, unavoidably dims and

extinguishes at VL<2V.

• 10k pull-up resistors on DI, DIN1 and DIN2 to assert

a known logic-1 state when these turrets are left open

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DEMO MANUAL DC1786A

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In summary, DC1786A features a turret for each and every

LTC2871 logic, interface and supply pin. In addition the

supply pins have banana jacks, and the control pins are

connected to jumper blocks to establish their states.

Components

Components on DC1495A are divided into four basic

groups:

R1-R9: 100Ω resistors included in series with the control

signal turrets to limit fault current arising from any ac-

cidental misconnections of the turrets or jumpers.

D1, D2, R11, R15: VCC and VL supply indicator LEDs and

current limiting resistors.

R12, R13, R14: 10k pull-ups to VL on DI and DIN1, DIN2.

C1-C5, L1: supply generation and bypassing components

for the LTC2871 (U1).

LTC2871 Operation

The LTC2871 contains two RS232 drivers, two RS232

receivers, one RS485 driver and one RS485 receiver.

The input(s) and output(s) of each of these elements is

separately available and can be interconnected with other

elements without conflict between abs max ratings or

loading in the disabled state.

The RS485 transceiver includes a special half-/full-duplex

switching feature. In full-duplex mode, the receiver inputs

are connected to the A and B pins, while the driver is

connected to Y and Z. In half-duplex mode, the receiver

inputs are moved to Y and Z so that there is no need to

jumper A-B to Y-Z when switching between half- and

full-duplex modes.

Lastly, RS485 terminations are included in the LTC2871.

The terminations can be engaged or disengaged as con-

trolled by a termination enable control line, TE485.

Jumpers

Jumper blocks are included to set the state of each control

pin to VL or GND. If the shorting jumper is set in the EXT

position, the control pin is connected to its associated

turret and external signalling may be applied. Failure

to select one of the three positions results in a floating

control pin. The turret is disconnected and there are no

internal or on-board pull-ups to establish the logic state

if the jumper block is open.

As shipped, jumpers on DC1786A are set to enable all

transmitters and receivers, with RS485 set to full duplex

with terminations enabled.

See the data sheet Pin Functions and Function tables for a

complete description of the control pin functions. A brief

summary is given here:

JP1, LB: Loopback Enable. A logic high loops driver input

signals immediately back to associated receiver outputs.

Loopback is interrupted when a receiver is disabled. Default

position low, loopback disabled.

JP2, H/F: RS485 Half-Duplex Select Input. A logic low

selects full-duplex operation where the RS485 receiver

responds to signals on the A and B pins. A logic high

selects half-duplex operation where the RS485 receiver

responds to signals on the Y and Z pins. Default position

low, full duplex enabled.

JP3, TE485: RS485 Termination Enable. A logic high

enables 120Ω terminations across A-B and Y-Z. Default

position high, RS485 terminations enabled.

JP4, CH2: RS232 Channel 2 Disable. A logic high disables

RS232 driver 2 and receiver 2, independent of RX232 and

DX232. Default position low, RS232 CH2 enabled.

JP5, RX485: RS485 Receiver Enable. A logic low enables

the RS485 receiver. Default position low, RS485 receiver

enabled.

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DEMO MANUAL DC1786A

JP6, DX485: RS485 Driver Enable. A logic high enables the

RS485 driver. Default position high, RS485 driver enabled.

JP7, DX232: RS232 Driver Enable. A logic high enables the

RS232 driver. Default position high, RS232 driver enabled.

JP8, RX232: RS232 Receiver Enable. A logic low enables

the RS232 receiver. Default position low, RS232 receiver

enabled.

JP9, FEN: Fast Enable. A logic high enables fast enable

mode; the internal supply generator remains operational

regardless of the state of the driver, receiver and termina-

tion enables. Default position low, fast enable disabled.

Probe Pads

Probe pads are included on the bottom of the board for

examination of the VCC, VDD, VEE, SW and CAP pins. A

GND probe pad is included nearby. VDD and VEE are also

accessible from the top.

Terminal block J5 is included for easy connection of an

RS485 cable. For half-duplex operation only Y and Z need

be connected. Terminal block J5 is hardwired to turrets

A, B, Y and Z.

How to Operate DC-1786A

Operation of DC1486A is straightforward: connect a VCC

supply of 3V to 5.5V, and a VL supply of 1.7V up to VCC.

There are no special supply sequencing restrictions, al-

though if VL>VCC the logic I/O signalling may not operate

properly. Note that D1, the VL supply indicating LED will

extinguish at VL<2V.

Once power is connected, all drivers and receivers will

be active.

The LTC2871 may be made to self-oscillate by connecting

all of the drivers and receivers in one all-encompassing

loop, and adding one inversion. The inversion may be

introduced with a logic inverter, or by cross-connecting

the RS485 driver and receiver (connect Y to B and Z to A).

With VCC = VL = 3.3V, the frequency of oscillation is typi-

cally 275kHz. Use the default jumper positions for this test.

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DEMO MANUAL DC1786A

PARTS LIST

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

1 1 C1 CAP, 0805 220nF 10% 25V X7R AVX 08053C224KATxA

2 2 C2,C3 CAP, 0805 1μF 10% 25V X7R TDK C2012X7R1E105K

3 1 C4 CAP, 0805 2.2μF 10% 25V X7R AVX 08053C225KAT2A

4 1 C5 CAP, 0805 100nF 10% 25V X7R AVX 08053C104KAT2A

5 2 D1,D2 LED, GREEN PANASONIC LN1351C

6 34 E1-E9, E14-E38 TURRET MILL-MAX 2308-2-00-80-00-00-07-0

7 4 E10, E11, E12, E13 TURRET MILL-MAX 2501-2-00-80-00-00-07-0

8 9 JP1-JP9 HEADER, 3PIN, DBL ROW 2mm SAMTEC TMM 103-02-L-D

9 4 J1, J2, J3, J4 JACK, BANANA KEYSTONE 575-4

10 1 J5 TERMINAL BLOCK, 5 POSITION, 3.5mm ON-SHORE TECH OSTTV051150

11 1 L1 IND, 2016 (mm) 10μH 200mA TAIYO YUDEN CB2016T100M

12 9 R1-R9 RES, 1206 100Ω 5% 1/4W VISHAY CRCW1206100RJNEA

13 2 R11, R15 RES, 0603 330Ω 5% 1/10W NIC NRC0603J331TRF

14 3 R12, R13, R14 RES, 0603 10kΩ 5% 1/10W VISHAY CRCW060310K0JNEA

15 1 U1 IC, RS232/RS485 TRANSCEIVER LINEAR TECH. LTC2871IUHF

16 9 JP1-JP9 SHUNT, 2mm SAMTEC 2SN-BK-G

17 4 STANDOFF, SNAP ON KEYSTONE_8832

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DEMO MANUAL DC1786A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

SCHEMATIC DIAGRAM

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DEMO MANUAL DC1786A

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LT 0611 • PRINTED IN USA

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