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Power Management Switch ICs for PCs and Digital Consumer Products
1ch High Side Switch ICs
for USB Devices and Memory Cards
BD2061AFJ,BD2065AFJ
●Description
Single channel high side switch IC for USB port is a high side switch having over current protection used in power supply line
of universal serial bus (USB). N-channel power MOSFET of low on resistance and low supply current are realized in this IC.
And, over current detection circuit, thermal shutdown circuit, under voltage lockout and soft start circuit are built in.
●Features
1) Low on resistance 80mΩ Nch MOSFET Switch.
2) Continuous current load 1.0A
3) Control input logic
Active-Low : BD2061AFJ
Active-High : BD2065AFJ
4) Soft start circuit
5) Over current detection
6) Thermal shutdown
7) Under voltage lockout
8) Open drain error flag output
9) Reverse-current protection when power switch off
10) Power supply voltage range 2.7V~5.5V
11) TTL Enable input
12) 1.2ms typical rise time
13) 10μA max standby current
14) Operating temperature range -40℃~85℃
●Applications
USB hub in consumer appliances, Car accessory, PC, PC peripheral equipment, and so forth
●Lineup
Parameter BD2061AFJ BD2065AFJ
Continuous current load (A) 1.0 1.0
Output current at short (A) 1.5 1.5
Control input logic Low High
●Absolute Maximum Ratings
Parameter Symbol Ratings Unit
Supply voltage VIN -0.3 to 6.0 V
Enable voltage VEN, V/EN -0.3 to 6.0 V
/OC voltage V/OC -0.3 to 6.0 V
/OC current IS/OC 10 mA
OUT voltage VOUT -0.3 to 6.0 V
Storage temperature TSTG -55 to 150 ℃
Power dissipation PD 560*1 mW
*1 In the case of exceeding Ta = 25℃, 4.48mW should be reduced per 1℃.
* This chip is not designed to protect itself against radioactive rays.
●Operating conditions
Parameter Symbol Ratings Unit
Operating voltage VIN 2.7 to 5.5 V
Operating temperature TOPR -40 to 85 ℃
Continuous output current ILO 0 to 1.0 A
No.11029ECT06
BD2061AFJ,BD2065AFJ
Technical Note
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●Electrical characteristics
◎BD2061AFJ (Unless otherwise specified, VIN = 5.0V, Ta = 25℃)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
Operating Current IDD - 90 120 μA V/EN = 0V, OUT = OPEN
Standby Current ISTB - 0.01 1 μA V/EN = 5V, OUT = OPEN
/EN input voltage
V/EN 2.0 - - V High input
V/EN - - 0.8 V Low input
- - 0.4 V Low input 2.7V≤ VIN ≤4.5V
/EN input current I/EN -1.0 0.01 1.0 μA V/EN = 0V or V/EN = 5V
/OC output LOW voltage V/OC - - 0.5 V I/OC = 5mA
/OC output leak current IL/OC - 0.01 1 μA V/OC = 5V
/OC delay time TD/OC - 2.5 8 ms
ON resistance RON - 80 100 mΩ IOUT = 1.0A
Output current at short ISC 1.1 1.5 1.9 A
VIN = 5V, VOUT = 0V,
CL = 100μF (RMS)
Output rise time TON1 - 1.2 10 ms
RL = 10Ω , CL = OPEN
Output turn on time TON2 - 1.5 20 ms
Output fall time TOFF1 - 1 20 μs
Output turn off time TOFF2 - 3 40 μs
UVLO threshold VTUVH 2.1 2.3 2.5 V Increasing VIN
VTUVL 2.0 2.2 2.4 V Decreasing VIN
◎BD2065AFJ (Unless otherwise specified, VIN = 5.0V, Ta = 25℃)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
Operating Current IDD - 90 120 μA VEN = 5V, OUT = OPEN
Standby Current ISTB - 0.01 1 μA VEN = 0V, OUT = OPEN
EN input voltage
VEN 2.0 - - V High input
VEN - - 0.8 V Low input
- - 0.4 V Low input 2.7V≤ VIN ≤4.5V
EN input current IEN -1.0 0.01 1.0 μA VEN = 0V or VEN = 5V
/OC output LOW voltage V/OC - - 0.5 V I/OC = 5mA
/OC output leak current IL/OC - 0.01 1 μA V/OC = 5V
/OC delay time TD/OC - 2.5 8 ms
ON resistance RON - 80 100 mΩ IOUT = 1.0A
Output current at short ISC 1.1 1.5 1.9 A
VIN = 5V, VOUT = 0V,
CL = 100μF (RMS)
Output rise time TON1 - 1.2 10 ms
RL = 10Ω , CL = OPEN
Output turn on time TON2 - 1.5 20 ms
Output fall time TOFF1 - 1 20 μs
Output turn off time TOFF2 - 3 40 μs
UVLO Threshold VTUVH 2.1 2.3 2.5 V Increasing VIN
VTUVL 2.0 2.2 2.4 V Decreasing VIN
BD2061AFJ,BD2065AFJ
Technical Note
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●Measurement circuit
EN(/EN)
OUT
/OC
IN
GND
V
IN
IN
OUT
OUT
1uF
A
V
EN
(V
/EN
)
EN(/EN)
OUT
/
OC
IN
GND
V
IN
R
L
C
L
IN
OUT
OUT
1uF
V
EN
(V
/EN
)
Operating current EN, /EN input voltage, Output rise, fall time
EN(/EN)
OUT
/OC
IN
GND
VIN
CL
IN
OUT
OUT
1uF
IOUT
VIN
10k
VEN (V/EN )
EN( /EN)
OUT
/OC
IN
GND
VIN
IN
OUT
OUT
1uF I/OC
VIN
VEN (V/EN )
ON resistance, Over current detection /OC output LOW voltage
Fig.1 Measurement circuit
●Timing diagram
○BD2061AFJ ○BD2065AFJ
TON2
TON1
10%
90%
50% 50%
90%
10%
TOFF2
TOFF1
VOUT
V/EN
TON2
TON1
10%
90%
50% 50%
90%
10%
TOFF2
TOFF1
VOUT
VEN
Fig.2 Timing diagram Fig.3 Timing diagram
BD2061AFJ,BD2065AFJ
Technical Note
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●Reference data
Fig.4 Operating current
EN,/EN Enable
0
20
40
60
80
100
120
23456
SUPPLY VOLTAGE : VIN [V]
OPERATING CURRENT :
IDD [μA]
VIN=5.0V
Fig.6 Standby current
EN,/EN Disable
0.0
0.2
0.4
0.6
0.8
1.0
23456
SUPPLY VOLTAGE : VIN [V]
STANDBY CURRENT :
ISTB
[μA]
Ta=25°C
Fig.5 Operating current
EN,/EN Enable
0.0
0.5
1.0
1.5
2.0
23 456
SUPPLY VOLTAGE : VIN [V]
ENABLE INPUT VOLTAGE :
VEN,
V/EN[V] 0
Low to Hi
g
h
High to Low
Ta=25°C
Fig.8 EN,/EN input voltage
0.0
0.5
1.0
1.5
2.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
ENABLE INPUT VOLTAGE :
VEN, V/EN[V]
VIN=5.0V
High to Lo
w
Low to High
Fig.9 EN,/EN input voltage
0.0
0.1
0.2
0.3
0.4
0.5
23456
SUPPLY VOLTAGE : VIN [V]
/OC OUTPUT LOW VOLTAGE :
V/OC[V]
Ta=25°C
Fig.10 /OC output LOW voltage
0.0
0.1
0.2
0.3
0.4
0.5
-50 0 50 100
AMBIENT TEM PERATURE : Ta[℃]
/OC OUTPUT LOW VOLTAGE :
V/OC[V]
VIN=5.0V
Fig.11 /OC output LOW voltage Fig.12 ON resistance
0
50
100
150
200
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
ON RESISTANCE :
RON[mΩ]
VIN=5.0V
Fig.13 ON resistance
0
20
40
60
80
100
120
23456
SUPPLY VOLTAGE : VIN [V]
OPERATING CURRENT :
IDD [μA]
Ta=25°C
Fig.7 Standby current
EN,/EN Disable
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
STANDBY CURRENT :
ISTB
[μA]
VIN=5.0V
0
50
100
150
200
23 456
SUPPLY VOLTAGE : VIN [V]
ON RESISTANCE :
RON[mΩ]
Ta=25°C
0.0
1.0
2.0
3.0
4.0
5.0
2 3 4 5 6
SUPPLY VOLTAGE : VIN[V]
/OC DELAY TIME :
Ta=25°C
TD/OC[mS]
Fig.14 /OC output delay time
Fig.15 /OC output delay time
VIN=5.0V
0.0
-50 0 50 100
A
MBIENT TENPERATURE : Ta
[
℃
]
1.0
2.0
3.0
4.0
5.0
/OC DELAY TIME :
TD/OC[mS]
BD2061AFJ,BD2065AFJ
Technical Note
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Fig.20 Output turn on time Fig.21 Output turn on time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
TURN ON TIME :
TON2 [ms]
Ta=25°C
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
TURN ON TIME :
TON2 [ms]
VIN=5.0V
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
FALL TIME :
TOFF1[μs]
Ta=25°C
Fig.22 Output fall time
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
FALL TIME :
TOFF1[μs]
VIN=5.0V
Fig.23 Output fall time
Fig.24 Output turn off time
0.0
1.0
2.0
3.0
4.0
5.0
23456
SUPPLY VOLTAGE : VIN [V]
TURN OFF TIME :
TOFF2 [μs]
Ta=25°C
0.0
0.2
0.4
0.6
0.8
1.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
UVLO HYSTERESIS VOLTAGE :
VHYS[V]
Fig.27 UVLO hysteresis voltage
Fig.18 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
RISE TIME :
TON1 [ms]
VIN=5.0V
Fig.19 Output rise time
0.0
1.0
2.0
3.0
4.0
5.0
23 456
SUPPLY VOLTAGE : VIN [V]
RISE TIME :
TON1 [ms]
Ta=25°C
0.00
0.50
1.00
1.50
2.00
23456
SUPPLY VOLTAGE : VIN [V]
SHORT CIRCUIT CURRENT : ISC [A]
Ta=25°C
Fig.16 Output current at shortcircuit
0.00
0.50
1.00
1.50
2.00
-50 0 50 100
AMBIENT TEM PER ATURE : Ta[℃]
SHORT CIRCUIT CURRENT : ISC [A]
VIN=5.0V
Fig.17 Output current at shortcircuit
0.0
1.0
2.0
3.0
4.0
5.0
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
TURN OFF TIME :
TOFF2 [μs]
VIN=5.0V
Fig.25 Output turn off time
2.0
2.1
2.2
2.3
2.4
2.5
-50 0 50 100
AMBIENT TEMPERATURE : Ta[℃]
UVLO THRESHOLD VOLTAGE :
VUVLOH , VUVLOL [V]
VUVLOH
VUVLOL
Fig.26 UVLO threshold voltage
BD2061AFJ,BD2065AFJ
Technical Note
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●Waveform data
Regarding the output rise/fall and over current detection characteristics of BD2065AFJ, refer to the characteristic of BD2061AFJ.
VIN=5V
TIME (2ms/div.)
Fig.32 Over current response
Ramped load
(BD2061AFJ)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
TIME (2ms/div.)
Fig.33 Over current response
Enable to shortcircuit
(BD2061AFJ)
VIN=5V
CL=100μF
V/EN
(5V/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
V/EN
(5V/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
TIME(1ms/div.)
Fig.28 Output rise characteristic
(BD2061AFJ)
V/EN
(5V/div.)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(0.5A/div.)
TIME(1ms/div.)
Fig.29 Output fall characteristic
(BD2061AFJ)
TIME (2ms/div.)
Fig.34 Over current response
Enable to shortcircuit
(BD2061AFJ)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.) VIN=5V
CL=100μF
TIME (0.2s/div.)
Fig.35 Over current response
Enable to shortcircuit
(BD2061AFJ)
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
TIME (0.5ms/div.)
Fig30 Inrush current response
(BD2061AFJ)
(5V/div.)
VEN
IOUT
(0.5A/div.)
TIME (20ms/div.)
Fig.31 Over current response
Ramped load
(BD2061AFJ)
Thermal Shutdown VIN=5V
CL=100μF
V/OC
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
CL=47μF
CL=220μF
CL=147μF
VIN=5V
RL= 5Ω
VIN=5V
V/OC
(5V/div.)
CL=330μF
VIN=5V
RL=10Ω
CL=100μF
VIN=5V
RL=10Ω
CL=100μF
(5V/div.)
TIME (10ms/div.)
Fig.36 UVLO response
Increasing VIN
(BD2061AFJ)
VIN
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
TIME (10ms/div.)
Fig.37 UVLO response
Decreasing VIN
(BD2061AFJ)
(5V/div.)
VIN
(5V/div.)
VOUT
(5V/div.)
IOUT
(1.0A/div.)
V/OC
V/OC RL=5Ω
CL=147μF
RL=5Ω
CL=147μF
BD2061AFJ,BD2065AFJ
Technical Note
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●Block diagram
IN
IN
/OC
EN(/EN)
OUT
OUT
OUT
GND
Charge
pump
Gate logic
TSD
OCD
UVLO
1
2
3
4
8
7
6
5
GND
IN
IN
/OC
OUT
OUT
OUT
Top View
EN(/EN)
Fig.38 Block diagram Fig.39 Pin Configuration
●Pin description
◎BD2061AFJ
Pin No. Symbol I / O Pin function
1 GND I Ground.
2, 3 IN I
Power supply input.
Input terminal to the power switch and power supply input terminal of the internal circuit.
At use, connect each pin outside.
4 /EN I
Enable input.
Power switch on at Low level.
High level input > 2.0V, Low level input < 0.8V.
5 /OC O
Error flag output.
Low at over current, thermal shutdown.
Open drain output.
6, 7, 8 OUT O Power switch output.
At use, connect each pin outside.
◎BD2065AFJ
Pin No. Symbol I / O Pin function
1 GND I Ground.
2, 3 IN I
Power supply input.
Input terminal to the power switch and power supply input terminal of the internal circuit.
At use, connect each pin outside.
4 EN I
Enable input.
Power switch on at High level.
High level input > 2.0V, Low level input < 0.8V
5 /OC O
Error flag output.
Low at over current, thermal shutdown.
Open drain output.
6, 7, 8 OUT O Power switch output.
At use, connect each pin outside.
BD2061AFJ,BD2065AFJ
Technical Note
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●I/O circuit
Symbol Pin No Equivalent circuit
EN(/EN) 4
/OC 5
OUT 6,7,8
●Functional description
1. Switch operation
IN terminal and OUT terminal are connected to the drain and the source of switch MOSFET respectively. And the IN
terminal is used also as power source input to internal control circuit.
When the switch is turned on from EN/EN control input, IN terminal and OUT terminal are connected by a 80mΩ switch. In
on status, the switch is bidirectional. Therefore, when the potential of OUT terminal is higher than that of IN terminal,
current flows from OUT terminal to IN terminal.
Since a parasitic diode between the drain and the source of switch MOSFET is canceled, in the off status, it is possible to
prevent current from flowing reversely from OUT to IN.
2. Thermal shutdown circuit (TSD)
If over current would continue, the temperature of the IC would increase drastically. If the junction temperature were
beyond 140℃ (typ.) in the condition of over current detection, thermal shutdown circuit operates and makes power switch
turn off and outputs error flag (/OC). Then, when the junction temperature decreases lower than 120℃ (typ.), power
switch is turned on and error flag (/OC) is cancelled. Unless the fact of the increasing chips temperature is removed or the
output of power switch is turned off, this operation repeats.
The thermal shutdown circuit operates when the switch is on (EN,/EN signal is active).
3. Over current detection (OCD)
The over current detection circuit limits current (ISC) and outputs error flag (/OC) when current flowing in each switch
MOSFET exceeds a specified value. There are three types of response against over current. The over current detection
circuit works when the switch is on (EN,/EN signal is active).
3-1. When the switch is turned on while the output is in shortcircuit status
When the switch is turned on while the output is in shortcircuit status or so, the switch gets in current limit status soon.
3-2. When the output shortcircuits while the switch is on
When the output shortcircuits or large capacity is connected while the switch is on, very large current flows until the
over current limit circuit reacts. When the current detection, limit circuit works, current limitation is carried out.
3-3. When the output current increases gradually
When the output current increases gradually, current limitation does not work until the output current exceeds the over
current detection value. When it exceeds the detection value, current limitation is carried out.
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4. Under voltage lockout (UVLO)
UVLO circuit prevents the switch from turning on until the VIN exceeds 2.3V(Typ.). If the VIN drops below 2.2V(Typ.) while
the switch turns on, then UVLO shuts off the power switch. UVLO has hysteresis of a 100mV(Typ).
Under voltage lockout circuit works when the switch is on (EN,/EN signal is active).
5. Error flag (/OC) output
Error flag output is N-MOS open drain output. At detection of over current, thermal shutdown, low level is output.
Over current detection has delay filter. This delay filter prevents instantaneous current detection such as inrush current at
switch on, hot plug from being informed to outside.
V/EN
VOUT
IOUT
V/OC
Out
p
ut shortcircuit
Thermal shut down
delay
Fig.40 Over current detection, thermal shutdown timing
(BD2061AFJ)
VEN
VOUT
IOUT
V/OC
Out
p
ut shortcircuit
Thermal shut down
delay
Fig.41 Over current detection, thermal shutdown timing
(BD2065AFJ)
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Technical Note
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0
100
200
300
400
500
600
0 25 50 75 100 125 150
AMBIENT TEMPERATURE: Ta [℃]
POWER DISSIPATION: Pd[mW]
●Typical application circuit
IN
OUT
Regulator
OUT
OUT
OUTIN
IN
/
O
C
GND VBUS
D-
D+
GND
USB
Controlle
VBUS
D
-
D+
GND
5V(typ.)
10k~
100kΩ
CL
CIN
-
+
EN
(
/
EN
)
Ferrite
Beads
Ferrite
Beads
Fig.42 Typical application circuit
●Application information
When excessive current flows owing to output shortcircuit or so, ringing occurs by inductance of power source line to IC, and
may cause bad influences upon IC actions. In order to avoid this case, connect a bypath capacitor by IN terminal and GND
terminal of IC. 1μF or higher is recommended.
Pull up /OC output by resistance 10kΩ ~ 100kΩ.
Set up value which satisfies the application as CL and Ferrite Beads.
This system connection diagram doesn’t guarantee operating as the application.
The external circuit constant and so on is changed and it uses, in which there are adequate margins by taking into account
external parts or dispersion of IC including not only static characteristics but also transient characteristics.
●Power dissipation character
(SOP-J8)
Fig.43 Power dissipation curve (Pd-Ta Curve)
BD2061AFJ,BD2065AFJ
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●Notes for use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any
special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety
measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The
electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due
to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard,
for the digital block power supply and the analog block power supply, even though these power supplies has the same
level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing
the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns.
For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the
same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used
present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can
break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between
the terminal and the power supply or the GND terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig.
After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition,
for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic
element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal.
Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than
the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when
no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals
a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a
degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc.
(12) Thermal shutdown circuit (TSD)
When junction temperatures become detected temperatures or higher, the thermal shutdown circuit operates and turns a
switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible,
is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit
operating or use the LSI assuming its operation.
(13) Thermal design
Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use.
BD2061AFJ,BD2065AFJ
Technical Note
12/12
www.rohm.com 2011.05 - Rev.B
© 2011 ROHM Co., Ltd. All rights reserved.
●Ordering part number
B D 2 0 6 1 A F J - E 2
Part No. Part No.
2061A
2065A
Package
FJ: SOP-J8
Packaging and forming specification
E2: Embossed tape and reel
(SOP-J8)
∗
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP-J8
4°+6°
−4°
0.2±0.1
0.45MIN
234
5678
1
4.9±0.2
0.545
3.9±0.2
6.0±0.3
(MAX 5.25 include BURR)
0.42±0.1
1.27
0.175
1.375±0.1
0.1 S
S
R1120
A
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© 2011 ROHM Co., Ltd. All rights reserved.
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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