RT8059GJ5 - Richtek - Product.Network

RT8059

DS8059-04 December 2011 www.richtek.com

Features

zWide Input Voltage from 2.8V to 5.5V

zAdjustable Output from 0.6V to VIN

z1A Output Current

z95% Efficiency

zNo Schottky Diode Required

z1.5MHz Fixed Frequency PWM Operation

zSmall TSOT-23-5 Package

zRoHS Compliant and Halogen Free

Applications

zNIC Card

zCellular Telephones

zPersonal Information Appliances

zWireless and DSL Modems

zMP3 Players

zPortable Instruments

1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter

General Description

The RT8059 is a high efficiency Pulse Width Modulated

(PWM) step-down DC/DC converter, capable of delivering

1A output current over a wide input voltage range from

2.8V to 5.5V. The RT8059 is ideally suited for portable

electronic devices that are powered by 1-cell Li-ion battery

or by other power sources within the range, such as cellular

phones, PDAs and handy-terminals.

Internal synchronous rectifier with low RDS(ON) dramatically

reduces conduction loss at PWM mode. No external

Schottky diode is required in practical applications. The

RT8059 automatically turns off the synchronous rectifier

when the inductor current is low and enters discontinuous

PWM mode. This can increase efficiency in light load

condition.

The RT8059 enters low dropout mode when normal PWM

cannot provide regulated output voltage by continuously

turning on the upper P-MOSFET. The RT8059 enters

shutdown mode and consumes less than 0.1μA when the

EN pin is pulled low.

The switching ripple can be easily smoothed out by small

package filtering elements due to a fixed operation

frequency of 1.5MHz. This along with small TSOT-23-5

package provides small PCB area application. Other

features include soft-start, lower internal reference voltage

with 2% accuracy, over temperature protection, and over

current protection.

Ordering Information

Pin Configurations

(TOP VIEW)

TSOT-23-5

Note :

Richtek products are :

` RoHS compliant and compatible with the current

require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering

processes.

EN GND LX

FB VIN

BQ= : Product Code

DNN : Date Code

Marking Information

BQ=DNN

RT8059

Package Type

J5 : TSOT-23-5

Lead Plating System

G : Green (Halogen Free and Pb Free)

RT8059

DS8059-04 December 2011www.richtek.com

Typical Application Circuit

⎟

⎠

⎞

⎜

⎝

⎛+= R2

1 x VV REFOUT

with R2 = 60kΩ to 300kΩ , IR2 = 2μA to 10μA,

and (R1 x C1) should be in the range between 3x10−6 and 6x10−6 for component selection.

Functional Pin Description

Pin No. Pin Name Pin Function

1 EN Chip Enable (Active High). Do not leave the EN pin floating.

2 GND Ground.

3 LX Switch Node.

4 VIN Power Input.

5 FB Feedback Input Pin.

Function Block Diagram

4.7µF

10µF

VIN LX

GND

RT8059

EN FB

2.2µH

2.8V to 5.5V

VIN VOUT

CIN

COUT

IR2

COMP

RS1

RS2

EN VIN

UVLO

VREF

Slope

Compensation

Current

Sense

OSC &

Shutdown

Control

Zero

Detector

Current

Limit

Detector

Driver

Control

Logic

GND

Error

Amplifier

PWM

Comparator

RT8059

DS8059-04 December 2011 www.richtek.com

Absolute Maximum Ratings (Note 1)

zVIN to GND -------------------------------------------------------------------------------------------------------- 6.5V

zLX Pin Switch Voltage ------------------------------------------------------------------------------------------ −0.3V to (PVDD + 0.3V)

< 30ns -------------------------------------------------------------------------------------------------------------- −5V to 7.5V

zEN, FB to GND --------------------------------------------------------------------------------------------------- VIN + 0.6V

zPower Dissipation, PD @ TA = 25°C

TSOT-23-5 --------------------------------------------------------------------------------------------------------- 0.392W

zPackage Thermal Resistance (Note 2)

TSOT-23-5, θJA --------------------------------------------------------------------------------------------------- 255°C/W

zJunction Temperature Range ---------------------------------------------------------------------------------- 150°C

zLead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------- 260°C

zStorage Temperature Range ----------------------------------------------------------------------------------- −65°C to 150°C

zESD Susceptibility (Note 3)

HBM (Human Body Mode) ------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) -------------------------------------------------------------------------------------------- 200V

Electrical Characteristics

(VIN = 3.6V, VOUT = 2.5V, L = 2.2μH, CIN = 4.7μF, C OUT = 10μF, T A = 25°C, unless otherwise specified)

Recommended Operating Conditions (Note 4)

zSupply Input Voltage, VIN -------------------------------------------------------------------------------------- 2.8V to 5.5V

zJunction Temperature Range ---------------------------------------------------------------------------------- −40°C to 125°C

zAmbient Temperature Range ---------------------------------------------------------------------------------- −40°C to 85°C

Parameter Symbol Test Conditions Min Typ Max Unit

Quiescent Current IQ I

OUT = 0mA, VFB = VREF + 5% -- 78 -- μA

Shutdown Current ISH DN EN = GND -- 0.1 1 μA

Reference Voltage VREF 0.588 0.6 0.612 V

Adjustable Output Range VOUT (Note 5) VREF -- VIN − 0.2 V

Adjustable Output Voltage

Accuracy ΔVOUT VIN = VOUT + ΔV to 5.5V,

0A < IOUT < 1A, (Note 6) −3 -- 3 %

FB Input Current IFB VFB = VIN −50 -- 50 nA

P-MOSFET RON R

DS(ON)_P

OUT = 200mA -- 0.28 --

N-MOSFET RON R

DS(ON)_N I

OUT = 200mA -- 0.25 -- Ω

P-Channel Current Limit ILM_P V

IN = 2.8V to 5.5V -- 1.5 -- A

Logic-High VIH V

IN = 2.8V to 5.5V 1.5 -- --

EN Input Threshold

Voltag e Logic-Low VIL V

IN = 2.8V to 5.5V -- -- 0.4 V

Under Voltage Lockout Threshold VUVLO -- 2.3 -- V

Under Voltage Lockout Hysteresis ΔVUVLO -- 0.2 -- V

Oscillator Frequency fOSC I

OUT = 100mA 1.2 1.5 1.8 MHz

Thermal Shutdown Temperature TSD -- 150 -- °C

Max. Duty Cycle DMAX 100 -- -- %

RT8059

DS8059-04 December 2011www.richtek.com

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3.

Note 3. Devices are ESD sensitive. Handling precaution recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by design.

Note 6. ΔV = IOUT x RDS(ON)

RT8059

DS8059-04 December 2011 www.richtek.com

Typical Operating Characteristics

Current Limit vs. Tem p erature

0.5

0.7

0.9

1.1

1.3

1.5

1.7

1.9

2.1

-50 -25 0 25 50 75 100 125

Temperature (°C)

Current Limit (A)

VIN = 3.3V, VOUT = 1.2V

Reference Voltage vs. Temperature

0.580

0.585

0.590

0.595

0.600

0.605

0.610

0.615

0.620

-50 -25 0 25 50 75 100 125

Temperature (°C)

Reference Voltage (V)

VIN = 3.3V, IOUT = 0.1A

Frequency vs. Temperature

1.20

1.25

1.30

1.35

1.40

1.45

1.50

1.55

1.60

1.65

1.70

-50-250 255075100125

Temperature (°C)

Frequency (MHz) 1

VIN = 3.3V, VOUT = 1.2V,

IOUT = 0.3A

Reference Voltage vs. Input Voltage

0.580

0.585

0.590

0.595

0.600

0.605

0.610

0.615

0.620

2.5 3 3.5 4 4.5 5 5.5

Input Voltage (V)

Reference Voltage (V)

IOUT = 0.1A

Output Voltage vs. Output Current

1.180

1.185

1.190

1.195

1.200

1.205

1.210

1.215

1.220

1.225

1.230

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Output Current (A)

Output Voltage (V)

VIN = 3.3V

100

0.01 0.1 1

Load Current (A)

Efficiency (%)

Efficiency vs. Load Current

VIN = 3.3V, VOUT = 2.5V

VIN = 5.5V, VOUT = 2.5V

VIN = 3.3V, VOUT = 1.2V

VIN = 5.5V, VOUT = 1.2V

RT8059

DS8059-04 December 2011www.richtek.com

Load Transient Response

Time (100μs/Div)

VIN = 3.3V, VOUT = 1.2V,

IOUT = 0.5A to 1A

VOUT

(50mV/Div)

IOUT

(500mA/Div)

Load Transient Response

Time (100μs/Div)

VOUT

(50mV/Div)

IOUT

(500mA/Div)

VIN = 3.3V, VOUT = 1.2V,

IOUT = 0.1A to 1A

Switching

Time (250ns/Div)

IOUT

(1A/Div)

VLX

(2V/Div)

VOUT

(5mV/Div)

VIN = 3.3V, VOUT = 1.2V,

IOUT = 1A

Power On from EN

Time (500μs/Div)

IOUT

(1A/Div)

VEN

(2V/Div)

VOUT

(500mV/Div)

VIN = 3.3V,

VOUT = 1.2V,

IOUT = 1A

Power Off from EN

Time (500μs/Div)

VIN = 3.3V,

VOUT = 1.2V,

IOUT = 1A

IOUT

(1A/Div)

VEN

(2V/Div)

VOUT

(500mV/Div)

Switching

Time (250ns/Div)

VIN = 3.3V, VOUT = 1.2V,

IOUT = 0.5A

IOUT

(1A/Div)

VLX

(2V/Div)

VOUT

(5mV/Div)

RT8059

DS8059-04 December 2011 www.richtek.com

Applications Information

The basic RT8059 application circuit is shown in Typical

Application Circuit. External component selection is

determined by the maximum load current and begins with

the selection of the inductor value and operating frequency

followed by CIN and COUT.

Inductor Selection

For a given input and output voltage, the inductor value

and operating frequency determine the ripple current. The

ripple current ΔIL increases with higher VIN and decreases

with higher inductance.

Having a lower ripple current reduces the ESR losses in

the output capacitors and the output voltage ripple. Highest

efficiency operation is achieved at low frequency with small

ripple current. This, however, requires a large inductor.

A reasonable starting point for selecting the ripple current

is ΔIL = 0.4(IMAX). The largest ripple current occurs at the

highest VIN. To guarantee that the ripple current stays

below a specified maximum, the inductor value should be

chosen according to the following equation :

Inductor Core Selection

Once the value for L is known, the type of inductor can be

selected. High efficiency converters generally cannot afford

the core loss found in low cost powdered iron cores, forcing

the use of more expensive ferrite or mollypermalloy cores.

Actual core loss is independent of core size for a fixed

inductor value but it is very dependent on the inductance

selected. As the inductance increases, core losses

decrease. Unfortunately, increased inductance requires

more turns of wire and therefore, results in higher copper

losses.

Ferrite designs have very low core losses and are preferred

at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core material saturates “hard”, which means

that inductance collapses abruptly when the peak design

⎥

⎦

⎤

⎢

⎣

⎡−×

⎥

⎦

⎤

⎢

⎣

⎡

OUTOUT

ΔI

⎥

⎦

⎤

⎢

⎣

⎡−×

⎥

⎦

⎤

⎢

⎣

⎡

Δ×

IN(MAX)

OUT

L(MAX)

OUT

current is exceeded. This results in an abrupt increase in

inductor ripple current and consequent output voltage ripple.

Do not allow the core to saturate!

Different core materials and shapes will change the size/

current and price/current relationship of an inductor.

Toroid or shielded pot cores in ferrite or permalloy materials

are small and don't radiate energy but generally cost more

than powdered iron core inductors with similar

characteristics. The choice of which style inductor to use

mainly depends on the price vs size requirements and

any radiated field/EMI requirements.

CIN and COUT Selection

The input capacitance, CIN, is needed to filter the

trapezoidal current at the source of the top MOSFET. To

prevent large ripple voltage, a low ESR input capacitor

sized for the maximum RMS current should be used. RMS

current is given by :

⎥

⎦

⎤

⎢

⎣

⎡+≤

OUT

LOUT 8fC

ESR ΔIΔV

OUT

OUT(MAX)RMS −=

This formula has a maximum at VIN = 2VOUT, where

IRMS = IOUT/2. This simple worst-case condition is

commonly used for design because even significant

deviations do not result in much difference. Note that ripple

current ratings from capacitor manufacturers are often

based on only 2000 hours of life which makes it advisable

to further derate the capacitor, or choose a capacitor rated

at a higher temperature than required. Several capacitors

may also be paralleled to meet size or height requirements

in the design.

The selection of COUT is determined by the effective series

resistance (ESR) that is required to minimize voltage ripple

and load step transients, as well as the amount of bulk

capacitance that is necessary to ensure that the control

loop is stable. Loop stability can be checked by viewing

the load transient response as described in a later section.

The output ripple, ΔVOUT, is determined by :

where f is the switching frequency and ΔIL is the inductor

ripple current.

RT8059

DS8059-04 December 2011www.richtek.com

The output ripple is highest at maximum input voltage

since ΔIL increases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and

RMS current handling requirements. Dry tantalum, special

polymer, aluminum electrolytic and ceramic capacitors are

all available in surface mount packages. Special polymer

capacitors offer very low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

highest capacitance density but it is important to only

use types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

significantly higher ESR but can be used in cost-sensitive

applications provided that consideration is given to ripple

current ratings and long term reliability. Ceramic capacitors

have excellent low ESR characteristics but can have a

high voltage coefficient and audible piezoelectric effects.

The high Q of ceramic capacitors with trace inductance

can also lead to significant ringing.

Using Cera mic Input a nd Output Ca pa citors

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at the input and

output. When a ceramic capacitor is used at the input

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

input, VIN. At best, this ringing can couple to the output

and be mistaken as loop instability. At worst, a sudden

inrush of current through the long wires can potentially

cause a voltage spike at VIN large enough to damage the

part.

Output Voltage Setting

The resistive voltage divider allows the FB pin to sense a

fraction of the output voltage as shown in Figure 1.

RT8059

GND

VOUT

Figure 1. Setting Output Voltage

)

(1VV REFOUT +=

For adjustable voltage mode, the output voltage is set by

an external resistive voltage divider according to the

following equation :

where VREF is the internal reference voltage (0.6V typ.)

Checking T ransient Re sponse

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to ΔILOAD (ESR), where ESR is the effective series

resistance of COUT. ΔILOAD also begins to charge or

discharge COUT generating a feedback error signal used

by the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing which would indicate a stability

problem.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the ambient temperature, and θJA is the junction to ambient

thermal resistance.

For recommended operating condition specifications of

the RT8059, the maximum junction temperature is 125°C

and TA is the ambient temperature. The junction to ambient

thermal resistance, θJA, is layout dependent. For TSOT-

23-5 packages, the thermal resistance, θJA, is 255°C/W

on a standard JEDEC 51-3 single-layer thermal test board.

The maximum power dissipation at TA = 25°C can be

calculated by the following formula :

PD(MAX) = (125°C − 25°C) / (255°C/W) = 0.392W for

TSOT-23-5 package

RT8059

DS8059-04 December 2011 www.richtek.com

Figure 2. Derating Curves for RT8059 Package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance, θJA. For the RT8059 package, the derating

curves in Figure 2 allow the designer to see the effect of

rising ambient temperature on the maximum power

dissipation.

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of the RT8059.

` Keep the trace of the main current paths as short and

wide as possible.

` Place the input capacitor as close as possible to the

device pins (VIN and GND).

` LX node experiences high frequency voltage swings

and should be kept in a small area. Keep analog

components away from the LX node to prevent stray

capacitive noise pick-up.

` Place the feedback components as close as possible to

the FB pin.

` GND and Exposed Pad must be connected to a strong

ground plane for heat sinking and noise protection.

GND

VIN

GND

VIN VOUT

COUT

CIN

GND

R1 R2

VOUT

Figure 3. PCB Layout Guide

0.00

0.03

0.06

0.09

0.12

0.15

0.18

0.21

0.24

0.27

0.30

0.33

0.36

0.39

0.42

0255075100125

Ambient Temperature (°C)

Maximum Power Dissipation (W) 1

Single-Layer PCB

RT8059

DS8059-04 December 2011www.richtek.com

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

TSOT-23-5 Surface Mount Pack age

Dime nsions In Mi ll imete rs Dim en sions In I nches

Symbol Min Max Min Max

A 0.700 1.000 0.028 0.039

A1 0.000 0.100 0.000 0.004

B 1.397 1.803 0.055 0.071

b 0.300 0.559 0.012 0.022

C 2.591 3.000 0.102 0.118

D 2.692 3.099 0.106 0.122

e 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

L 0.300 0.610 0.012 0.024

AA1

Outline Dimension