±1°C Accurate, 12-Bit Digital
Temperature Sensor
Data Sheet
ADT75
Rev. B
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FEATURES
12-bit temperature-to-digital converter
B grade accuracy ±1.0°C from 0°C to 70°C
A grade accuracy ±2.0°C from −25°C to +100°C
SMBus/I2C-compatible interface
Operation from −55°C to +125°C
Operation from 2.7 V to 5.5 V
Overtemperature indicator
Shutdown mode for low power consumption
Power consumption 79 µW typically at 3.3 V
Small, low cost 8-lead MSOP in Pb-Sn and Pb-free packages
Standard 8-lead SOIC Pb-free package
APPLICATIONS
Isolated sensors
Environmental control systems
Computer thermal monitoring
Thermal protection
Industrial process control
Power-system monitors
Hand-held applications
PRODUCT HIGHLIGHTS
1. On-chip temperature sensor allows an accurate measurement
of the ambient temperature. The measurable temperature
range is −55°C to +125°C.
2. Supply voltage is 2.7 V to 5.5 V.
3. Space-saving, 8-lead MSOP and 8-lead SOIC.
4. Temperature accuracy is ±1°C maximum.
5. Temperature resolution is 0.0625°C.
6. Shutdown mode reduces the current consumption to
3 µA typical.
7. Connect up to eight ADT75s to a single SMBus/I2C bus.
FUNCTIONAL BLOCK DIAGRAM
CLK AND
TIMING
GENERATION
3
8
1
LPF
Σ-Δ
DIGITAL
COMPARATOR OS/ALERT
V
DD
4
GND
SDA
SCL
A2
A1
A0
TEMPERATURE
SENSOR TEMPERATURE
SENSOR
REGISTER
CONFIGURATION
REGISTER
T
HYST
SETPOI NT
REGISTER
T
OS
SETPOI NT
REGISTER
POINTER
REGISTER
SMBus/I
2
C INTERFACE
1-BIT
12-BIT
DECIMATOR
1-BIT
DAC
REFERENCE
+
–
2
7
5
6
05326-001
Figure 1.
ADT75 Data Sheet
Rev. B | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications ..................................................................................... 4
A Grade .......................................................................................... 4
B Grade .......................................................................................... 5
Timing Specifications and Diagram .......................................... 6
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 10
Circuit Information .................................................................... 10
Converter Details........................................................................ 10
Functional Description .............................................................. 10
Temperature Data Format ......................................................... 11
One-Shot Mode .......................................................................... 12
Fault Queue ................................................................................. 12
Registers ....................................................................................... 13
Serial Interface ............................................................................ 16
Writing Data ............................................................................... 17
Reading Data ............................................................................... 18
OS/Alert Output OverTemperature Modes ............................ 19
SMBus Alert ................................................................................ 20
Applications Information .............................................................. 21
Thermal Response Time ........................................................... 21
Self-Heating Effects .................................................................... 21
Supply Decoupling ..................................................................... 21
Temperature Monitoring ........................................................... 22
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
8/12—Rev. A to Rev. B
Changed 3 V to 2.7 V, Features Section and 3 V to 2.7 V,
Product Highlights Section ............................................................. 1
Changed 3 V to 2.7 V, General Description Section .................... 3
Changed 3 V to 2.7 V, A Grade Section and 3 V to 2.7 V, Table 1 .... 4
Changed 3 V to 2.7 V, B Grade Section and 3 V to 2.7 V, Table 2 .... 5
Changed 3 V to 2.7 V, Table 5 .................................................................... 8
Changes to Figure 7 and Figure 8 ................................................... 9
9/10—Rev. 0 to Rev. A
Changes to Figure 1 ........................................................................... 1
Updated Outline Dimensions ....................................................... 23
Changes to Ordering Guide .......................................................... 23
10/05—Revision 0: Initial Version
Data Sheet ADT75
Rev. B | Page 3 of 24
GENERAL DESCRIPTION
The ADT75 is a complete temperature monitoring system in
8-lead MSOP and SOIC packages. It contains a band gap
temperature sensor and a 12-bit analog-to-digital converter
(ADC) to monitor and digitize the temperature to a resolution
of 0.0625°C. The ADT75 is pin and register compatible with the
LM75 and AD7416.
The ADT75 is guaranteed to operate at supply voltages from
2.7 V to 5.5 V. Operating at 3.3 V, the average supply current is
typically 200 µA.
The ADT75 offers a shutdown mode that powers down the
device, and this mode gives a shutdown current of typically 3 µA.
The ADT75 is rated for operation over the −55°C to +125°C
temperature range.
The A0, A1, and A2 pins are available for address selection. The
OS/ALERT pin is an open-drain output that becomes active when
temperature exceeds a programmable limit. The OS/ALERT pin
can operate in either comparator or interrupt mode.
ADT75 Data Sheet
Rev. B | Page 4 of 24
SPECIFICATIONS
A GRADE
TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE SENSOR AND ADC
Accuracy at V
DD
= 2.7 V to 5.5 V ±2 °C T
A
= −25°C to +100°C
±3 °C T
A
= −55°C to +100°C
Accuracy at V
DD
= 2.7 V to 3.6 V ±3 °C T
A
= 100°C to 125°C
Accuracy at V
DD
= 4.5 V to 5.5 V ±2 °C T
A
= 100°C to 125°C
ADC Resolution 12 Bits
Temperature Resolution 0.0625 °C
Temperature Conversion Time 60 ms
Update Rate
ms
Conversion started every 100 ms
Long Term Drift 0.08 °C Drift over 10 years, if part is operated at 55°C
Temperature Hysteresis 0.03 °C Temperature cycle = 25°C to 125°C to 25°C
OS/ALERT OUTPUT (OPEN DRAIN)
Output Low Voltage, V
OL
0.4 V I
OL
= 3 mA
Pin Capacitance 10 pF
High Output Leakage Current, I
OH
0.1 5 µA OS/ALERT pin pulled up to 5.5 V
R
ON
Resistance (Low Output) 15 Ω Supply and temperature dependent
DIGITAL INPUTS
Input Current ±1 µA V
IN
= 0 V to V
DD
Input Low Voltage, V
IL
0.3 × V
DD
V
Input High Voltage, V
IH
0.7 × V
DD
V
SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns
Pin Capacitance 3 10 pF
DIGITAL OUTPUT (OPEN DRAIN)
Output High Current, I
OH
1 mA V
OH
= 5 V
Output Low Voltage, V
OL
0.4 V I
OL
= 3 mA
Output High Voltage, V
OH
0.7 × V
DD
V
Output Capacitance, C
OUT
3 10 pF
POWER REQUIREMENTS
Supply Voltage 2.7 5.5 V
Supply Current at 3.3 V 350 500 µA Peak current while converting and I2C interface inactive
Supply Current at 5.0 V 380 525 µA Peak current while converting and I2C interface inactive
Average Current at 3.3 V
µA
Part converting and I2C interface inactive
Average Current at 5.0 V 225 µA Part converting and I
2
C interface inactive
Shutdown Mode at 3.3 V 3 8 µA Supply current in shutdown mode
Shutdown Mode at 5.0 V 5.5 12 µA Supply current in shutdown mode
Average Power Dissipation 798.6 µW V
DD
= 3.3 V, normal mode at 25°C
1 SPS
µW
Average power dissipated for V
DD
= 3.3 V,
shutdown mode at 25°C
140 µW Average power dissipated for VDD = 5.0 V,
shutdown mode at 25°C
Data Sheet ADT75
Rev. B | Page 5 of 24
B GRADE
TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V. All specifications for −55°C to +125°C, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE SENSOR AND ADC
Accuracy at V
DD
= 2.7 V to 5.5 V ±1 °C T
A
= 0°C to +70°C
±2 °C T
A
= −25°C to +100°C
±3 °C T
A
= −55°C to +100°C
Accuracy at V
DD
= 2.7 V to 3.6 V ±3 °C T
A
= 100°C to 125°C
Accuracy at VDD = 4.5 V to 5.5 V
°C
TA = 100°C to 125°C
ADC Resolution 12 bits
Temperature Resolution 0.0625 °C
Temperature Conversion Time 60 ms
Update Rate 100 ms Conversion started every 100 ms
Long Term Drift
°C
Drift over 10 years, if part is operated at 55°C
Temperature Hysteresis 0.03 °C Temperature cycle = 25°C to 125°C to 25°C
OS/ALERT OUTPUT (OPEN DRAIN)
Output Low Voltage, V
OL
0.4 V I
OL
= 3 mA
Pin Capacitance 10 pF
High Output Leakage Current, I
OH
0.1 5 µA OS/ALERT pin pulled up to 5.5 V
R
ON
Resistance (Low Output) 15 Ω Supply and temperature dependent
DIGITAL INPUTS
Input Current ±1 µA V
IN
= 0 V to V
DD
Input Low Voltage, V
IL
0.3 × V
DD
V
Input High Voltage, V
IH
0.7 × V
DD
V
SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns
Pin Capacitance 3 10 pF
DIGITAL OUTPUT (OPEN DRAIN)
Output High Current, I
OH
1 mA V
OH
= 5 V
Output Low Voltage, V
OL
0.4 V I
OL
= 3 mA
Output High Voltage, V
OH
0.7 × V
DD
V
Output Capacitance, C
OUT
3 10 pF
POWER REQUIREMENTS
Supply Voltage 2.7 5.5 V
Supply Current at 3.3 V 350 500 µA Peak current while converting and I2C interface inactive
Supply Current at 5.0 V 380 525 µA Peak current while converting and I2C interface inactive
Average Current at 3.3 V
µA
Part converting and I
2
C interface inactive
Average Current at 5.0 V
µA
Part converting and I2C interface inactive
Shutdown Mode at 3.3 V 3 8 µA Supply current in shutdown mode
Shutdown Mode at 5.0 V 5.5 12 µA Supply current in shutdown mode
Average Power Dissipation 798.6 µW V
DD
= 3.3 V, normal mode at 25°C
1 SPS 78.6 µW Average power dissipated for VDD = 3.3 V,
shutdown mode at 25°C
140 µW Average power dissipated for VDD = 5.0 V,
shutdown mode at 25°C
ADT75 Data Sheet
Rev. B | Page 6 of 24
TIMING SPECIFICATIONS AND DIAGRAM
Measure the SDA and SCL timing with the input filters turned on to meet the fast mode I2C specification. Switching off the input filters
improves the transfer rate but has a negative effect on the EMC behavior of the part.
TA = TMIN to TMAX, VDD = 2.7 V to 5.5 V, unless otherwise noted.
Table 3.
Parameter1 Min Typ Max Unit Test Conditions/Comments
Serial Clock Period, t
1
2.5 µs Fast mode I
2
C. See Figure 2
Data In Setup Time to SCL High, t
2
50 ns See Figure 2
Data Out Stable After SCL Low, t
3
0 0.92 ns Fast mode I2C. See Figure 2
Data Out Stable After SCL Low, t
3
0 3.452 µs Standard mode I2C. See Figure 2
SDA Low Setup Time to SCL Low (Start Condition), t
4
50 ns See Figure 2
SDA High Hold Time After SCL High (Stop Condition), t
5
50 ns See Figure 2
SDA and SCL Rise Time, t
6
300 ns Fast mode I
2
C. See Figure 2
SDA and SCL Rise Time, t
6
1000 ns Standard mode I2C. See Figure 2
SDA and SCL Fall Time, t
7
300 ns See Figure 2
Capacitive Load for each Bus Line, CB
400
pF
1 Guaranteed by design and characterization; not production tested.
2 This time has to be met only if the master does not stretch the low period of the SCL signal.
SCL
t
4
t
2
t
1
t
3
t
5
t
7
SDA
DATA IN
SDA
DATA OUT
t
6
05326-002
Figure 2. SMBus/I2C Timing Diagram
Data Sheet ADT75
Rev. B | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
V
DD
to GND –0.3 V to +7 V
SDA Input Voltage to GND –0.3 V to V
DD
+ 0.3 V
SDA Output Voltage to GND –0.3 V to V
DD
+ 0.3 V
SCL Input Voltage to GND –0.3 V to V
DD
+ 0.3 V
OS/ALERT Output Voltage to GND –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range –55°C to +150°C
Storage Temperature Range –65°C to +160°C
Maximum Junction Temperature, TJMAX
150.7°C
8-Lead MSOP (RM-8)
Power Dissipation
1, 2
W
MAX
= (T
JMAX
− T
A
)/θ
JA
Thermal Impedance3
θ
JA
, Junction-to-Ambient (Still Air) 205.9°C/W
θJC, Junction-to-Case
43.74°C/W
8-Lead SOIC (R-8)
Power Dissipation
1, 2
W
MAX
= (T
JMAX
− T
A
)/θ
JA
Thermal Impedance3
θ
JA
, Junction-to-Ambient (Still Air) 157°C/W
θ
JC
, Junction-to-Case 56°C/W
IR Reflow Soldering
Peak Temperature 220°C (0°C/5°C)
Time at Peak Temperature 10 sec to 20 sec
Ramp-Up Rate 3°C/sec maximum
Ramp-Down Rate –6°C/sec maximum
Time 25°C to Peak Temperature 6 minutes maximum
IR Reflow Soldering (Pb-Free Package)
Peak Temperature 260°C (+0°C)
Time at Peak Temperature 20 sec to 40 sec
Ramp-Up Rate 3°C/sec maximum
Ramp-Down Rate –6°C/sec maximum
Time 25°C to Peak Temperature
8 minutes maximum
1 Values relate to package being used on a standard 2-layer PCB. This gives a
worst case θJA and θJC. Refer to Figure 3 for a plot of maximum power
dissipation vs. ambient temperature (TA).
2 TA = ambient temperature.
3 Junction-to-case resistance is applicable to components featuring a
preferential flow direction, for example, components mounted on a heat
sink. Junction-to-ambient resistance is more useful for air-cooled, PCB-
mounted components.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TEMPERATURE (°C)
MAXIMUM POWER DISSIPATION (Watts)
1.2
0.8
1.0
0.6
0.2
0.4
0
–55
–50
–40
–30
–20
–10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
150
05326-003
MAX PD = 3.4mW AT 150°C
Figure 3. MSOP Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
ADT75 Data Sheet
Rev. B | Page 8 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SDA 1
SCL 2
OS/ALERT 3
GND 4
VDD
8
A0
7
A1
6
A2
5
ADT75
TOP VIEW
(Not to Scale)
05326-004
Figure 4. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
SDA
SMBus/I2C Serial Data Input/Output. Serial data that is loaded into and read from the ADT75 registers is provided
on this pin. Open-drain configuration; needs a pull-up resistor.
2 SCL Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock in and clock out data to
and from any register of the ADT75. Open-drain configuration; needs a pull-up resistor.
3 OS/ALERT Over- and Undertemperature Indicator. Default power as an OS pin. Open-drain configuration; needs a pull-up resistor.
4 GND Analog and Digital Ground.
5 A2 SMBus/I
2
C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V
DD
.
6 A1 SMBus/I
2
C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V
DD
.
7 A0 SMBus/I2C Serial Bus Address Selection Pin. Logic input. Can be set to GND or V
DD
.
8 V
DD
Positive Supply Voltage, 2.7 V to 5.5 V. Decouple the supply to ground.
Data Sheet ADT75
Rev. B | Page 9 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
–1.0
–55 125
05326-023
TEMPERATURE (°C)
TEMPERATURE ERROR (°C)
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–35 –15 5 25 45 65 85 105
V
DD
= 3.3V
V
DD
= 5V
Figure 5. Temperature Accuracy at 3.3 V and 5 V
500
0
–55 125
05326-024
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
450
400
350
300
250
200
150
100
50
–35 –15 5 25 45 65 85 105
CONVERTING @ 5.5V
CONVERTING @ 3.3V
AVERAGE @ 5.5V
AVERAGE @ 3.3V
Figure 6. Operating Supply Current vs. Temperature
240
1952.6 5.6
AVERAGE SUP P LY CURRE NT (µ A)
SUPPLY VOLT AGE (V)
05326-025
200
205
210
215
220
225
230
235
3.1 3.6 4.1 4.6 5.1
TA = 30° C
Figure 7. Average Operating Supply Current vs. Supply Voltage at 30°C
7
6
1
2
3
4
5
0
2.6 5.6
SHUT DOWN CURRE NT (µ A)
SUPPLY VOLT AGE (V)
05326-026
3.1 3.6 4.1 4.6 5.1
TA = 30° C
Figure 8. Shutdown Current vs. Supply Voltage at 30°C
0.05
–0.0505.0
05326-027
SUPPLY RIPPLE FREQUENCY (MHz)
TEMPERATURE ERROR (°C)
0.04
0.03
0.02
0.01
0
–0.01
–0.02
–0.03
–0.04
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
TA = 25°C
A 0.1µF CAPACITOR IS CONNECTED AT THE VDD PIN.
VDD = 5V ± 10%
VDD = 3.3V ± 10%
Figure 9. Temperature Accuracy vs. Supply Ripple Frequency
0.025
–0.025014
05326-028
RECOVERY TIME AT 25°C (Hours)
TEMPERATURE ERROR (°C)
0.020
0.015
0.010
0.005
0
–0.005
–0.010
–0.015
–0.020
2 4 6 8 10
12
MSOP PACKAGE
SOIC PACKAGE
Figure 10. Response to Thermal Shock
ADT75 Data Sheet
Rev. B | Page 10 of 24
THEORY OF OPERATION
CIRCUIT INFORMATION
The ADT75 is a 12-bit digital temperature sensor with the 12th
bit acting as the sign bit. An on-board temperature sensor generates
a voltage precisely proportional to absolute temperature that is
compared to an internal voltage reference and input to a precision
digital modulator. Overall accuracy for the ADT75 A Grade is
±2°C from −25°C to +100°C and accuracy for the ADT75 B
Grade is ±1°C from 0°C to +70°C. Both grades have excellent
transducer linearity. The serial interface is SMBus /I2C- compatible
and the open-drain output of the ADT75 is capable of sinking 3 mA.
The on-board temperature sensor has excellent accuracy and
linearity over the entire rated temperature range without needing
correction or calibration by the user.
The sensor output is digitized by a first-order Σ-Δ modulator,
also known as the charge balance type ADC. This type of converter
uses time-domain oversampling and a high accuracy comparator to
deliver 12 bits of effective accuracy in an extremely compact circuit.
CONVERTER DETAILS
The ∑-∆ modulator consists of an input sampler, a summing
network, an integrator, a comparator, and a 1-bit DAC. Similar
to the voltage-to-frequency converter, this architecture creates a
negative feedback loop and minimizes the integrator output by
changing the duty cycle of the comparator output in response to
input voltage changes. The comparator samples the output of the
integrator at a much higher rate than the input sampling frequency;
this is called oversampling. Oversampling spreads the quantization
noise over a much wider band than that of the input signal,
improving overall noise performance and increasing accuracy.
Σ-∆MODULATOR
INTEGRATOR COMPARATOR
1-BIT
DAC
LPF DIGITAL
FILTER
CLOCK
GENERATOR
VOLTAGE REF
AND VPTAT
TEMPERATURE
VALUE
REGISTER
1-BIT
12-BIT
+
–
05326-011
Figure 11. First-Order Σ-Δ Modulator
The modulated output of the comparator is encoded using a
circuit technique that results in SMBus/I2C temperature data.
FUNCTIONAL DESCRIPTION
The conversion clock for the part is generated internally. No
external clock is required except when reading from and writing to
the serial port. In normal mode, the internal clock oscillator runs
an automatic conversion sequence. During this automatic
conversion sequence, a conversion is initiated every 100 ms.
At this time, the part powers up its analog circuitry and performs
a temperature conversion.
This temperature conversion typically takes 60 ms, after which time
the analog circuitry of the part automatically shuts down. The analog
circuitry powers up again 40 ms later, when the 100 ms timer times
out and the next conversion begins. The result of the most recent
temperature conversion is always available in the temperature
value register because the SMBus/I2C circuitry never shuts down.
The ADT75 can be placed in shutdown mode via the configuration
register, in which case the on-chip oscillator is shut down and
no further conversions are initiated until the ADT75 is taken out of
shutdown mode. The ADT75 can be taken out of shutdown mode
by writing 0 to Bit D0 in the configuration register. The ADT75
typically takes 1.7 ms to come out of shutdown mode. The
conversion result from the last conversion prior to shutdown can
still be read from the ADT75 even when it is in shutdown mode.
In normal conversion mode, the internal clock oscillator is reset
after every read or write operation. This causes the device to start a
temperature conversion, the result of which is typically available
60 ms later. Similarly, when the part is taken out of shutdown
mode, the internal clock oscillator is started and a conversion is
initiated.
The conversion result is typically available 60 ms later. Reading
from the device before a conversion is complete causes the
ADT75 to stop converting; the part starts again when serial
communication is finished. This read operation provides the
previous conversion result.
The measured temperature value is compared with a high
temperature limit, stored in the 16-bit TOS read/write register and
the hysteresis temperature limit, stored in the 16-bit THYST read/
write register. If the measured value exceeds these limits then the
OS/ALERT pin is activated. This OS/ALERT pin is programmable
for mode and polarity via the configuration register.
Data Sheet ADT75
Rev. B | Page 11 of 24
Configuration register functions consist of
• Switching between normal operation and full power-down.
• Switching between comparator and interrupt event modes.
• Setting the OS/ALERT pin active polarity.
• Setting the number of faults that activate the OS/ALERT pin.
• Enabling the one-shot mode.
• Enabling the SMBus alert function mode on the
OS/ALERT pin.
TEMPERATURE DATA FORMAT
One LSB of the ADC corresponds to 0.0625°C. The ADC can
theoretically measure a temperature range of 255°C (−128°C to
+127°C ), but the ADT75 is guaranteed to measure a low value
temperature limit of −55°C to a high value temperature limit of
+125°C. The temperature measurement result is stored in the
16-bit temperature value register and is compared with the high
temperature limit stored in the TOS setpoint register and the
hysteresis limit in the THYST setpoint register.
Temperature data in the temperature value register, the TOS
setpoint register and the THYST setpoint register, is represented
by a 12-bit twos complement word. The MSB is the temperature
sign bit. The four LSBs, Bit DB0 to Bit DB3, are not part of the
temperature conversion result and are always 0s. Table 6 shows
the temperature data format without Bit DB0 to Bit DB3.
Reading back the temperature from the temperature value
register requires a 2-byte read unless only a 1°C (8-bit) resolution
is required, then a 1-byte read is required. Designers that use a
9-bit temperature data format can still use the ADT75 by ignoring
the last three LSBs of the 12-bit temperature value. These three
LSBs are Bit D4 to Bit D6 in Table 6.
Table 6. 12-Bit Temperature Data Format
Temperature
Digital Output (Binary)
DB15 to DB4 Digital Output (Hex)
−55°C 1100 1001 0000 0xC90
−50°C 1100 1110 0000 0xCE0
−25°C 1110 0111 0000 0xE70
−0.0625°C 1111 1111 1111 0xFFF
0°C 0000 0000 0000 0x000
+0.0625°C 0000 0000 0001 0x001
+10°C 0000 1010 0000 0x0A0
+25°C 0001 1001 0000 0x190
+50°C 0011 0010 0000 0x320
+75°C 0100 1011 0000 0x4B0
+100°C 0110 0100 0000 0x640
+125°C 0111 1101 0000 0x7D0
Temperature Conversion Formulas
12-Bit Temperature Data Format
• Positive Temperature = ADC Code(d)/16
• Negative Temperature = (ADC Code(d)1− 4096)/16, or
Negative Temperature = (ADC Code(d)2 – 2048)/16
9-Bit Temperature Data Format
• Positive Temperature = ADC Code(d)/2
• Negative Temperature = (ADC Code(d)3 – 512)/2, or
Negative Temperature = (ADC Code(d)4 – 256)/2
8-Bit Temperature Data Format
• Positive Temperature = ADC Code(d)
• Negative Temperature = ADC Code(d)5 – 256, or Negative
Temperature = ADC Code(d)6 – 128
Bit DB7 (sign bit) is removed from the ADC code.
1 For ADC code, use all 12 bits of the data byte, including the sign bit.
2 For ADC code, Bit DB11 (sign bit) is removed from the ADC code.
3 For ADC code, use all 9 bits of the data byte, including the sign bit.
4 Bit DB8 (sign bit) is removed from the ADC code.
5 For the ADC code, use all 8 bits of the data byte, including the sign bit.
6 Bit DB7 (sign bit) is removed from the ADC code.
ADT75 Data Sheet
Rev. B | Page 12 of 24
ONE-SHOT MODE
Setting Bit D5 of the configuration register enables the one-shot
mode. When this mode is enabled, the ADT75 goes immediately
into shutdown mode and the current consumption is reduced to
typically 3 µA when VDD is 3.3 V and 5.5 µA when VDD is 5 V. A
one-shot temperature measurement is initiated when Address 0x04
is written to the address pointer register, which is writing to the
one-shot register. The ADT75 powers up, does a temperature
conversion, and powers down again.
Wait for a minimum of 60 ms after writing to the one-shot register
before reading back the temperature. This time ensures the ADT75
has time to power up and do a conversion. Reading back from the
one-shot register, Address 0x04, gives the resultant temperature
conversion. Reading from the temperature value register also
gives the same temperature value.
When either of the overtemperature detection modes is selected, a
write to the one-shot register, Address 0x04, causes the OS/ALERT
pin to go active if the temperature exceeds the overtemperature
limits. Refer to Figure 12 for more information on one-shot
OS/ALERT pin operation.
Note: In the interrupt mode, a read from any register resets the
OS/ALERT pin after it is activated by a write to the one-shot
register. In the comparator mode, once the temperature drops
below the value in the THYST register, a write to the one-shot
register resets the OS/ALERT pin.
The one-shot mode is useful when one of the circuit design
priorities is to reduce power consumption.
TEMPERATURE
82°C
81°C
80°C
79°C
78°C
77°C
76°C
75°C
74°C
73°C
OS/ALERT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE LOW
OS/ALERT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE LOW
OS/ALERT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE HIGH
OS/ALERT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE HIGH
T
OS
T
HYST
TIME
READ
1
READ
1
READ
1
WRITE TO
0x04 REG.
2
WRITE TO
0x04 REG.
2
WRITE TO
0x04 REG.
2
05326-022
1
READ FROM ANY REGISTER.
2
THERE IS A 60ms DELAY BETWEEN WRITING TO THE
ONE-SHOT REGISTER AND THE OS/ALERT PIN GOING
ACTIVE. THIS IS DUE TO THE CONVERSION TIME.
Figure 12. One-Shot OS/ALERT Pin Operation
FAULT QUEUE
Bit D3 and Bit D4 of the configuration register are used to set
up a fault queue. Up to six faults are provided to prevent false
tripping of the OS/ALERT pin when the ADT75 is used in a
noisy temperature environment. The number of faults set in the
queue must occur consecutively to set the OS/ALERT output.
Data Sheet ADT75
Rev. B | Page 13 of 24
REGISTERS
The ADT75 contains six registers: four are data registers, one is
the address pointer register, and the final register is the one-shot
register. The configuration register is the only data register that
is 8 bits wide while the rest are 16 bits wide. The temperature
value register is the only data register that is read only. Both a read
and write can be performed on the rest of the data registers and
on the one-shot register. On power-up, the address pointer register
is loaded with 0x00 and points to the temperature value register.
Table 7. ADT75 Registers
Pointer Address Name Power-On Default
0x00
Temperature value
0x00
0x01 Configuration 0x00
0x02 T
HYST
setpoint 0x4B00 (75°C)
0x03 T
OS
setpoint 0x5000 (80°C)
0x04 One-shot 0xXX
Address Pointer Register
This 8-bit write only register stores an address that points to one
of the four data registers and selects the one-shot mode. P0 and
P1 select the data register to which subsequent data bytes are
written to or read from. P0, P1, and P2 are used to select the
one-shot mode by writing 04h to this register. A zero should be
written to the rest of the bits.
Table 8. Address Pointer Register
P7 P6 P5 P4 P3 P2 P1 P0
Default Settings at
Power-Up
0 0 0 0 0 0 0 0
Table 9. Register Addresses
P2
P1
P0
Register Selected
0 0 0 Temperature value
0 0 1 Configuration
0 1 0 T
HYST
setpoint
0 1 1 T
OS
setpoint
1 0 0 One-shot mode
ADT75 Data Sheet
Rev. B | Page 14 of 24
Temperature Value Register
This 16-bit read only register stores the temperature measured
by the internal temperature sensor. The temperature is stored in
twos complement format with the MSB being the temperature
sign bit. When reading from this register, the eight MSBs (Bit
D15 to Bit D8) are read first and then the eight LSBs (Bit D7 to
Bit D0) are read. The control register settings are the default
settings on power up.
Configuration Register
This 8-bit read/write register stores various configuration modes
for the ADT75. These modes are shutdown, overtemperature
interrupt, one-shot, SMBus alert function enable, OS/ALERT
pin polarity, and overtemperature fault queues. See Table 10.
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 0 0 0 0 0 0 0 0 N/A
1
N/A
1
N/A
1
N/A
1
1 N/A = not applicable.
Table 10.
Bit Configuration Mode Default Setting at Power-Up
D7 OS/SMBus alert 0
D6 Reserved 0
D5 One-shot 0
D4 Fault queue 0
D3 Fault queue 0
D2 OS/ALERT pin polarity 0
D1
Cmp/Int
0
D0 Shutdown 0
Data Sheet ADT75
Rev. B | Page 15 of 24
Table 11.
Bit Function
D0
Shutdown
Shutdown Bit. Setting this bit to 1 puts the ADT75 into shutdown mode. All circuitry except the SMBus/I
2
C interface is powered
down. To power up the part again, write 0 to this bit.
D1
Cmp/Int
This bit selects between comparator and interrupt mode.
D1 Over Temperature Interrupt Modes
0 Comparator mode
1 Interrupt mode
D2
OS/ALERT
This bit selects the output polarity of the OS/ALERT pin.
D2 OS/ALERT Pin Polarity
0 Active low
1 Active high
D4:D3
Fault
Queue
These two bits set the number of overtemperature faults that occur before setting the OS/ALERT pin. This helps to avoid false
triggering due to temperature noise.
D [4:3] Overtemperature Fault Queue
00 1 fault (default)
01
2 faults
10 4 faults
11 6 faults
D5
One-Shot
One-shot Mode. Setting this bit puts the part into one-shot mode. In this mode, the part is normally powered down until a
0x04 is written to the address pointer register; then a conversion is performed, and the part returns to power down.
D5 One-Shot Mode
0 Normal mode; powered up and converting every 100 ms
1 One-shot mode
D6
Reserved
Reserved. Write 0 to this bit.
D7
OS/SMBus
Alert
Mode
Interrupt Mode Only. Enable SMBus alert function mode. This bit can enable the ADT75 to support the SMBus alert function
when the interrupt mode is selected (D1 = 1).
D7 OS/SMBus Alert Mode
0 Disable SMBus alert function. The OS/ALERT pin behaves as an OS pin when this bit status is selected.
1 Enable SMBus alert function.
THYST Setpoint Register
This 16-bit read/write register stores the temperature hysteresis limit for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register the eight MSBs are read first and then
the eight LSBs are read. The default setting has the THYST limit at 75°C. The control register settings are the default settings on power up.
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 0 1 0 1 1 0 0 0 0 N/A
1
N/A
1
N/A
1
N/A
1
1 N/A = not applicable.
TOS Setpoint Register
This 16-bit read/write register stores the overtemperature limit value for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs are read first and then
the eight LSBs are read. The default setting has the TOS limit at 80°C. The control register settings are the default settings on power up.
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 1 0 0 0 0 0 0 0 0 N/A1 N/A1 N/A1 N/A1
1 N/A = not applicable.
ADT75 Data Sheet
Rev. B | Page 16 of 24
SERIAL INTERFACE
Control of the ADT75 is carried out via the SMBus/I2C-compatible
serial interface. The ADT75 is connected to this bus as a slave
and is under the control of a master device.
Figure 13 shows a typical SMBus/I2C interface connection.
05326-012
ADT75
SCL
OS/ALERT
A0
A2
A1 SDA
GND
V
DD
SMBus/I
2
CADDRESS =1001
000
10kΩ10kΩ
10kΩ
PULL-UP
VDD
PULL-UP
VDD
0.1µF
Figure 13. Typical SMBus/I2C Interface Connection
Serial Bus Address
Like all SMBus/I2C-compatible devices, the ADT75 has a 7-bit
serial address. The four MSBs of this address for the ADT75 are
set to 1001. Pin A2, Pin A1, and Pin A0 set the three LSBs. These
pins can be configured two ways, low and high, to give eight
different address options. Table 12 shows the different bus address
options available. Recommended pull-up resistor value on the
SDA and SCL lines is 10 kΩ.
Table 12. SMBus/I2C Bus Address Options
Binary
A6 A5 A4 A3 A2 A1 A0 Hex
1 0 0 1 0 0 0 0x48
1 0 0 1 0 0 1 0x49
1 0 0 1 0 1 0 0x4A
1 0 0 1 0 1 1 0x4B
1 0 0 1 1 0 0 0x4C
1 0 0 1 1 0 1 0x4D
1
0
0
1
1
1
0
0x4E
1
0
0
1
1
1
1
0x4F
The ADT75 is designed with a SMBus/I2C timeout. The
SMBus/I2C interface times out after 75 ms to 325 ms of no
activity on the SDA line. After this timeout, the ADT75 resets
the SDA line back to its idle state (SDA set to high impedance)
and wait for the next start condition.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a start
condition, defined as a high to low transition on the serial
data line SDA, while the serial clock line SCL remains high.
This indicates that an address/data stream is going to
follow. All slave peripherals connected to the serial bus
respond to the start condition and shift in the next eight
bits, consisting of a 7-bit address (MSB first) plus a
read/write (R/W) bit. The R/W bit determines whether
data is written to, or read from, the slave device.
2. The peripheral with the address corresponding to the
transmitted address responds by pulling the data line low
during the low period before the ninth clock pulse, known
as the acknowledge bit. All other devices on the bus now
remain idle while the selected device waits for data to be
read from or written to it. If the R/W bit is a zero then the
master writes to the slave device. If the R/W bit is a one
then the master reads from the slave device.
3. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an acknowledge bit
from the receiver of data. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, as a low to high transition
when the clock is high can be interpreted as a stop signal.
4. When all data bytes have been read or written, stop
conditions are established. In write mode, the master pulls
the data line high during the 10th clock pulse to assert a
stop condition. In read mode, the master device pulls the
data line high during the low period before the ninth clock
pulse. This is known as no acknowledge. The master takes
the data line low during the low period before the 10th
clock pulse, then high during the 10th clock pulse to assert
a stop condition.
Any number of bytes of data can be transferred over the serial
bus in one operation. However, it is not possible to mix read
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
The I2C address set up by the three address pins is not latched
by the device until after this address has been sent twice. On the
eighth SCL cycle of the second valid communication, the serial
bus address is latched in. This is the SCL cycle directly after the
device has seen its own I2C serial bus address. Any subsequent
changes on this pin has no effect on the I2C serial bus address.
Data Sheet ADT75
Rev. B | Page 17 of 24
WRITING DATA
Depending on the register being written to, there are two different
writes for the ADT75.
Writing to the Address Pointer Register for a
Subsequent Read
To read data from a particular register, the address pointer register
must contain the address of that register. If it does not, the correct
address must be written to the address pointer register by
performing a single-byte write operation, as shown in Figure 14.
The write operation consists of the serial bus address followed
by the address pointer byte. No data is written to any of the data
registers. A read operation is then performed to read the register.
Writing Data to a Register
The configuration register is 8-bits wide so only one byte of data
can be written to this register. Writing a single byte of data to
the configuration register consists of the serial bus address, the
data register address written to the address pointer register,
followed by the data byte written to the selected data register.
This is shown in Figure 15. The THYST register and the TOS register
are each 16-bits wide, so two data bytes can be written into these
registers. Writing two bytes of data to either one of these
registers consists of the serial bus address, the data register
address written to the address pointer register, followed by the
two data bytes written to the selected data register. This is shown
in Figure 16. If more than the required number of data bytes is
written to a register then the register ignores these extra data
bytes. To write to a different register, another start or repeated
start is required.
SCL
SDA
1
1 0 0 1 A2A1 A0
START BY
MASTER FRAME 1
SERIAL BUS ADDRESS
BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
STOP BY
MASTER
ACK. BY
ADT75 ACK. BY
ADT75
R/W P7 P6 P5 P4 P3 P2 P1 P0
9 91
05326-013
Figure 14. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation
05326-014
FRAME 1
SERIAL BUS ADDRESS BYTE FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADT75 ACK. BY
ADT75
ACK. BY
ADT75 STOP BY
MASTER
FRAME 3
DATA BYTE
SDA (CONTINUED)
SCL (CONTINUED)
SCL
SDA
START BY
MASTER
1 0 0 1 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0
9
D7 D6 D5 D4 D3 D2 D1 D0
R/W
191
91
Figure 15. Writing to the Address Pointer Register Followed by a Single Byte of Data to the Configuration Register
ADT75 Data Sheet
Rev. B | Page 18 of 24
05326-015
FRAME 1
SERIAL BUS ADDRESS BYTE FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADT75 ACK. BY
ADT75
ACK. BY
ADT75 STOP BY
MASTER
FRAME 4
DATA BYTE
SCL
SDA
START BY
MASTER
1 0 0 1 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0
9
D7 D6 D5 D4 D3 D2 D1 D0
R/W
191
91
ACK. BY
ADT75
FRAME 3
DATA BYTE
SDA (CONTINUED)
SCL (CONTINUED)
D15 D14 D13 D12 D11 D10 D9 D8
91
Figure 16. Writing to the Address Pointer Register Followed by Two Bytes of Data to Either THYST or TOS Registers
SCL
SDA
1
1 0 0 1 A2A1 A0
START BY
MASTER FRAME 1
SERIAL BUS ADDRESS
BYTE
FRAME 2
DATA BYTE FROM CONFIGURATION
REGISTER
STOP BY
MASTER
ACK. BY
ADT75 NO ACK. BY
MASTER
R/W D7 D6 D5 D4 D3 D2 D1 D0
991
05326-016
Figure 17. Reading Back Data from the Configuration Register
FRAME 1
SERIAL BUS ADDRESS BYTE FRAME 2
MSB DATA BYTE FROM TEMPERATURE
VALUE REGISTER
ACK. BY
ADT75 ACK. BY
MASTER
SCL
SDA
START BY
MASTER
1 0 0 1 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8
9
R/W
191
05326-017
NO ACK. BY
MASTER STOP BY
MASTER
FRAME 3
LSB DATA BYTE FROM TEMPERATURE
VALUE REGISTER
SDA (CONTINUED)
SCL (CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0
91
Figure 18. Reading Back Data from the Temperature Value Register
READING DATA
Reading data from the ADT75 is done in a one data byte operation
for the configuration register and a two data byte operation for
the temperature value register, THYST register, and the TOS setpoint
register. Reading back the contents of the configuration register
is shown in Figure 17. Reading back the contents of the temperature
value register is shown in Figure 18. Reading back from any register
first requires a single-byte write operation to the address pointer
register to set up the register address of the register that is going
to be read from. To read from another register, execute another
write to the address pointer register to set up the relevant register
address. Thus, block reads are not possible, that is, there is no I2C
auto-increment. If the address pointer register has previously been
set up with the address of the register that is going to receive a
read command then there is no need to repeat a write operation
to set up the register address again.
Data Sheet ADT75
Rev. B | Page 19 of 24
OS/ALERT OUTPUT OVERTEMPERATURE MODES
The ADT75 has two overtemperature modes, comparator mode
and interrupt mode. The OS/ALERT pin defaults on power up
as an OS pin; the comparator mode is the default power up
overtemperature mode. The OS/ALERT output pin becomes
active when the temperature measured exceeds the temperature
limit stored in the TOS setpoint register. How this pin reacts after
this event depends on the overtemperature mode selected.
Comparator Mode
In the comparator mode, the OS/ALERT pin returns to its
inactive status when the temperature measured drops below the
limit stored in the THYST setpoint register. Putting the ADT75
into shutdown mode does not reset the OS/ALERT state in
comparator mode.
Interrupt Mode
In the interrupt mode, the OS/ALERT pin goes inactive when
any ADT75 register is read. The OS/ALERT pin can only return
to active status if the temperature measured is below the limit
stored in the THYST setpoint register. Once the OS/ALERT pin is
reset, it goes active again only when the temperature has gone
above the TOS limit. The OS/ALERT pin can also be reset by a
SMBus alert response address (ARA) when this pin has been
selected as a SMBus alert pin. More information is given in the
SMBUS Alert section.
Figure 19 illustrates the comparator and interrupt modes with
both pin polarity settings. Placing the ADT75 into shutdown
mode resets the OS/ALERT pin in the interrupt mode.
TEMPERATURE
82°C
81°C
80°C
79°C
78°C
77°C
76°C
75°C
74°C
73°C
OS/ALERT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE LOW
OS/ALERT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE LOW
OS/ALERT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE HIGH
OS/ALERT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE HIGH
TOS
THYST
TIME
READ READ READ
05326-018
Figure 19. OS/ALERT Output Temperature Response Diagram
ADT75 Data Sheet
Rev. B | Page 20 of 24
SMBus ALERT
The OS/ALERT pin can behave as a SMBus alert pin when the
SMBus alert function is enabled by setting Bit D7 in the
configuration register. The interrupt mode must also be selected
(Bit D1 in the configuration register). The OS/ALERT pin is an
open-drain output and requires a pull-up to VDD. Several SMBus
alert outputs can be wire-AND’ed together, so that the common
line goes low if one or more of the SMBus alert outputs goes
low. The polarity of the OS/ALERT pin must be set for active
low for a number of outputs to be wire-AND’ed together.
The OS/ALERT output can operate as a SMBALERT function.
Slave devices on the SMBus normally cannot signal to the master
that they want to talk, but the SMBALERT function allows them to
do so. SMBALERT is used in conjunction with the SMBus general
call address.
One or more SMBus alert outputs can be connected to a common
SMBALERT line connected to the master. When the SMBALERT
line is pulled low by one of the devices, the following procedure
occurs as shown in Figure 20.
MASTER
RECEIVES
SMBALERT
START ALERT RESPONSE
ADDRESS RD ACK DEVICE ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
DEVICE SENDS
ITS ADDRESS
NO
ACK STOP
05326-019
Figure 20. ADT75 Responds to SMBALERT ARA
1. SMBALERT is pulled low.
2. Master initiates a read operation and sends the SMBus alert
response address (ARA = 0001 100). This reserved SMBus/
I2C address must not be used as a specific device address.
3. The device whose SMBus alert output is low responds to the
SMBus alert response address and the master reads its device
address. As the device address is seven bits long, the ADT75’s
LSB is free to be used as an indicator as to which temperature
limit was exceeded. The LSB is high if the temperature is
greater than or equal to TOS, and the LSB is low if the
temperature is less than THYST. The address of the device
is now known and it can be interrogated in the usual way.
4. If more than one devices’ SMBus alert output is low, the one
with the lowest device address has priority, which is in
accordance with normal SMBus specifications.
Once the ADT75 has responded to the SMBus alert response
address, it resets its SMBus alert output. If the SMBALERT line
remains low, the master sends the ARA again. It continues to do
this until all devices whose SMBALERT outputs were low have
responded.
START ALERT RESPONSE
ADDRESS RD ACK DEVICE
ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
DEVICE SENDS
ITS ADDRESS
DEVICE ACK
ACK PEC NO
ACK STOP
MASTER
ACK MASTER
NACK
DEVICE SENDS
ITS PEC DATA
05326-020
MASTER
RECEIVES
SMBALERT
Figure 21. ADT75 Responds to SMBALERT ARA with
Packet Error Checking (PEC)
Data Sheet ADT75
Rev. B | Page 21 of 24
APPLICATIONS INFORMATION
THERMAL RESPONSE TIME
The time required for a temperature sensor to settle to a specified
accuracy is a function of the thermal mass of the sensor and the
thermal conductivity between the sensor and the object being
sensed. Thermal mass is often considered equivalent to capacitance.
Thermal conductivity is commonly specified using the symbol
Q, and can be thought of as thermal resistance. It is commonly
specified in units of degrees per watt of power transferred across
the thermal joint. Thus, the time required for the ADT75 to
settle to the desired accuracy is dependent on the package
selected, the thermal contact established in that particular
application, and the equivalent power of the heat source. In most
applications, it is best to determine empirically the settling time.
SELF-HEATING EFFECTS
The temperature measurement accuracy of the ADT75 may be
degraded in some applications due to self-heating. Errors can be
introduced from the quiescent dissipation and power dissipated
when converting. The magnitude of these temperature errors is
dependent on the thermal conductivity of the ADT75 package,
the mounting technique, and the effects of airflow. At 25°C, static
dissipation in the ADT75 is typically 798.6 µW operating at 3.3 V.
In the 8-lead MSOP package mounted in free air, this accounts
for a temperature increase due to self-heating of
ΔT = PDISS × θJA = 798.6 µW × 205.9°C/W = 0.16°C
It is recommended that current dissipated through the device be
kept to a minimum, because it has a proportional effect on the
temperature error.
Using the power-down mode can reduce the current dissipated
through the ADT75 subsequently reducing the self-heating effect.
When the ADT75 is in power-down mode and operating at 25°C,
static dissipation in the ADT75 is typically 78.6 µW with VDD =
3.3 V and the power-up/conversion rate is 1 SPS (sample per
second). In the 8-lead MSOP package mounted in free air, this
accounts for a temperature increase due to self-heating of
ΔT = PDISS × θJA = 78.6 µW × 205.9°C/W = 0.016°C
SUPPLY DECOUPLING
Decouple the ADT75 with a 0.1 µF ceramic capacitor between
VDD and GND. This is particularly important when the ADT75
is mounted remotely from the power supply. Precision analog
products, such as the ADT75, require a well-filtered power
source. Because the ADT75 operates from a single supply, it
may seem convenient to tap into the digital logic power supply.
However, the logic supply is often a switch mode design, which
generates noise in the 20 kHz to 1 MHz range. In addition, fast
logic gates can generate glitches hundreds of mV in amplitude
due to wiring resistance and inductance.
If possible, power the ADT75 directly from the system power
supply. This arrangement, shown in Figure 22, isolates the
analog section from the logic switching transients. Even if a
separate power supply trace is not available, generous supply
bypassing reduces supply line induced errors. Local supply
bypassing consisting of a 0.1 µF ceramic capacitor is critical for
the temperature accuracy specifications to be achieved. Place this
decoupling capacitor as close as possible to the ADT75 VDD pin.
05326-021
0.1µF
ADT75
TTL/CMOS
LOGIC
CIRCUITS
POWER
SUPPLY
Figure 22. Use Separate Traces to Reduce Power Supply Noise
ADT75 Data Sheet
Rev. B | Page 22 of 24
TEMPERATURE MONITORING
The ADT75 is ideal for monitoring the thermal environment
within electronic equipment. For example, the surface-mounted
package accurately reflects the exact thermal conditions that
affect nearby integrated circuits.
The ADT75 measures and converts the temperature at the
surface of its own semiconductor chip. When the ADT75 is
used to measure the temperature of a nearby heat source, the
thermal impedance between the heat source and the ADT75
must be considered. Often, a thermocouple or other temperature
sensor is used to measure the temperature of the source, while
the temperature is monitored by reading back from the ADT75
temperature value register.
Once the thermal impedance is determined, the temperature of
the heat source can be inferred from the ADT75 output. As
much as 60% of the heat transferred from the heat source to the
thermal sensor on the ADT75 die is discharged via the copper
tracks, the package pins, and the bond pads. Of the pins on the
ADT75, the GND pin transfers most of the heat. Therefore, to
measure the temperature of a heat source it is recommended
that the thermal resistance between the ADT75 GND pin and
the GND of the heat source is reduced as much as possible.
For example, use the ADT75’s unique properties to monitor a
high-power dissipation microprocessor. The ADT75 device, in a
surface-mounted package, is mounted directly beneath the
microprocessor’s pin grid array (PGA) package. The ADT75
produces a linear temperature output while needing only two
I/O pins and requiring no external characterization.
Data Sheet ADT75
Rev. B | Page 23 of 24
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 23. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 24. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ADT75 Data Sheet
Rev. B | Page 24 of 24
ORDERING GUIDE
Model1
Temperature Range
Temperature Accuracy2, 3
Package Description
Package Option
Branding
ADT75ARMZ –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B
ADT75ARMZ-REEL7 –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B
ADT75ARMZ-REEL –55°C to +125°C ±2°C 8-Lead MSOP RM-8 T5B
ADT75ARZ –55°C to +125°C ±2°C 8-Lead SOIC_N R-8
ADT75ARZ-REEL7 –55°C to +125°C ±2°C 8-Lead SOIC_N R-8
ADT75ARZ-REEL –55°C to +125°C ±2°C 8-Lead SOIC_N R-8
ADT75BRMZ –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C
ADT75BRMZ-REEL7 –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C
ADT75BRMZ-REEL –55°C to +125°C ±1°C 8-Lead MSOP RM-8 T5C
EVAL-ADT75EBZ Evaluation Board
1 Z = RoHS Compliant Part.
2 A grade temperature accuracy is over the −25°C to +100°C temperature range.
3 B grade temperature accuracy is over the 0°C to 70°C temperature range.
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
©2005–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05326-0-8/12(B)