Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 1 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
Product Features
• High dynamic range downconverter
with integrated LO and IF amplifiers
• Dual channels fo r di versity
• +29.5 dBm Input IP3
• +10 dBm Input P1dB
• RF: 1700 – 2000 MHz
• IF: 65 – 250 MHz
• +5V Single supply op er a tion
• Pb-free 6mm 28-pin QFN package
• Low-side LO configuration
• Comm on foot p ri nt wi t h ot her
UMTS/cellular versions
Product Description
The CV211-1A is a dual-channel high-linearity down-
converter designed to meet the demanding performance,
functionality, and cost goals of current and next generation
mobile infrastructure basestations. It provides high
dynamic range perform ance in a low prof ile surface-mount
leadless package that measures 6 x 6 mm square.
It is ideally suited for high dynamic range receiver front
ends using diversity receive channels. Functionality
includes frequency conversion and IF amplification,
while an integrated LO driver amplifier powers the
passive mixer. The MCM is implemented with reliable
and mature GaAs MESFET and InGaP HBT technology.
Typical applications include frequency downconversion
used in PCS/DCS 2.5G and 3G mobile base transceiver
stations.
Functional Diagram
Top View
Specifications (1)
Parameters Units Min Typ Max Comments
RF Frequency Range MHz 1700 – 2000
LO Frequency Range MHz 1450 – 1935
IF Frequency Range MHz 65 – 250 See note 2
% Bandwidth aro und IF center freq uency % ±7.5 See note 3
IF Test Fr equency MHz 240
SSB Conversion Gain dB 8 10 12 Temp = 25 °C
Gain Drift over Temp (-40 to 85 °C) dB -1.5 ±0.5 +1.5 Referenced to +25 °C
Input IP3 dBm +25 +29.5 See note 4
Input IP2 dBm +33 +38 See note 4
Input 1 dB Compression Point dBm +10 See note 4
Noise Figure dB 10.5 See note 5
LO Input Drive Level dBm -2.5 0 +2.5
LO-RF Isolation dB 8 PLO = 0 dBm
LO-IF Isolation dB 32 PLO = 0 dBm
Branch-Branch Isolation dB 45
Return Loss: RF Port dB 18
Return Loss: LO Port dB 15
Return Loss: IF Port dB 14
Operating Supply Voltage V +5
Supply Current mA 320 380 475
Thermal Resistance °C / W 27
Junction Temperature °C 160 See note 6
1. Specifications when using the application specific circuit (shown on page 3) with a low side LO = 0 dBm and IF = 240 MHz in a downconverting application at 25 °C.
2. IF matching components affect the center IF frequency. Proper component values for other IF center frequencies than shown can be provided by emailing to applications.engineering@wj.com.
3. The IF bandwidth of the converter is defined as 15% around any center frequency in its operating IF frequency range. The bandwidth is determined with external components. Specifications are valid around
the total ±7.5% bandwidth. ie. with a center frequency of 240 MHz, the specifications are valid from 240 ± 18 MHz.
4. Assumes the supply voltage = +5 V. IIP3 is measured with Δf = 1 MHz with RFin = -5 dBm / tone.
5. Assumes LO injection noise is filtered at the thermal noise floor, -174 dBm/Hz, at the RF, IF, and Image frequencies.
6. The maximum junction temperature ensures a minimum MTTF rating of 1 million hours of usage.
Absolute Maximum Rating
Parameter Rating
Operating Case Temperature -40 to +85 °C
Storage Temperature -55 to +150 °C
DC Voltage +5. 5 V
Junction Temperature +220 °C
Operation of this device above any of these parameters may cause permanent damage.
Ordering Information
Part No. Description
CV211-1AF PCS/DCS-band Dual-Branch Downconverter
(lead-free/RoHS-compliant QFN Pkg)
CV211-1APCB240 Fully Assembled Eval. Board, IF = 240MHz
1
2
3
4
5
6
7
21
20
19
18
17
16
15
28
27 26 25 24 23 22
8 9 10 11 12 13 14
IF Amp 2
IF
A
mp 1
LO Driver Amp
BIAS
GND
GND
GND
LO
GND
GND
RF 1
INPUT
GND
BIAS
GND
GND
GND
GND
MIXER
IF1
GND
MP1
INPUT
GND
GND
GND
MIXER
IF2
GND
GND
GND
IF
AMP2
INPUT
IF1
OUTPUT
IF2
OUTPUT
IF
RF
RF
RF 2
INPUT
Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 2 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
Device Architecture / Application Circuit Information
Typical Downconverter Performance Chain Analysis (Each Branch)
Stage Gain
(dB)
Input
P1dB
(dBm)
Input
IP3
(dBm)
NF
(dB) Current
(mA)
Cumulative Performance
Gain
(dB)
Input
P1dB
(dBm)
Input
IP3
(dBm)
NF
(dB)
LO Am p / M MIC Mi x er -8 17.5 35 8.5 80 -8 17.5 35.0 8.5
IF Amplifier 18 3.0 23 2.2 150 10 10.1 29.5 10.5
CV211-1A Cumulative Performance 380* 10 +10.1 +29.5 10.5
* The 2nd branch includes another mixer and IF amplifier, which increases the total current consumption
of the MCM to be 380 mA.
CV211
-
1
A
: The application circuit can be broken up into three main
functions as denoted in the colored dotted areas above: RF/IF diplexing
(blue), IF amplifier matching (green) and dc biasing (purple). There are
various placeholders for chip components in the circuit schematic so that
a common PCB can be used for all WJ dual-branch converters. Further
details are given in the Application Note located on the website titled
“CV2xx Series - PWB Design Guidelines”.
DC biasing: DC bias must be provided for the LO and IF
amplifiers in the converter. R1 se ts the operating c urrent f or the la st
stage of the LO amplifier and is chosen to optimize the mixer LO
drive level. Proper RF chokes and by pass capacitors are chosen for
proper amplifier biasing at the intended frequency of operation. The
“+5 V” dc bias should be supplied directly from a voltage
regulator.
IF Amplifier Matching: The IF amplifier requires matching
elements to optimize the performance of the amplifier to the desired IF
center fre quency. Since IF bandwi dths are typically on the order of 5 to
10%, a simple two element matching network, in the form of either a
high-pass or low-pass filter structure, is sufficient to matc h the MMIC IF
amplifier over these narrow bandwidths. Proper component values for
other IF center frequencies can be found in the IF Amplifier Matching
Table or by e-mailing to sjcapplication.engineering@tqs.com.
External Diplexer: This is only used with the cellula
r
-
b
and CV
products. The mixer performs the diplexing internally for the
CV211-1A; therefore the components shown in the diplexer
section should be not be loaded except for L3, L10, L7, and L11,
which should contain a 0 Ω jumper.
IF Amplifier Matching
Frequency (MHz) 40 50 75 100 125 130 155 169 180 210 240
L4, L8 (nH) 470 430 150 150 120 120 100 82 82 82 56
C4, C11 (pF) 24 15 22 10 8.2 6.8 5.6 5.0 4.7 3.3 3.9
R6, R7 (ohms) 4.7 4.7 3.3 2.2 2.2 2.2 2.2 2.2 2.2 2.2 2.2
L5, L9 (nH) 470 240 330 330 330 330 330 330 330 220 220
Printed Circuit Board Material:
.014” FR-4
,
4 la
y
ers
,
.062” total thickness
1
2
3
4
5
6
7
21
20
19
18
17
16
15
28
27 26 25 24 23 22
8 9 10 11 12 13 14
IF Amp 2
IF Amp 1
LO Driver Amp
BIAS
GND
N/C
GND
LO
GND
N/C
RF 1
INPUT
GND
BIAS
GND
N/C
GND
GND
MIXER
IF1
GND
MP1
INPUT
GND
GND
GND
MIXER
IF2
GND
GND
GND
IF
AMP2
INPUT
IF1
OUTPUT
IF2
OUTPUT
IF
RF
RF
RF 2
INPUT
Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 3 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
Application Circuit: IF = 240 MHz (CV211-1APCB240)
PCB Layout
Circuit Board Material: .014” FR-4, 4 layers, .062” total thickness
Bill of Materials
Ref. Desig. Component Size
R1 11.3 Ω chip resistor 0805
R2, R3, R4, L3, L7
L10, L11 0 Ω chip resistor 0603
R6, R7 2.2 Ω chip resistor 0603
C1, C5, C10, C15 1000 pF chip capac itor 0603
C4, C11 3.9 pF chip capacitor 0603
C6, C12, C14 0.1 μF chip capacitor 0603
C7, C13 100 pF chip capacitor 0603
L1 120 nH chip inductor 0603
L4, L8 56 nH chip inductor 0603
L5, L9 220 nH chip inductor 0805
C2, C3, C8, C9, C16
C17, C19, C20, C21
C22, L2, L6 Do Not Place
U1 CV211-1AF WJ Converter QFN
0.1uF
0.1uF
0.1uF
11.3
Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 4 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
CV211-1APCB240 Application Circuit Performance Plots
Conversion G ain vs IF Frequency
LO = 0 dBm , 1640 MH z
7
8
9
10
11
12
215 225 235 245 255 265
IF Frequency (MH z)
Conversion Gain (dB)
-40 deg C +25 deg C +85 deg C
Input IP3 vs IF Frequency
LO = 0 dBm , 1640 MH z
24
26
28
30
32
34
215 225 235 245 255 265
IF Frequency (MH z)
Input IP3 (dBm)
-40 deg C +25 deg C +85 deg C
Input IP2 vs IF Frequency
LO = 0 dBm , 1640 MH z
32
34
36
38
40
42
215 225 235 245 255 265
IF Frequency (MH z)
Input IP2 (dBm)
-40 deg C +25 deg C +85 deg C
Conversion G ain vs RF Frequency
25 deg C , IF = 240 M Hz
7
8
9
10
11
12
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Conversion Gain (dB)
L O = -2 .5 d Bm
LO = 0 dBm
LO = 2.5 dBm
Input IP3 vs RF Frequency
25 deg C, IF = 240 M Hz
24
26
28
30
32
34
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Input IP3 (dBm)
L O = -2 .5 d Bm
LO = 0 dBm
LO = 2.5 dBm
Input IP2 vs RF Frequency
25 deg C, IF = 240 M Hz, low-side LO
32
34
36
38
40
42
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Input IP2 (dBm)
L O = -2 .5 d Bm
LO = 0 dBm
LO = 2.5 dBm
Conversion G ain vs RF Frequency
L O = 0 d B m, IF = 2 4 0 MH z , lo w -s id e LO
7
8
9
10
11
12
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Conversion Gain (dB)
-40 deg C +25 deg C +85 deg C
Input IP3 vs RF Frequency
LO = 0 dBm , IF = 240 MH z, low-side LO
24
26
28
30
32
34
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Input IP3 (dBm)
-40 deg C +25 deg C +85 deg C
Input IP2 vs RF Frequency
LO = 0 dBm , IF = 240 MH z, low-side LO
32
34
36
38
40
42
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Input IP2 (dBm)
-40 deg C +25 deg C +85 deg C
Conversion G ain vs RF Frequency
2 5 d e g C , L O = 0 d Bm, IF = 2 4 0 MH z , lo w -side L O
7
8
9
10
11
12
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Conversion Gain (dB)
Vdd = 4.9 V
Vdd = 5.0 V
Vdd = 5.1 V
Input IP3 vs RF Frequency
2 5 d e g C , L O = 0 d Bm, IF = 2 4 0 MH z , lo w -side L O
24
26
28
30
32
34
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Input IP3 (dBm)
Vdd = 4.9 V
Vdd = 5.0 V
Vdd = 5.1 V
Input IP2 vs RF Frequency
2 5 d e g C , L O = 0 d Bm, IF = 2 4 0 MH z , lo w -side L O
32
34
36
38
40
42
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M Hz)
Input IP2 (dBm)
Vdd = 4.9 V
Vdd = 5.0 V
Vdd = 5.1 V
Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 5 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
CV211-1APCB240 Application Circuit Performance Plots (cont’d)
L-I Isolation vs LO Frequency
R e fe re nc e d w ith L O = 0 d B m
15
20
25
30
35
40
1400 1500 1600 1700 1800 1900 2000
LO Frequency (MH z)
L-I Isolation (dB)
-40 deg C +25 deg C +85 deg C
L-R Isolation vs LO Frequency
Referenced w ith LO = 0 dB m
0
5
10
15
20
25
1400 1500 1600 1700 1800 1900 2000
LO Frequency (MH z)
L-R Isolation (dB)
-40 deg C +25 deg C +85 deg C
IF R eturn Loss vs IF Frequency
25° C
0
5
10
15
20
25
30215 225 235 245 255 265
IF Frequency (MH z)
Return Loss (dB)
RF Return Loss vs RF Frequency
25° C
0
5
10
15
20
25
30
1700 1750 1800 1850 1900 1950 2000
RF Frequency (M H z)
Return Loss (dB)
LO R eturn Loss vs LO Frequency
25° C
0
5
10
15
20
25
30
1400 1500 1600 1700 1800 1900 2000
LO Frequency (MH z)
Return Loss (dB)
N oise Fig ure vs Temperatu re
RF = 1880 M Hz, IF = 240 MH z, LO = 0 dB m @ 1640 MH z
4
6
8
10
12
14
-40-200 20406080
Tem perature (°C)
Noise Figure (dB)
Input P1dB vs Tem perature
RF = 1880 M Hz, IF = 240 MH z, LO = 0 dB m @ 1640 MH z
4
6
8
10
12
14
-40-200 20406080
Tem perature (°C)
Input P1dB (dBm)
Specifications and information are subject to change without notice
TriQuint Semiconductor, Inc • Phone 503-615- 9 00 0 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com Page 6 of 6 April 2010
CV211-1A
PCS/DCS-band Dual-Branch Downconverter
CV211-1AF Mechanical Information
This package is lead-free/RoHS-compliant. It is compatible with both lead-free (maximum 260°C reflow temperature) and leaded (maximum
245°C reflow temperature) soldering processes. The plating material on the pins is annealed matte tin over copper.
Outline Drawing
Mounting Configuration / Land Pattern
Product Marking
The component will be lasermarked with a
“CV211-1AF” product label with an
alphanumeric lot code on the top surface of the
package.
Tape and reel specifications for this part will be
located on the website in the “Application
Notes” section.
ESD / MSL Information
ESD Rating: Class 1B
Value: Passes 500V to <1000V
Test: Human Body Model (HBM)
Standard: JEDEC Standard JESD22-A114
ESD Rating: Class III
Value: Passes 500V to <1000V
Test: Charged Device Model (CDM)
Standard: JEDEC Standard JESD22-C101
MSL Rating: Level 2 at +260°C convection reflow
Standard: JEDEC Standard J-STD-020
Functional Pin Layout
Pin Function Pin Function
1 Channel 1 Mi xer
RF Input 15 N/C or GND
2 GND 16 GND
3 LO Amp Bias 17 LO input
4 GND 18 GND
5 N/C or GND 19 N/C or GND
6 GND 20 GND
7 Channel 2 Mi xer
/ RF Input 21 +5 V
8 GND 22 GND
9 Channel 2 Mi xer
/ IF Output 23 Channel 1
IF Amp Output /
Bias
10 GND 24 GND
11 Channel 2
IF Amp Input 25 Channel 1
IF Amp Input
12 GND 26 GND
13 Channel 2
IF Amp
Output / Bias 27 Channel 1
Mixer
IF Output
14 GND 28 GND