TEF6730AHW/V1 - NXP Semiconductors

1. General description

The TEF6730A is a car radio tuner front-end for digital-IF reception, especially designed

for co-operation with digital-IF DSP back-ends of the SAF773x and SAF778x families.

The FM tuner features single conversion to IF = 10.7 MHz and integrated image rejection;

capable for FM 65 MHz to 108 MHz and weather band reception. The AM tuner features

single conversion to IF = 10.7 MHz with an integrated AM front-end, capable for LW, MW

and full SW reception. A combined AM/FM IF AGC ampliﬁer provides a suitable IF signal

to the ADC in IF DSP.

The device can be controlled via the fast-mode I2C-bus (400 kHz) and includes

autonomous tuning functions for easy control. No manual alignments are required.

2. Features

nFM mixer for conversion of FM RF to IF 10.7 MHz with large dynamic range, high

image rejection and selectable mixer gain

nSelectable high or low injection of LO

nAGC PIN diode drive circuit for FM RF AGC with detection at RF and IF, including

keyed AGC function

nRF input for weather band applications

nIntegrated AM front-end LNA

nIntegrated AM RF AGC for low desensitization and AGC PIN diode drive circuit with

detection at RF and IF

nAM mixer for conversion of AM RF to IF 10.7 MHz

nAM/FM IF AGC ampliﬁer with large dynamic range, gain controlled from IF DSP

nAM and FM front-end AGC information is available via the I2C-bus

nLow phase noise local oscillator with reliable start-up behavior

nIn-lock detection for optimized adaptive PLL tuning speed

nProgrammable divider and mixer dividers for reception of FM (65 MHz to 108 MHz),

weather band, AM LW, MW and full SW

nTwo antenna DAAs

nSequential state machine supporting all tuning actions including AFU for RDS

nInterfacing signals for IF AGC, FM keyed AGC, AFU and reference frequency to

IF DSP for optimum system performance

nSoftware controlled ﬂag outputs

nSelection of four I2C-bus addresses

nQualiﬁed in accordance with AEC-Q100

TEF6730A

Front-end for digital-IF car radio

Rev. 01 — 21 February 2007 Product data sheet

Product data sheet Rev. 01 — 21 February 2007 2 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

3. Quick reference data

Table 1. Quick reference data

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Supply voltage

VCCA analog supply voltage on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),

VCC(IF), FMMIXOUT1, FMMIXOUT2,

AMMIXOUT1 and AMMIXOUT2

8 8.5 9 V

Current in FM mode

ICC(tot) total supply current - 85.3 - mA

Current in AM mode

ICC(tot) total supply current - 114.7 - mA

Antenna Digital Auto Alignment (DAA)

DAA1: pin DAAOUT1[1]

Gconv(DAA) DAA conversion gain 0.1 - 2

DAA2: pin DAAOUT2[2]

Gconv(DAA) DAA conversion gain 0.7 - 1.35

Reference frequency

External reference frequency, circuit inputs: pins FREF1 and FREF2

fext external frequency - 100 - kHz

Tuning system; see Table 28,Table 29,Table 30 and Table 31

Voltage controlled oscillator

fVCO(min) minimum VCO frequency [3] - - 130 MHz

application according to Figure 25 [3] - - 159.9 MHz

fVCO(max) maximum VCO frequency [3] 256 - - MHz

C/N carrier-to-noise ratio fVCO = 200 MHz; ∆f = 10 kHz; Q = 30 94 98 - dBc/√Hz

Timings

ttune tuning time Europe FM and US FM band;

fref = 100 kHz; fRF = 87.5 MHz to

108 MHz

- 0.75 1 ms

AM MW band; fref = 20 kHz;

fRF = 0.53 MHz to 1.7 MHz --10ms

tupd(AF) AF update time cycle time for inaudible AF update

including 1 ms mute start and 1 ms mute

release time

- 6 6.5 ms

AM overall system parameters[4]

fi(RF) RF input frequency LW 144 - 288 kHz

MW 522 - 1710 kHz

SW 2.3 - 26.1 MHz

fIF IF frequency - 10.7 - MHz

Vsens sensitivity voltage (S+N)/N = 26 dB - 50 - µV

Product data sheet Rev. 01 — 21 February 2007 3 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[1] Conversion gain formula of DAA1: where n = 0 to 127.

Vi(RF) RF input voltage start level of wideband AGC

data byte AGC bits WBAGC[1:0] = 00 - 125 - mV

data byte AGC bits WBAGC[1:0] = 01 - 100 - mV

data byte AGC bits WBAGC[1:0] = 10 - 75 - mV

data byte AGC bits WBAGC[1:0] = 11 - 35 - mV

Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0

data byte AGC bits NBAGC[1:0] = 00 - 200 - mV

data byte AGC bits NBAGC[1:0] = 01 - 170 - mV

data byte AGC bits NBAGC[1:0] = 10 - 140 - mV

data byte AGC bits NBAGC[1:0] = 11 - 115 - mV

IP2 second-order intercept point referenced to receiver input - 152 - dBµV

IP3 third-order intercept point referenced to receiver input

∆f = 40 kHz - 130 - dBµV

∆f = 100 kHz - 133 - dBµV

αripple ripple rejection VCC(ripple) /V

audio; fripple = 100 Hz;

VCC(ripple) = 10 mV (RMS);

Vi(RF) =1mVto1V

-40-dB

FM overall system parameters[5]

fi(RF) RF input frequency FM standard 65 - 108 MHz

weather band 162.4 - 162.55 MHz

fIF IF frequency - 10.7 - MHz

Vsens sensitivity voltage BIF = 170 kHz - 2 - µV

threshold extension enabled; weak signal

handling enabled (SAF7730 N231) - 1.1 - µV

Vi(RF) RF input voltage start level of wideband AGC

data byte AGC bits WBAGC[1:0] = 00 - 19 - mV

data byte AGC bits WBAGC[1:0] = 01 - 14 - mV

data byte AGC bits WBAGC[1:0] = 10 - 10 - mV

data byte AGC bits WBAGC[1:0] = 11 - 7 - mV

Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0

data byte AGC bits NBAGC[1:0] = 00 - 17 - mV

data byte AGC bits NBAGC[1:0] = 01 - 14 - mV

data byte AGC bits NBAGC[1:0] = 10 - 11 - mV

data byte AGC bits NBAGC[1:0] = 11 - 9 - mV

IP3 third-order intercept point ∆f = 400 kHz - 123 - dBµV

αripple ripple rejection VCC(ripple) /V

audio; fripple = 100 Hz;

VCC(ripple) = 10 mV (RMS);

Vi(RF) = 500 µV

-64-dB

---

Table 1. Quick reference data

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

VDAAOUT1 1.915 n

128

---------

×0.1+





Vtune

×=

Product data sheet Rev. 01 — 21 February 2007 4 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[2] Conversion gain formula of DAA2: where n=0to15.

[3] The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.

[4] Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3

and nominal maximum IFAGC gain, unless otherwise speciﬁed.

[5] Based on 75 Ω dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 µs, fi(RF) = 97.1 MHz, ∆f = 22.5 kHz,

nominal mixer gain and nominal maximum IFAGC gain, unless otherwise speciﬁed.

4. Ordering information

VDAAOUT2 0.693 n

------

×0.7+





VDAAOUT1

×=

Table 2. Ordering information

Type number Package

Name Description Version

TEF6730AHW HTQFP64 plastic thermal enhanced thin quad ﬂat package; 64 leads;

body 10 x 10 x 1 mm; exposed die pad SOT855-1

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx

xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

Product data sheet Rev. 01 — 21 February 2007 5 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

5. Block diagram

Fig 1. Block diagram of TEF6730AHW

ifagc

ifagclna rf lnarf

626364123457810 9111213141517192021222324253134

IFMAGC

FMMIXIN1

FMMIXIN2

WXMIXIN

WXMIXDEC

DAAOUT1

DAAOUT2

VTUNE

CPOUT

OSCFDB

OSCTNK

37 38 41 53 54 55 56 57 45 52 16, 18, 48, 49

VCC(PLL)

VCOGND

VCC(VCO)

FREF1

FREF2

VREF

GND

VCC

FGND

DGND

i.c.

FMMIXOUT2

AMMIXOUT2

FMMIXOUT1

CFSW2

CFSW1

SWDEC

IFAGCDEC

FMIFAGCIN2

FMIFAGCIN1

AMIFAGCIN

IFAGCBIAS

IFGND

VCC(IF)

AMMIXOUT1

VCC(RF)

V50LNA

LNAIN

AGCCNTRL

LNAOUT

LNAAGCDEC

AMMIXDEC

AMMIXIN

TAMAGC

PINAGCDEC

IAMAGC

RFGND

TFMAGC

KAGC

antenna DAA

TEF6730AHW

AM RF

AGC

FM RF

AGC

BAND

÷M

REF

fref

MIXER

PLL

÷N

IF AGC

AM LNA

TUNING

STATE

MACHINE

I2C-BUS

tuner

control

CTRL BUF

read

address

pll in-lock

write

IFOUT1

am/fm

rf agc

IFOUT2

IFAGCMSB

IFAGCLSB

008aaa057

ADDR2

ADDR1

SDA

SWPORT

AFSAMPLE

AFHOLD

SCL

vco vco vref sup sup fgnd dig i.c.

flag

pll

90°

Product data sheet Rev. 01 — 21 February 2007 6 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

6. Pinning information

6.1 Pinning

6.2 Pin description

Fig 2. Pin conﬁguration for HTQFP64

TEF6730AHW

AMIFAGCIN i.c.

FMIFAGCIN1 ADDR1

FMIFAGCIN2 ADDR2

IFAGCDEC FGND

SWDEC AFHOLD

CFSW1 AFSAMPLE

CFSW2 SWPORT

FMMIXOUT1 VCC(VCO)

AMMIXOUT2 OSCTNK

FMMIXOUT2 OSCFDB

AMMIXOUT1 VCOGND

VCC(RF) VCC(PLL)

V50LNA CPOUT

LNAIN VTUNE

AGCCNTRL KAGC

i.c. DAAOUT2

LNAOUT IFAGCBIAS

i.c. IFGND

LNAAGCDEC VCC(IF)

AMMIXDEC IFAGCLSB

AMMIXIN IFAGCMSB

TAMAGC IFOUT2

PINAGCDEC IFOUT1

IAMAGC VCC

RFGND GND

FMMIXIN1 VREF

FMMIXIN2 FREF2

WXMIXIN FREF1

WXMIXDEC DGND

IFMAGC SCL

TFMAGC SDA

DAAOUT1 i.c.

008aaa058

Table 3. Pin description

Symbol Pin Description

AMIFAGCIN 1 IFAGC ampliﬁer AM input (10.7 MHz)

FMIFAGCIN1 2 IFAGC ampliﬁer FM input 1 (10.7 MHz)

FMIFAGCIN2 3 IFAGC ampliﬁer FM input 2 (10.7 MHz)

IFAGCDEC 4 IF AGC ampliﬁer AM and FM decoupling

SWDEC 5 ceramic ﬁlter switch decoupling

CFSW1 6 ceramic ﬁlter switch 1

CFSW2 7 ceramic ﬁlter switch 2

FMMIXOUT1 8 FM mixer IF output 1 (10.7 MHz)

AMMIXOUT2 9 AM mixer IF output 2 (10.7 MHz)

Product data sheet Rev. 01 — 21 February 2007 7 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

FMMIXOUT2 10 FM mixer IF output 2 (10.7 MHz)

AMMIXOUT1 11 AM mixer IF output 1 (10.7 MHz)

VCC(RF) 12 AM/FM RF supply voltage

V50LNA 13 AM LNA supply voltage decoupling

LNAIN 14 AM LNA input

AGCCNTRL 15 AM LNA AGC pin

i.c. 16 internally connected; leave open

LNAOUT 17 AM LNA output

i.c. 18 internally connected; leave open

LNAAGCDEC 19 AM LNA AGC decoupling

AMMIXDEC 20 AM mixer decoupling

AMMIXIN 21 AM mixer input

TAMAGC 22 AM RF AGC time constant

PINAGCDEC 23 AM PIN diode AGC decoupling

IAMAGC 24 AGC current for AM PIN diode

RFGND 25 RF ground

FMMIXIN1 26 FM mixer input 1

FMMIXIN2 27 FM mixer input 2

WXMIXIN 28 weather band mixer input

WXMIXDEC 29 weather band mixer decoupling

IFMAGC 30 AGC current for FM PIN diode

TFMAGC 31 FM RF AGC time constant

DAAOUT1 32 antenna DAA output 1

DAAOUT2 33 antenna DAA output 2

KAGC 34 level input for FM keyed AGC function

VTUNE 35 tuning voltage input antenna DAA

CPOUT 36 charge pump output

VCC(PLL) 37 tuning PLL supply voltage

VCOGND 38 VCO ground

OSCFDB 39 VCO feedback

OSCTNK 40 VCO tank circuit

VCC(VCO) 41 VCO supply voltage

SWPORT 42 software controllable port output

AFSAMPLE 43 AF sample ﬂag output

AFHOLD 44 AF hold ﬂag output and input

FGND 45 reference frequency ground

ADDR2 46 address select input 2

ADDR1 47 address select input 1

i.c. 48 internally connected; leave open

i.c. 49 internally connected; leave open

SDA 50 I2C-bus data line input and output

Table 3. Pin description

…continued

Symbol Pin Description

Product data sheet Rev. 01 — 21 February 2007 8 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

7. Functional description

7.1 FM mixer 1

The FM quadrature mixer converts FM RF (65 MHz to 108 MHz) to an IF frequency of

10.7 MHz. The FM mixer provides high image rejection, a large dynamic range and

selectable mixer gain. The image rejection can be selected between low injection of LO

and high injection of LO via the I2C-bus independently of the band selection. A separate

RF input for weather band is available.

7.2 FM RF AGC

AGC detection is at the FM front-end mixer input and the AM/FM IF AGC ampliﬁer input,

both with programmable AGC thresholds. When the threshold is exceeded, the PIN diode

drive circuit sources a current to an external PIN diode circuit, keeping the RF signal level

constant.

Keyed AGC function is selectable via the I2C-bus and uses the in-band level information

from the IF DSP.

The AGC PIN diode drive circuit can optionally deliver a ﬁxed current as a local function.

In AM mode, the AGC PIN diode drive circuit can be set to generate a ﬁxed source current

into the external FM PIN diode circuitry.

7.3 Antenna DAA1 and DAA2

The antenna DAA1 measures the VCO tuning voltage and multiplies it with a factor

deﬁned by the 7-bit DAA1 setting to generate a tuning voltage for the FM antenna tank

circuit. If a second FM tank circuit is applied, the tuning voltage can be derived from the

antenna DAA2 output. The antenna DAA2 measures the output voltage of the antenna

DAA1 and multiplies it with a factor deﬁned by the 4-bit DAA2 setting.

SCL 51 I2C-bus clock line input

DGND 52 digital ground

FREF1 53 reference frequency input 1

FREF2 54 reference frequency input 2

VREF 55 reference voltage noise decoupling

GND 56 ground

VCC 57 supply voltage (8.5 V)

IFOUT1 58 IF AGC ampliﬁer output 1

IFOUT2 59 IF AGC ampliﬁer output 2

IFAGCMSB 60 MSB input for IF AGC ampliﬁer gain setting

IFAGCLSB 61 LSB input for IF AGC ampliﬁer gain setting

VCC(IF) 62 IF AGC ampliﬁer supply voltage

IFGND 63 IF AGC ampliﬁer ground

IFAGCBIAS 64 bias voltage decoupling for IF AGC ampliﬁer

Table 3. Pin description

…continued

Symbol Pin Description

Product data sheet Rev. 01 — 21 February 2007 9 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

7.4 AM LNA

The AM low noise ampliﬁer is fully integrated.

7.5 AM RF AGC

The AM RF AGC is partially integrated. Detection is at the output of the AM LNA and at

the input of the AM/FM IF AGC ampliﬁer, both with programmable thresholds. First the

integrated AGC reduces the gain of the LNA. After the LNA AGC, the PIN diode AGC

takes over by sinking a current via an external PIN diode.

In FM mode, the AM AGC can be set to a ﬁxed attenuation.

7.6 AM mixer

The large dynamic range AM mixer converts AM RF (144 kHz to 26.1 MHz) to an IF

frequency of 10.7 MHz.

7.7 VCO and dividers

The varactor tuned LC oscillator together with the dividers provides the LO signal for both

AM and FM front-end mixers. The VCO has an operating frequency of approximately

160 MHz to 256 MHz. In FM mode the LO frequency is divided by 2 or 3. These dividers

generate in-phase and quadrature-phase output signals used in the FM front-end mixer

for image rejection. In weather band mode the LO signal is directly phase shifted to

generate the in-phase and quadrature-phase signals. In AM mode the LO frequency is

divided by 6, 8, 10, 16 or 20 depending on the selected AM band.

7.8 Tuning PLL

The tuning PLL locks the VCO frequency divided by the programmable divider ratio to the

reference frequency. Due to the combination of different charge pump signals in the

PLL loop ﬁlter, the loop parameters are adapted dynamically. Tuning to different

RF frequencies is done by changing the programmable divider ratio. The tuning step size

is selected with the reference frequency divider setting.

7.9 AM/FM IF AGC ampliﬁer

The combined AM/FM IF AGC ampliﬁer delivers a suitable IF signal for the ADC in the

IF DSP. The maximum gain of the IF AGC ampliﬁer can be selected via the I2C-bus. The

gain of this ampliﬁer is automatically adapted via interfacing signals from the IF DSP. The

IF AGC ampliﬁer has three signal inputs, two for FM and one for AM. This allows the

application of multiple external ﬁlters, e.g. with different bandwidths.

8. I2C-bus protocol

Fig 3. Write mode

ACK-s ACK-s

DATASLAVE ADDRESS W

data transferred

(n bytes + acknowledge)

001aad051

PS ACK-s

MSA

Product data sheet Rev. 01 — 21 February 2007 10 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.1 Read mode

Read data is loaded into the I2C-bus register at the preceding acknowledge clock pulse.

8.1.1 Read mode: data byte TUNER

Fig 4. Read mode

DATA

ACK-s ACK-m DATA NASLAVE ADDRESS R

001aad049

data transferred

(n − 1 bytes + acknowledge)

Table 4. Description of I2C-bus format

Code Description

S START condition

Slave address W 1100 0000b for pin ADDR2 and pin ADDR1 grounded

1100 0010b for pin ADDR2 grounded and pin ADDR1 ﬂoating

1100 0100b for pin ADDR2 ﬂoating and pin ADDR1 grounded

1100 0110b for pin ADDR2 and pin ADDR1 ﬂoating

Slave address R 1100 0001b for pin ADDR2 and pin ADDR1 grounded

1100 0011b for pin ADDR2 grounded and pin ADDR1 ﬂoating

1100 0101b for pin ADDR2 ﬂoating and pin ADDR1 grounded

1100 0111b for pin ADDR2 and pin ADDR1 ﬂoating

ACK-s acknowledge generated by the slave

ACK-m acknowledge generated by the master

NA not acknowledge

MSA mode and subaddress byte

Data data byte

P STOP condition

Table 5. Read register overview

Data byte Name Reference

0h TUNER Section 8.1.1

1h ID Section 8.1.2

Table 6. TUNER - data byte 0h bit allocation

7 6 5 4 3 2 1 0

RAGC1 RAGC0 TAS1 TAS0 - - - POR

Product data sheet Rev. 01 — 21 February 2007 11 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.1.2 Read mode: data byte ID

8.2 Write mode

The tuner is controlled by the I2C-bus. After the IC address the MSA byte contains the

control of the tuning action via the bits MODE[2:0] and REGC and subaddressing via bits

SA[3:0] (see Figure 5).

Table 7. TUNER - data byte 0h bit description

Bit Symbol Description

7 and 6 RAGC[1:0] RFAGC attenuation indicator

AM mode, PIN diode current on pin IAMAGC:

00 = no AGC

01 = LNA AGC

10=I

AGC <1mA

11=I

AGC >1mA

FM mode, PIN diode current on pin IFMAGC:

00 = < 0.1 mA

01 = 0.1 mA to 0.5 mA

10 = 0.5 mA to 2.5 mA

11 = > 2.5 mA

5 and 4 TAS[1:0] tuning action state; the signal TAS informs about internal control

functions of the tuner action state machine; this way the progress of

tuner actions can be monitored by the microcontroller;

see Figure 8 to Figure 18

00 = no current action

01 = mute started and in progress at DSP

10 = PLL tuning in progress and mute activated at DSP

11 = PLL tuning ready and mute activated at DSP

3 to 1 - not used

0 POR power-on reset

0 = normal operation

1=I

2C-bus data is reset to default POR state; POR is reset to

logic 0 after the TEF6730A has been read out and written to via

I2C-bus at least once

Table 8. ID - data byte 1h bit allocation

7 6 5 4 3 2 1 0

- - - - - ID2 ID1 ID0

Table 9. ID - data byte 1h bit description

Bit Symbol Description

7 to 3 - not used

2 to 0 ID[2:0] device type identiﬁcation 110 = TEF6730A

Product data sheet Rev. 01 — 21 February 2007 12 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

The tuner circuit is controlled by the CONTROL register. Any data change in the

CONTROL register has immediate effect and will change the operation of the tuner circuit

accordingly. Transmitted I2C-bus data is not loaded into the CONTROL register directly

but loaded into a BUFFER register instead. This allows the IC to take care of tuning

actions freeing the microcontroller from cumbersome controls and timings.

Controlled by a state machine, the BUFFER data will be loaded into the CONTROL

BUFFER register. This register swap action allows a fast return to the previous setting

because the previous data remains available in the BUFFER register (see Figure 6 and

Figure 7).

Via MODE several operational modes can be selected for the state machine. MODE offers

all standard tuning actions as well as generic control for ﬂexibility. The state machine

controls the tuner by controlling the internal I2C-bus data. Action progress is monitored by

the accompanying IF DSP via the AFSAMPLE and AFHOLD lines. This way, functions like

tuning mute and weak signal processing can be controlled complementary to the tuner

action.

The state machine operation starts at the end of transmission (P = STOP). In case a

previous action is still active, this is ignored and the new action deﬁned by MODE is

started immediately. When only the address byte is transmitted, no action is started at all

(device presence test).

To minimize the I2C-bus transmission time, only bytes that include data changes need to

be written. Following the MSA byte the transmission can start at any given data byte

deﬁned by the subaddress (SA) bits.

Furthermore, when writing the buffered range either the current BUFFER data or the

current CONTROL data can be used as default, controlled by the REGC bit:

•With REGC = 0, any BUFFER data that is not newly written via I2C-bus remains

unchanged. In general, the BUFFER register will contain the previous tuner setting, so

this becomes default for the new setting. When only the MSA byte is transmitted

deﬁning a tuning MODE with REGC = 0, the tuner will return to its previous settings

(see Figure 6).

•With REGC = 1, the BUFFER register is loaded with data from the CONTROL register

ﬁrst. This way, not written BUFFER data equals the CONTROL data. Since the

CONTROL register contains the current tuner setting with REGC = 1, the current

tuner setting is default for the new setting. When a tuning MODE action is deﬁned with

REGC = 1, the tuner will keep its current settings (CONTROL = current) for all data

that is not newly written during the transmission (see Figure 7).

After power-on reset, all registers are in their default settings. The control signals for the

IF DSP are set to AFSAMPLE = HIGH and AFHOLD = HIGH (i.e. mute state). Any action

of the state machine will change this setting to a new one as deﬁned by the bits

MODE[2:0].

Product data sheet Rev. 01 — 21 February 2007 13 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Table 10. Write mode subaddress overview

Subaddress Name Default Reference

0h CONTROL 0000 0100b Section 8.2.2

1h PLLM 0000 1000b Section 8.2.3

2h PLLL 0111 1110b Section 8.2.4

3h DAA 0100 0000b Section 8.2.5

4h AGC 1000 0000b Section 8.2.6

5h BAND 0010 0000b Section 8.2.7

Fh TEST 0000 0000b Section 8.2.8

Fig 5. I2C-bus control

001aae094

AFSAMPLE

SA = 00h to 05h

load

REGC = 1

swap

MODE

AFHOLD

CONTROL REGISTER

SA = 00h to 05h

BUFFER REGISTER

SA = 00h to 05h

MODE DECODER

TUNER CIRCUIT

I2C-BUS

STATE MACHINE

Product data sheet Rev. 01 — 21 February 2007 14 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 6. Write to CONTROL register with swap, REGC = 0

001aae095

CONTROL

BUFFER

MODE = load, REGC = 0, SA = 2

swap

address

new

MSA byte 2 byte 3 byte 4 byte 5 P

byte 0 previous current

byte 1 previous current

byte 0 current previous

byte 1 current previous

byte 2 current new

byte 3 current new

byte 4 current new

byte 5 current new

byte 2 previous current

newbyte 3 previous current

newbyte 4 previous current

newbyte 5 previous current

Product data sheet Rev. 01 — 21 February 2007 15 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 7. Write to CONTROL register with swap, REGC = 1

001aae096

CONTROL

BUFFER

MODE = load, REGC = 1, SA = 3

load

address MSA byte 3 byte 4 byte 5 P

byte 0 previous current

byte 1 previous current

byte 2 previous current

byte 0 current current

byte 1 current current

byte 2 current current

byte 3 current new

byte 4 current new

byte 5 current

current

new

newbyte 3 previous current

newbyte 4 previous current

newbyte 5 previous current

swap

Product data sheet Rev. 01 — 21 February 2007 16 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.2.1 Mode and subaddress byte for write

[1] When the write transmission of a state machine command starts during a mute state of the state machine,

the sequences of the state machine start immediately with the actions which follow the mute period in the

standard sequence (see Figure 9,Figure 11,Figure 13,Figure 15 and Figure 17).

[2] References to mute are only used for better understanding. Muting is performed in the IF DSP controlled by

the tuner AFHOLD and AFSAMPLE lines.

[3] In the modes preset and search the AM AGC time constant is set to fast during the period of complete

mute.

[4] The AF update sequence can also be started by pulling the AFHOLD pin LOW. In this case the AF

information should be loaded into the BUFFER before. LOW period for a correct AF update timing:

tLOW >20µs. Between the end of the I2C-bus transmission and the falling edge of the AFHOLD pulse a

delay of ≥20 µs is necessary.

Table 11. MSA - mode and subaddress byte bit allocation

7 6 5 4 3 2 1 0

MODE2 MODE1 MODE0 REGC SA3 SA2 SA1 SA0

Table 12. MSA - mode and subaddress byte bit description

Bit Symbol Description

7 to 5 MODE[2:0] mode; see Table 13

4 REGC register mode

0 = buffer mode or back mode: previous tuning data is default for

new I2C-bus write (data of the BUFFER register is not changed

before I2C-bus write); see Figure 6

1 = control mode or current mode: current tuning data is default for

new I2C-bus write (the BUFFER register is loaded with CONTROL

3 to 0 SA[3:0] subaddress; write data byte subaddress 0 to 15. The subaddress

value is auto-incremented and will revert from SA = 15 to SA = 0. The

auto-increment function cannot be switched off.

Table 13. Tuning action modes[1]

MODE2 MODE1 MODE0 Symbol Description[2]

000bufferwrite BUFFER register, no state machine action, no

swap

0 0 1 preset tune to new program with 60 ms mute control; swap[3];

see Figure 8 and Figure 9

0 1 0 search tune to new program and stay muted (for release use

end mode); swap[3]; see Figure 10 and Figure 11

0 1 1 AF update tune to AF program; check AF quality and tune back

to main program; two swap operations[4];

see Figure 12 and Figure 13

1 0 0 jump tune to AF program in minimum time; swap;

see Figure 14 and Figure 15

1 0 1 check tune to AF program and stay muted (for release use

end mode); swap; see Figure 16 and Figure 17

1 1 0 load write CONTROL register via BUFFER; no state

machine action; immediate swap; see Figure 6 and

Figure 7

1 1 1 end end action; release mute; no swap; see Figure 18

Product data sheet Rev. 01 — 21 February 2007 17 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 8. Preset mode

Fig 9. Preset mode, started during mute

001aae097

1 ms PLL

FAST

50 µs

suggested IF DSP signal control

60 ms

I2C-bus

time

reset

f1 f2tuning

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

'00' '01' '10' '11'

'00'

'11'

001aae098

PLL

50 µs

60 ms

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

f1 f2

'11' '10' '11'

'00'

'11'

Product data sheet Rev. 01 — 21 February 2007 18 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 10. Search mode

Fig 11. Search mode, started during mute

001aae099

1 ms PLL

FAST

suggested IF DSP signal control

I2C-bus

time

reset

f1 f2tuning

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

'00' '01' '10' '11' '11'

001aae100

PLL

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

f1 f2

'11' '10' '11' '11'

Product data sheet Rev. 01 — 21 February 2007 19 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 12. AF update mode

Fig 13. AF update mode, started during mute

001aae101

1 ms 2 ms 0.5 ms

PLL PLL

HOLD

suggested IF DSP signal control

I2C-bus

time

reset

f2 f1tuning

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

reset store AFU result

f1 f2

'00' '01' '10' '11' '10' '00''00'

001aae102

PLL 0.5 ms

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

f2 f1

'11' '10' '00' '00'

Product data sheet Rev. 01 — 21 February 2007 20 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 14. Jump mode

Fig 15. Jump mode, started during mute

001aae103

1 ms 0.5 ms

PLL

HOLD

suggested IF DSP signal control

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

reset

f1 f2

'00' '01' '10' '11'

'00''00'

001aae104

PLL 0.5 ms

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

f1 f2

'11' '10' '00'

'11'

'00'

Product data sheet Rev. 01 — 21 February 2007 21 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 16. Check mode

Fig 17. Check mode, started during mute

001aae105

1 ms PLL

HOLD

suggested IF DSP signal control

I2C-bus

time

reset

f1 f2tuning

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

'00' '01' '10' '11' '11'

001aae106

PLL

I2C-bus

time

tuning

TAS read

AFHOLD

AFSAMPLE

f1 f2

'11' '10' '11' '11'

Product data sheet Rev. 01 — 21 February 2007 22 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.2.2 Write mode: data byte CONTROL

Fig 18. End mode

001aae107

suggested IF DSP signal control

I2C-bus

time

TAS read

AFHOLD

AFSAMPLE

quality detectors

tuning mute

WS processing

'11'

'00' '00'

Table 14. CONTROL - data byte 0h bit allocation with default setting

7 6 5 4 3 2 1 0

RFGAIN 0 FLAG IFGAIN NBAGC1 NBAGC0 DAASW CFSW

0 000100

Table 15. CONTROL - data byte 0h bit description

Bit Symbol Description

7 RFGAIN FM RF gain

0 = standard gain

1 = +6 dB added gain

6 - not used, must be set to logic 0

5 FLAG software port output open-collector

0 = SWPORT pin inactive (high-impedance)

1 = SWPORT pin active (pull-down to ground)

4 IFGAIN IF gain

0 = standard IF gain

1 = increased IF gain (6 dB)

3 and 2 NBAGC[1:0] RF AGC start level; setting of narrow band (IF) detection

00 = 700 mV (peak value)

01 = 560 mV (peak value)

10 = 450 mV (peak value)

11 = 350 mV (peak value)

Product data sheet Rev. 01 — 21 February 2007 23 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.2.3 Write mode: data byte PLLM

8.2.4 Write mode: data byte PLLL

8.2.5 Write mode: data byte DAA

1 DAASW antenna DAA mode in FM

0 = standard; DAA output voltage is controlled by Vtune

1 = DAA output voltage is a ﬁxed temperature stable voltage

controlled by the DAA setting (independent of Vtune)

0 CFSW ceramic ﬁlter switch

0 = CFSW1 pin active (low-impedance) and CFSW2 pin inactive

(high-impedance)

1 = CFSW2 pin active (low-impedance) and CFSW1 pin inactive

(high-impedance)

Table 15. CONTROL - data byte 0h bit description

…continued

Bit Symbol Description

Table 16. PLLM - data byte 1h bit allocation with default setting

7 6 5 4 3 2 1 0

CPOFF PLL14 PLL13 PLL12 PLL11 PLL10 PLL9 PLL8

00001000

Table 17. PLLM - data byte 1h bit description

Bit Symbol Description

7 CPOFF charge pump off

0 = standard operation

1 = charge pump deactivated

6 to 0 PLL[14:8] upper byte of PLL divider word

Table 18. PLLL - data byte 2h bit allocation with default setting

7 6 5 4 3 2 1 0

PLL7 PLL6 PLL5 PLL4 PLL3 PLL2 PLL1 PLL0

01111110

Table 19. PLLL - data byte 2h bit description

Bit Symbol Description

7 to 0 PLL[7:0] lower byte of PLL divider word; PLL[14:0] is the divider ratio N of the

VCO programmable divider; N = 1024 to 32767

Table 20. DAA - data byte 3h bit allocation with default setting

7 6 5 4 3 2 1 0

AGCSW DAA6 DAA5 DAA4 DAA3 DAA2 DAA1 DAA0

01000000

Product data sheet Rev. 01 — 21 February 2007 24 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.2.6 Write mode: data byte AGC

Table 21. DAA - data byte 3h bit description

Bit Symbol Description

7 AGCSW RF AGC switch

0 = no drive of unused RF AGC PIN diode (FM PIN diode in

AM mode or AM PIN diode in FM mode)

1 = unused PIN diode supplied with constant current

6 to 0 DAA[6:0] alignment of antenna circuit tuning voltage in FM mode

(0.1Vtune to 2.0Vtune)

Table 22. AGC - data byte 4h bit allocation with default setting

7 6 5 4 3 2 1 0

SDAA3 SDAA2 SDAA1 SDAA0 WBAGC1 WBAGC0 KAGC LODX

10000000

Table 23. AGC - data byte 4h bit description

Bit Symbol Description

7 to 4 SDAA[3:0] alignment of second antenna circuit tuning voltage in FM mode

(0.7VDAAOUT1 to 1.35VDAAOUT1)

3 and 2 WBAGC[1:0] RF AGC start level; setting of wideband (RF) detection; for AM,

see Table 24 and for FM, see Table 25

1 KAGC FM keyed AGC

0 = keyed AGC off

1 = keyed AGC on

0 LODX local switch

0 = standard operation (DX)

1 = forced FM RF AGC attenuation (LOCAL)

Table 24. Setting of RF AGC threshold voltage for AM

WBAGC1 WBAGC0 AM output (RMS value) at LNAOUT

0 0 250 mV

0 1 200 mV

1 0 150 mV

1170mV

Table 25. Setting of RF AGC threshold voltage for FM

WBAGC1 WBAGC0 FM mixer input voltage (RMS value) at FMMIXIN

0024mV

0117mV

1012mV

119mV

Product data sheet Rev. 01 — 21 February 2007 25 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

8.2.7 Write mode: data byte BAND

The correct charge pump current for each reference frequency is selected automatically,

see Table 30.

Table 26. BAND - data byte 5h bit allocation with default setting

7 6 5 4 3 2 1 0

BAND2 BAND1 BAND0 FREF2 FREF1 FREF0 LOINJ FMIFIN

00100000

Table 27. BAND - data byte 5h bit description

Bit Symbol Description

7 to 5 BAND[2:0] see Table 28

4 to 2 FREF[2:0] PLL reference frequency; see Table 29

1 LOINJ 0 = high injection image suppression

1 = low injection image suppression

0 FMIFIN 0 = FMIFAGCIN1 input is selected

1 = FMIFAGCIN2 input is selected

Table 28. Decoding of BAND bits

BAND2 BAND1 BAND0 Divider ratio M Receiver band

0001WB

0012FM

0103FM

0116AM

1008AM

10110AM

11016AM

11120AM

Table 29. Reference frequencies

FREF2 FREF1 FREF0 fref

0 0 0 100 kHz

00150kHz

01025kHz

01120kHz

10010kHz

1 0 1 reserved

1 1 0 reserved

1 1 1 reserved

Product data sheet Rev. 01 — 21 February 2007 26 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[1] X = don’t care.

8.2.7.1 Tuning overview

If LOINJ = 0: .

If LOINJ = 1: .

; where M is the divider ratio of the VCO frequency for AM mixer and

FM mixer .

8.2.8 Write mode: data byte TEST

[1] The test control byte is for internal use only.

Table 30. Charge pump source[1]

FREF2 FREF1 FREF0 LOINJ Charge pump

current fref

000XCP1100kHz

001XCP250kHz

010XCP325kHz

0111CP320kHz

0110CP420kHz

100XCP510kHz

NfRF 10.7 MHz+()M×

fref

---------------------------------------------------------

NfRF 10.7 MHz–()M×

fref

---------------------------------------------------------

tuning step fref

----------

MfVCO

fmixer

---------------

Table 31. Standard tuner settings

Broadcast band BAND2 BAND1 BAND0 M FREF2 FREF1 FREF0 fref LOINJ Tuning step

Europe FM and US FM 0 0 1 2 0 0 0 100 kHz 0 50 kHz

Japan FM 0 1 0 3 0 0 0 100 kHz 1 33.3 kHz

East Europe FM (OIRT FM) 0 1 0 3 0 1 1 20 kHz 1 6.67 kHz

WB FM 0 0 0 1 0 1 0 25 kHz 0 25 kHz

AM MW and LW 1 1 1 20 0 1 1 20 kHz 0 1 kHz

AM SW 120 m to 60 m 1 1 0 16 1 0 0 10 kHz 0 0.625 kHz

AM SW 49 m to 22 m 1 0 1 10 1 0 0 10 kHz 0 1 kHz

AM SW 25 m to 15 m 1 0 0 8 1 0 0 10 kHz 0 1.25 kHz

AM SW 16 m to 11 m 0 1 1 6 1 0 0 10 kHz 0 1.67 kHz

Table 32. TEST - data byte Fh bit allocation with default setting (not buffered)[1]

7 6 5 4 3 2 1 0

0 0 0 0 TEST3 TEST2 TEST1 TEST0

0000

Product data sheet Rev. 01 — 21 February 2007 27 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

9. Limiting values

[1] The maximum voltage must be less than VCCA.

[2] Human body model: Class 2 according to JESD22-A114C.01.

[3] Charge device model: Class 3 according to JESD22-C101C.

[4] Human body model: Class 1C according to JESD22-A114C.01.

10. Thermal characteristics

Table 33. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCCA analog supply voltage on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),

VCC(IF), FMMIXOUT1, FMMIXOUT2,

AMMIXOUT1 and AMMIXOUT2

−0.3 +10 V

∆VCCAn voltagedifferencebetween

any analog supply pins −0.3 +0.3 V

VSCL voltage on pin SCL −0.3 +5.5 V

VSDA voltage on pin SDA −0.3 +5.5 V

Viinput voltage on pins ADDR1 and ADDR2 [1] −0.3 +5.5 V

Vooutput voltage on pins AFHOLD and AFSAMPLE −0.3 +5.5 V

on pin SWPORT −0.3 +10 V

Vnvoltage on any other pin −0.3 VCCA + 0.3 V

Ptot total power dissipation - 1100 mW

Tstg storage temperature −55 +150 °C

Tamb ambient temperature soldered exposed die pad

subjective functionality −40 +105 °C

full functionality −40 +85 °C

Vesd electrostatic discharge

voltage on all pins except pin VCC(VCO) [2] −2000 +2000 V

[3] −500 +500 V

on pin VCC(VCO) [4] −1000 +2000 V

[3] −500 +500 V

Table 34. Thermal characteristics

Symbol Parameter Conditions Typ Unit

Rth(j-a) thermal resistance from junction to ambient in free air 29.6 K/W

Rth(j-c) thermal resistance from junction to case 17.5 K/W

Product data sheet Rev. 01 — 21 February 2007 28 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

11. Static characteristics

Table 35. Static characteristics

CCA

= 8.5 V; T

amb

=25

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Supply voltage

VCCA analog supply voltage on pins VCC, VCC(PLL),

VCC(VCO), VCC(RF), VCC(IF),

FMMIXOUT1, FMMIXOUT2,

AMMIXOUT1 and

AMMIXOUT2

8 8.5 9 V

Current in FM mode

ICC(RF) RF supply current Tamb =−40 °C - 14 - mA

Tamb =25°C - 15 - mA

Tamb =85°C - 16 - mA

ICC(PLL) PLL supply current Tamb =−40 °C - 7.9 - mA

Tamb =25°C - 7.6 - mA

Tamb =85°C - 7.2 - mA

ICC(VCO) VCO supply current Tamb =−40 °C - 3.8 - mA

Tamb =25°C - 3.6 - mA

Tamb =85°C - 3.5 - mA

ICC supply current Tamb =−40 °C - 23 - mA

Tamb =25°C - 21.5 - mA

Tamb =85°C - 19 - mA

ICC(IFAGC) IF AGC supply current Tamb =−40 °C - 26 - mA

Tamb =25°C - 26 - mA

Tamb =85°C - 26 - mA

IFMMIXOUT1 current on

pin FMMIXOUT1 Tamb =−40 °C - 5.3 - mA

Tamb =25°C - 5.8 - mA

Tamb =85°C - 6.1 - mA

IFMMIXOUT2 current on

pin FMMIXOUT2 Tamb =−40 °C - 5.3 - mA

Tamb =25°C - 5.8 - mA

Tamb =85°C - 6.1 - mA

ICC(tot) total supply current - 85.3 - mA

Current in AM mode

ICC(RF) RF supply current Tamb =−40 °C - 39.5 - mA

Tamb =25°C - 39 - mA

Tamb =85°C - 38 - mA

ICC(PLL) PLL supply current Tamb =−40 °C - 7.9 - mA

Tamb =25°C - 7.6 - mA

Tamb =85°C - 7.2 - mA

ICC(VCO) VCO supply current Tamb =−40 °C - 3.8 - mA

Tamb =25°C - 3.6 - mA

Tamb =85°C - 3.5 - mA

Product data sheet Rev. 01 — 21 February 2007 29 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

12. Dynamic characteristics

ICC supply current Tamb =−40 °C - 21.5 - mA

Tamb =25°C - 21 - mA

Tamb =85°C - 20 - mA

ICC(IFAGC) IF AGC supply current Tamb =−40 °C - 33 - mA

Tamb =25°C - 32.5 - mA

Tamb =85°C - 32 - mA

IAMMIXOUT1 current on

pin AMMIXOUT1 Tamb =−40 °C-6-mA

Tamb =25°C - 5.5 - mA

Tamb =85°C-5-mA

IAMMIXOUT2 current on

pin AMMIXOUT2 Tamb =−40 °C-6-mA

Tamb =25°C - 5.5 - mA

Tamb =85°C-5-mA

ICC(tot) total supply current - 114.7 - mA

Table 35. Static characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Table 36. Dynamic characteristics

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Reference frequency

External reference frequency, circuit inputs: pins FREF1 and FREF2

fext external frequency - 100 - kHz

C/N carrier-to-noise ratio required from reference

source; fext = 100 kHz;

∆f=10kHz

115 - - dBc/√Hz

Ii(ext)(min)(M) peak minimum

external input current square wave signal [1] - - 200 µA

Ii(ext)(max)(M) peak maximum

external input current square wave signal [1] 750 - - µA

Icm(ext) external

common-mode current from each pin to GND −50 - +50 µA

Riinput resistance - 5 10 Ω

Vcm common-mode

voltage measured between each pin to

GND 1.0 1.2 1.4 V

Tuning system; see Table 28,Table 29,Table 30 and Table 31

Voltage controlled oscillator

fVCO(min) minimum VCO

frequency [2] - - 130 MHz

application according to

Figure 25 [2] - - 159.9 MHz

fVCO(max) maximum VCO

frequency [2] 256 - - MHz

C/N carrier-to-noise ratio fVCO = 200 MHz; ∆f = 10 kHz;

Q=30 94 98 - dBc/√Hz

Product data sheet Rev. 01 — 21 February 2007 30 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

∆f frequency deviation caused by ripple on supply

voltage; fripple = 100 Hz;

VCC(ripple) = 50 mV (RMS);

fVCO = 200 MHz; standard FM

-2-Hz

Charge pump: pin CPOUT; see Table 30

Isink(CP1) CP1 sink current VCPOUT = 0.5 V to

VCC(PLL) −1.3 V 130 180 240 µA

Isource(CP1) CP1 source current VCPOUT = 0.5 V to

VCC(PLL) −1.3 V −240 −180 −130 µA

Isink(CP2) CP2 sink current VCPOUT = 0.7 V to

VCC(PLL) −1.5 V 270 360 480 µA

Isource(CP2) CP2 source current VCPOUT = 0.7 V to

VCC(PLL) −1.5 V −480 −360 −270 µA

Isink(CP3) CP3 sink current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V 580 780 1050 µA

Isource(CP3) CP3 source current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V −1050 −780 −580 µA

Isink(CP4) CP4 sink current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V 1040 1400 1900 µA

Isource(CP4) CP4 source current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V −1900 −1400 −1040 µA

Isink(CP5) CP5 sink current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V 1630 2200 2970 µA

Isource(CP5) CP5 source current VCPOUT = 0.7 V to

VCC(PLL) −0.7 V −2970 −2200 −1630 µA

Charge pump: pin VTUNE

Io(sink) output sink current Vtune = 0.9 V to

VCC(PLL) −0.7 V 2070 2800 3780 µA

Io(source) output source current Vtune = 0.9 V to

VCC(PLL) −0.7 V −3780 −2800 −2070 µA

Timings

ttune tuning time Europe FM and US FM band;

fref = 100 kHz; fRF = 87.5 MHz

to 108 MHz

- 0.75 1 ms

AM MW band; fref = 20 kHz;

fRF = 0.53 MHz to 1.7 MHz - - 10 ms

tupd(AF) AF update time cycle time for inaudible AF

update including 1 ms mute

start and 1 ms mute release

time

- 6 6.5 ms

Antenna Digital Auto Alignment (DAA)

DAA1: pin DAAOUT1[3]

Gconv(DAA) DAA conversion gain 0.1 - 2

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 31 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Vooutput voltage FM mode; DAASW = 0

minimum value - - 0.6 V

maximum value VCC(PLL) − 0.6 - - V

FM mode; DAASW = 1;

independent of tuning voltage

minimum value; data byte

DAA bits

DAA[6:0] = 000 0000

- - 0.6 V

maximum value; data byte

DAA bits

DAA[6:0] = 111 1111

VCC(PLL) − 0.6 - - V

AM mode; independent of

tuning voltage

minimum value; data byte

DAA bits

DAA[6:0] = 000 0000

- - 0.6 V

maximum value; data byte

DAA bits

DAA[6:0] = 111 1111

VCC(PLL) − 0.6 - - V

Vn(o) output noise voltage data byte DAA bits

DAA[6:0] = 100 0000;

FM mode; Vtune = 4 V with

frequency range from

300 Hz to 22 kHz

- 30 100 µV

∆Vo(T) output voltage

deviation over

temperature

Tamb =−40 °C to +85 °C; data

byte DAA bits

DAA[6:0] = 100 0000

−30 - +30 mV

∆Vo(step) step output voltage

tolerance n = 0 to 127; FM mode;

Vtune =4V −0.5VLSB 0 +0.5VLSB

∆Vooutput voltage

deviation Vtune =4V; I

load =50µA−VLSB -+V

LSB

Vtune =4V; I

load =−50 µA−VLSB -+V

LSB

ts(o) output settling time VDAAOUT1 = 0.2 V to 8.25 V;

CL= 270 pF -3060µs

αripple ripple rejection VCC(ripple) /V

o; data byte DAA

bits DAA[6:0] = 101 0101;

FM mode; Vtune =4V;

fripple = 100 Hz;

VCC(ripple) = 100 mV

-40-dB

DAA2: pin DAAOUT2[4]

Gconv(DAA) DAA conversion gain 0.7 - 1.35

Vooutput voltage AM mode and FM mode

minimum value - - 0.6 V

maximum value VCC(PLL) − 0.8 - - V

Vn(o) output noise voltage data byte AGC bits

SDAA[3:0] = 1000; FM mode;

VDAAOUT1 = 4 V with frequency

range from 300 Hz to 22 kHz

- 30 100 µV

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 32 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

∆Vo(T) output voltage

deviation over

temperature

Tamb =−40 °C to +85 °C; data

byte AGC bits

SDAA[3:0] = 1000

−30 - +30 mV

∆Vo(step) step output voltage

tolerance n = 0 to 15; FM mode;

VDAAOUT1 =4V −0.5VLSB 0 +0.5VLSB

∆Vooutput voltage

deviation VDAAOUT1 =4V; I

load =50µA−VLSB -+V

LSB

VDAAOUT1 =4V; I

load =−50 µA−VLSB -+V

LSB

ts(o) output settling time VDAAOUT1 =4V;

VDAAOUT2 = 2.8 V to 5.4 V;

CL= 270 pF

-2030µs

αripple ripple rejection VCC(ripple) /V

DAAOUT1;data byte

AGC bits SDAA[3:0] = 1010;

FM mode; VDAAOUT1 =4V;

fripple = 100 Hz;

VCC(ripple) = 100 mV

-50-dB

AM channel

AM RF AGC wideband detector (average detector): pin LNAOUT

VLNAOUT(RMS) RMS voltage on

pin LNAOUT start level of wideband AGC;

RL= 430 Ω (load at

pin LNAOUT); m = 0.3;

see Table 24 and Table 25

data byte AGC bits

WBAGC[1:0] = 00 175 250 350 mV

data byte AGC bits

WBAGC[1:0] = 01 140 200 280 mV

data byte AGC bits

WBAGC[1:0] = 10 105 150 210 mV

data byte AGC bits

WBAGC[1:0] = 11 49 70 98 mV

AM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2

Vo(IFOUT)(M) peak output voltage

between pin IFOUT1

and pin IFOUT2

start level of narrow-band

AGC; data byte CONTROL bit

IFGAIN = 0;

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW;

see Table 15

data byte CONTROL bits

NBAGC[1:0] = 00 490 700 980 mV

data byte CONTROL bits

NBAGC[1:0] = 01 390 560 780 mV

data byte CONTROL bits

NBAGC[1:0] = 10 315 450 630 mV

data byte CONTROL bits

NBAGC[1:0] = 11 245 350 490 mV

AM LNA and AGC

Input: pin LNAIN; output: pin LNAOUT

Riinput resistance 0.9 1.3 1.8 MΩ

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 33 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Ciinput capacitance - 46 69 pF

Gmtransconductance gain Io/V

i36 52 74 mA/V

∆Gm(T) transconductancegain

deviation over

temperature

Tamb =−40 °C to +85 °C;

see Figure 19 ---dB

IP3 third-order intercept

point RL= 430 Ω (load at

pin LNAOUT) 111 114 - dBµV

IP2 second-orderintercept

point RL= 430 Ω (load at

pin LNAOUT) 120 129 - dBµV

Vn(i)(eq) equivalent input noise

voltage Csource = 110 pF; RL= 430 Ω

(load at pin LNAOUT)

fRF = 1 MHz - 1.1 1.55 nV/√Hz

fRF = 144 kHz - 2.55 3.55 nV/√Hz

Rooutput resistance 80 115 165 Ω

Cooutput capacitance in series with output resistance - 22 33 pF

Vo(p-p)(max) maximum

peak-to-peak output

voltage

- 2.2 - V

∆GAGC AGC gain range 8 11 14 dB

RF PIN diode AGC current generator output: pin IAMAGC

∆GAGC AGC gain range fRF = 1 MHz; dummy aerial

15 pF / 60 pF -50-dB

VIAMAGC voltage on

pin IAMAGC PIN diode drive DC voltage 2.2 - VCCA V

Isink(max) maximum sink current VIAMAGC = 2.2 V [5] 10 - - mA

Isink sink current FM mode; data byte DAA bit

AGCSW = 1 0.6 0.9 1.4 mA

FM mode; data byte DAA bit

AGCSW = 0 - - 100 nA

AM mixer (IF = 10.7 MHz)

Mixer input: pins AMMIXIN and AMMIXDEC

Riinput resistance [6] 40 - - kΩ

Ciinput capacitance [6] - 3 4.5 pF

Vi(max) maximum input

voltage on pin AMMIXIN; 1 dB

compression point of

VMIXOUT1-MIXOUT2; m=0

500 - - mV

Mixer output: pins AMMIXOUT1 and AMMIXOUT2

Rooutput resistance [7] 100 - - kΩ

Cooutput capacitance [7] -47pF

Vo(p-p)(max) maximum

peak-to-peak output

voltage

12 15 - V

Gm(conv) conversion

transconductance gain Io/V

i1.8 2.4 3.2 mA/V

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 34 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

∆Gm(conv)(T) conversion

transconductancegain

deviation over

temperature

Tamb =−40 °C to +85 °C;

see Figure 20 ---dB

IP3 third-order intercept

point RL= 2.6 kΩ (AC load between

output pins); ∆f = 300 kHz 135 138 - dBµV

IP2 second-orderintercept

point RL= 2.6 kΩ (AC load between

output pins) - 170 - dBµV

Vn(i)(eq) equivalent input noise

voltage band limited noise;

Rsource = 750 Ω; noise of

Rsource included; RL= 2.6 kΩ

(AC load between output pins)

- 7.2 10 nV/√Hz

NF noise ﬁgure - 6.2 9 dB

FM channel

FM RF AGC (FM distance mode; data byte AGC bit LODX = 0)

Input: pins FMMIXIN1 and FMMIXIN2

[8]

Vi(FMMIXIN)(RMS) RMS input voltage

between

pin FMMIXIN1 and

pin FMMIXIN2

start level of wideband AGC;

keyed AGC off; data byte AGC

bit KAGC = 0; see Table 24

and Table 25

data byte AGC bits

WBAGC[1:0] = 11 5 9 15 mV

data byte AGC bits

WBAGC[1:0] = 10 71219mV

data byte AGC bits

WBAGC[1:0] = 01 10 17 27 mV

data byte AGC bits

WBAGC[1:0] = 00 14 24 38 mV

start level of wideband AGC;

keyed AGC on; data byte AGC

bit KAGC = 1;

VKAGC >V

th(KAGC)

data byte AGC bits

WBAGC[1:0] = 11 19 30 48 mV

data byte AGC bits

WBAGC[1:0] = 10 21 33 52 mV

data byte AGC bits

WBAGC[1:0] = 01 24 38 60 mV

data byte AGC bits

WBAGC[1:0] = 00 28 45 71 mV

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 35 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

FM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2

Vo(IFOUT)(M) peak output voltage

between pin IFOUT1

and pin IFOUT2

start level of narrow-band

AGC; data byte CONTROL bit

IFGAIN = 0;

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW;

see Table 15

data byte CONTROL bits

NBAGC[1:0] = 00 490 700 980 mV

data byte CONTROL bits

NBAGC[1:0] = 01 390 560 780 mV

data byte CONTROL bits

NBAGC[1:0] = 10 315 450 630 mV

data byte CONTROL bits

NBAGC[1:0] = 11 245 350 490 mV

PIN diode drive output: pin IFMAGC

Isource(max) maximum source

current VTFMAGC =V

IFMAGC + 1.4 V;

data byte AGC bit KAGC = 0 −16 −10 −7mA

Isink(max) maximum sink current at AGC decay;

VTFMAGC =V

IFMAGC; data byte

AGC bit KAGC = 0

71016mA

Isource source current AM mode; data byte DAA bit

AGCSW = 1 -−1.2 - mA

AM mode; data byte DAA bit

AGCSW = 0 -0-mA

data byte AGC bit LODX = 1

(FM local) −0.75 −0.5 −0.35 mA

VIFMAGC voltage on

pin IFMAGC voltage at PIN diode drive

output; VFMMIXIN1 <V

- 100 300 mV

Vth(KAGC) threshold voltage on

pin KAGC threshold level voltage for

narrow-band AGC (keyed

AGC); data byte AGC bit

KAGC = 1; see Table 15 and

Table 23

500 950 1400 mV

FM mixer (IF = 10.7 MHz)

FM RF input: pins FMMIXIN1 and FMMIXIN2

[8]

Vi(RF)(max) maximum RF input

voltage 1 dB compression point of

FM mixer output voltage 75 100 - mV

Vn(i)(eq) equivalent input noise

voltage Rsource = 500 Ω; noise of

Rsource included; RL= 2.6 kΩ

(on output pins FMMIXOUT1

and FMMIXOUT2)

RFGAIN = 0 - 4.7 6.4 nV/√Hz

RFGAIN = 1 - 4.2 - nV/√Hz

Riinput resistance RFGAIN = 0 3 3.8 4.7 kΩ

RFGAIN = 1 1.6 2.0 2.5 kΩ

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 36 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Ciinput capacitance - 2 4 pF

Gm(conv) conversion

transconductance gain Io/V

i; RF gain 1; data byte

PLLM bit RFGAIN = 0 12 18 25 mA/V

Io/V

i; RF gain 2; data byte

PLLM bit RFGAIN = 1 24 36 50 mA/V

∆Gm(conv)(T) conversion

transconductancegain

deviation over

temperature

Tamb =−40 °C to +85 °C;

see Figure 21 ---dB

NF noise ﬁgure Rsource = 500 Ω; Tamb =25°C

RFGAIN = 0 - 4.2 5.7 dB

RFGAIN = 1 - 3.2 4.7 dB

IP3 third-order intercept

point RFGAIN = 0 117 123 - dBµV

RFGAIN = 1 108 114 - dBµV

IRR image rejection ratio Vo(wanted) /V

o(image);

fRF(wanted) = 87.5 MHz;

fRF(image) = 108.9 MHz

25 40 - dB

Output: pins FMMIXOUT1 and FMMIXOUT2

[9]

Rooutput resistance 100 - - kΩ

Cooutput capacitance - 4 6 pF

Vo(p-p)(max) maximum

peak-to-peak output

voltage

4.5 5.6 - V

FM weather band input: pins WXMIXIN and WXMIXDEC

Gm(conv) conversion

transconductance gain Io/V

i10 15 21 mA/V

∆Gm(conv)(T) conversion

transconductancegain

deviation over

temperature

Tamb =−40 °C to +85 °C;

see Figure 22 ---dB

Riinput resistance - 5.1 - kΩ

Ciinput capacitance - 2 4 pF

NF noise ﬁgure Rsource = 300 Ω- 3.5 5 dB

IP3 third-order intercept

point - 116 - dBµV

IRR image rejection ratio Vo(wanted) /V

o(image);

fRF(wanted) = 162.475 MHz;

fRF(image) = 183.875 MHz

20 33 - dB

IF AGC ampliﬁer

AM mode; inputs: pins AMIFAGCIN and IFAGCDEC[10]; outputs: pins IFOUT1 and IFOUT2[11]

Riinput resistance - 100 - kΩ

Ciinput capacitance - 5 7 pF

Rooutput resistance 120 210 290 Ω

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 37 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

G gain data byte CONTROL bit

IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 21.2 24.2 27.2 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 15.2 18.2 21.2 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 9.2 12.2 15.2 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 3.2 6.2 9.2 dB

data byte CONTROL bit

IFGAIN = 1

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 27.2 30.2 33.2 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 21.2 24.2 27.2 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 15.2 18.2 21.2 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 9.2 12.2 15.2 dB

NF noise ﬁgure Rsource = 300 Ω; data byte

CONTROL bit IFGAIN = 0;

VIFAGCMSB =LOW;

VIFAGCLSB =LOW

- 12.9 16 dB

∆IM3 third-order

intermodulation

distance

two output signals at 35 kHz

frequency distance; differential

output level of 200 mV; data

byte CONTROL bit IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 77 83 - dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 77 83 - dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 77 83 - dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 74 80 - dB

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 38 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Vi(max)(M) peak maximum input

voltage 1 dB compression point of

IFAGC ampliﬁer output

voltage; data byte CONTROL

bit IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 45 - - mV

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 90 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 180 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 360 - - mV

FM mode; inputs: pins FMIFAGCIN1 and IFAGCDEC[12]; outputs: pins IFOUT1 and IFOUT2[11]

Riinput resistance - 330 - Ω

Ciinput capacitance - 5 7 pF

Rooutput resistance 120 210 290 Ω

G gain data byte CONTROL bit

IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 28 31 34 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 22 25 28 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 16 19 22 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 10 13 16 dB

data byte CONTROL bit

IFGAIN = 1

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 34 37 40 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 28 31 34 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 22 25 28 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 16 19 22 dB

NF noise ﬁgure Rsource = 300 Ω; data byte

CONTROL bit IFGAIN = 0;

VIFAGCMSB =LOW;

VIFAGCLSB =LOW

- 6.9 8.5 dB

IP3 third-order intercept

point data byte CONTROL bit

IFGAIN = 0 110 115 - dBµV

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 39 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Vi(max)(M) peak maximum input

voltage 1 dB compression point of

IFAGC ampliﬁer output

voltage; data byte CONTROL

bit IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 20 - - mV

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 40 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 80 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 160 - - mV

FM mode; inputs: pins FMIFAGCIN2 and IFAGCDEC[13]; outputs: pins IFOUT1 and IFOUT2[11]

Riinput resistance - 330 - Ω

Ciinput capacitance - 5 7 pF

G gain data byte CONTROL bit

IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 28 31 34 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 22 25 28 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 16 19 22 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 10 13 16 dB

data byte CONTROL bit

IFGAIN = 1

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 34 37 40 dB

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 28 31 34 dB

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 22 25 28 dB

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 16 19 22 dB

NF noise ﬁgure Rsource = 300 Ω; data byte

CONTROL bit IFGAIN = 0;

VIFAGCMSB =LOW;

VIFAGCLSB =LOW

- 6.9 8.5 dB

IP3 third-order intercept

point data byte CONTROL bit

IFGAIN = 0 110 115 - dBµV

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 01 — 21 February 2007 40 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[1] Differential current on pins FREF1 and FREF2.

[2] The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.

[3] Conversion gain formula of DAA1: where n = 0 to 127.

[4] Conversion gain formula of DAA2: where n=0to15.

[5] The sink current must be limited to 18 mA by the external circuit.

[6] Input parameters of AM mixer measured between pins AMMIXIN and AMMIXDEC.

[7] Output parameters of AM mixer measured between pins AMMIXOUT1 and AMMIXOUT2.

[8] Input parameters of FM mixer measured between pins FMMIXIN1 and FMMIXIN2.

[9] Output parameters of FM mixer measured between pins FMMIXOUT1 and FMMIXOUT2.

[10] Input parameters of AM IF ampliﬁer measured between pins AMIFAGCIN and IFAGCDEC.

[11] Output parameters of IFAGC ampliﬁer measured between pins IFOUT1 and IFOUT2.

[12] Input parameters of FM IF ampliﬁer measured between pins FMIFAGCIN1 and IFAGCDEC.

[13] Input parameters of FM IF ampliﬁer measured between pins FMIFAGCIN2 and IFAGCDEC.

Vi(max)(M) peak maximum input

voltage 1 dB compression point of

IFAGC ampliﬁer output

voltage; data byte CONTROL

bit IFGAIN = 0

VIFAGCMSB =LOW;

VIFAGCLSB =LOW 20 - - mV

VIFAGCMSB =LOW;

VIFAGCLSB = HIGH 40 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB = HIGH 80 - - mV

VIFAGCMSB = HIGH;

VIFAGCLSB =LOW 160 - - mV

Digital inputs and outputs

Input: pins IFAGCMSB and IFAGCLSB

VIL LOW-level input

voltage - - 0.9 V

VIH HIGH-level input

voltage 1.5 - - V

Output: pin AFHOLD

Isink(max) maximum sink current AFHOLD = LOW; Vo= 0.4 V 1.0 - - mA

Output: pin AFSAMPLE

Isink(max) maximum sink current AFSAMPLE = LOW;

Vo= 0.4 V 1.0 - - mA

Output: pin SWPORT

Isink(max) maximum sink current data byte CONTROL bit

FLAG = 1; Vo= 0.4 V 1.0 - - mA

Table 36. Dynamic characteristics

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

VDAAOUT1 1.915 n

128

---------

×0.1+





Vtune

×=

VDAAOUT2 0.693 n

------

×0.7+





VDAAOUT1

×=

Product data sheet Rev. 01 — 21 February 2007 41 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

13. I2C-bus characteristics

The TEF6730AHW complies with the fast-mode I2C-bus protocol. The maximum I2C-bus

communication speed is 400 kbit/s.

SDA and SCL HIGH and LOW internal thresholds are speciﬁed according to an I2C-bus

voltage range from 2.5 V to 3.3 V including I2C-bus voltage tolerances of ±10 %. The

I2C-bus interface tolerates also SDA and SCL signals from a 5 V bus. Restrictions for VIL

in a 5 V application can be derived from Table 37.

Fig 19. AM LNA transconductance gain deviation over

temperature (including application) Fig 20. AM mixer conversion transconductance gain

deviation over temperature (including

application)

001aae090

Tamb (°C)

−40 10080040

−1

∆Gm(T)

(dB)

−2

001aae091

Tamb (°C)

−40 10080040

−0.5

0.5

1.0

−1.0

∆Gm(conv)(T)

(dB)

Fig 21. FM mixer conversion transconductance gain

deviation over temperature (including

application)

Fig 22. Weather band mixer conversion

transconductance gain deviation over

temperature (including application)

001aae092

Tamb (°C)

−40 10080040

−0.5

−1.0

0.5

−1.5

∆Gm(conv)(T)

(dB)

001aae093

Tamb (°C)

−40 10080040

−5

−10

∆Gm(conv)(T)

(dB)

Product data sheet Rev. 01 — 21 February 2007 42 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[1] Minimum value of tof; Cb = total capacitance of one I2C-bus line [pF].

[2] Typical value of tof; the output fall time tof [ns] depends on the total load capacitance Cb [pF] and the I2C-bus voltage VDD [V]:

tof =1⁄12 ×VDD ×Cb.

Table 37. I2C-bus parameters

Symbol Parameter Conditions Min Typ Max Unit

VIL LOW-level input

voltage - - 1.09 V

VIH HIGH-level input

voltage 1.56 - - V

Cicapacitance for each

I/O pin pin SDA - 4 6 pF

pin SCL - 3 5 pF

tresp(Q)HL HIGH-to-LOW data

output response time acknowledge and read data;

see Figure 23

VDD =5V; I=3mA;

Cb= 400 pF - 700 863 ns

VDD = 3.3 V; Rp= 1.8 kΩ;

Cb= 400 pF - 570 668 ns

VDD = 2.5 V; Rp=35kΩ;

Cb=10pF - 520 593 ns

tresp(Q)LH LOW-to-HIGH data

output response time read data; see Figure 23 - 450 488 ns

tof output fall time from

VIHmin to VILmax

Cb= 10 pF to 120 pF;

see Figure 24 [1] 20 + 0.1Cb10 ×VDD -ns

Cb≥120 pF; see Figure 24 [1][2] 20 + 0.1Cb- 250 ns

a. Data change from LOW to HIGH b. Data change from HIGH to LOW

Fig 23. Data output response time of the IC

001aaf002

SDA

SCL VIL(max)

tresp(Q)LH

001aaf001

VIL(max)

0.7VDD

tresp(Q)HL

Product data sheet Rev. 01 — 21 February 2007 43 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

14. Overall system parameters

Fig 24. Deﬁnition of the fall time of the output signal

001aab803

VDD

0.7VDD

0.3VDD

tof

Table 38. Overall system parameters

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

AM overall system parameters[1]

fi(RF) RF input frequency LW 144 - 288 kHz

MW 522 - 1710 kHz

SW 2.3 - 26.1 MHz

fIF IF frequency - 10.7 - MHz

Vsens sensitivity voltage (S+N)/N = 26 dB - 50 - µV

Vi(RF) RF input voltage start level of wideband AGC

data byte AGC bits WBAGC[1:0] = 00 - 125 - mV

data byte AGC bits WBAGC[1:0] = 01 - 100 - mV

data byte AGC bits WBAGC[1:0] = 10 - 75 - mV

data byte AGC bits WBAGC[1:0] = 11 - 35 - mV

Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0

data byte AGC bits NBAGC[1:0] = 00 - 200 - mV

data byte AGC bits NBAGC[1:0] = 01 - 170 - mV

data byte AGC bits NBAGC[1:0] = 10 - 140 - mV

data byte AGC bits NBAGC[1:0] = 11 - 115 - mV

IP2 second-order intercept point referenced to receiver input - 152 - dBµV

IP3 third-order intercept point referenced to receiver input

∆f = 40 kHz - 130 - dBµV

∆f = 100 kHz - 133 - dBµV

αripple ripple rejection VCC(ripple) /V

audio;f

ripple = 100 Hz;

VCC(ripple) = 10 mV (RMS);

Vi(RF) =1mVto1V

-40- dB

FM overall system parameters[2]

fi(RF) RF input frequency FM standard 65 - 108 MHz

weather band 162.4 - 162.55 MHz

fIF IF frequency - 10.7 - MHz

Product data sheet Rev. 01 — 21 February 2007 44 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

[1] Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3

and nominal maximum IFAGC gain, unless otherwise speciﬁed.

[2] Based on 75 Ω dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 µs, fi(RF) = 97.1 MHz, ∆f = 22.5 kHz,

nominal mixer gain and nominal maximum IFAGC gain, unless otherwise speciﬁed.

Vsens sensitivity voltage BIF = 170 kHz - 2 - µV

threshold extension enabled; weak signal

handling enabled (SAF7730 N231) - 1.1 - µV

Vi(RF) RF input voltage start level of wideband AGC

data byte AGC bits WBAGC[1:0] = 00 - 19 - mV

data byte AGC bits WBAGC[1:0] = 01 - 14 - mV

data byte AGC bits WBAGC[1:0] = 10 - 10 - mV

data byte AGC bits WBAGC[1:0] = 11 - 7 - mV

Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0

data byte AGC bits NBAGC[1:0] = 00 - 17 - mV

data byte AGC bits NBAGC[1:0] = 01 - 14 - mV

data byte AGC bits NBAGC[1:0] = 10 - 11 - mV

data byte AGC bits NBAGC[1:0] = 11 - 9 - mV

IP3 third-order intercept point ∆f = 400 kHz - 123 - dBµV

αripple ripple rejection VCC(ripple) /V

audio;f

ripple = 100 Hz;

VCC(ripple) = 10 mV (RMS); Vi(RF) = 500 µV-64- dB

Table 38. Overall system parameters

…continued

CCA

= 8.5 V; T

amb

=25

C; see Figure 25; all AC values are given in RMS; unless otherwise speciﬁed.

Symbol Parameter Conditions Min Typ Max Unit

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx

xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx

xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

Product data sheet Rev. 01 — 21 February 2007 45 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

15. Application information

For list of components see Table 39.

Fig 25. Application diagram of TEF6730AHW

008aaa059

100 nF

270 pF

BB208

BB207

50 nH

100

3.9

4.7 pF

3.3 nF

100 nF

10 pF

1 nF

22 nF

10.7 MHz

1 µF

100 nF

100

µF

220 nF

1 nF

100 nF

120 pF

18 pF

220

BAP70-02

BAP70AM

6.8 µH

10 kΩ

2.2 kΩ

1.2 kΩ

22 kΩ

470 kΩ

82 Ω

2.2 kΩ

1 nF

100

330 Ω

2.2 MΩ

430

Ω

10 kΩ

470 kΩ

560

Ω

6.8 pF

3.3 µH

22 nF

47 µF

100 nF

6.8 pF

4.7 kΩ

Ω

470 nH

390

µH

680

µH

220 nH

47 mH

ifagc

lna rf lnarf

626364123457810 9111213141517192021222324253134

KEYED

AGC

40 37 38 41 53 54 55 56 57 45 52 16, 18, 48, 49

47 address

selection

antenna DAA

TEF6730AHW

AM RF

AGC

FM RF

AGC

BAND

÷M

REF

fref

PLL

÷N

IF AGC

AM LNA

IFOUT1

am/fm

rf agc

IFOUT2

IFAGCMSB

IFAGCLSB

SDA

AFSAMPLE

AFHOLD

SCL

VCO VCO

FREF

sup sup

+8.5 V

fgnd dig i.c.

flag

pll

90°

1.8 nF

1 nF

10 nF

47 µH

1 nF

TUNING

STATE

MACHINE

I2C-BUS

tuner

control

CTRL BUF

read

address

pll in-lock

write

MIXER

Product data sheet Rev. 01 — 21 February 2007 46 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 26. Weather band application

Table 39. List of components for Figure 25 and Figure 26

Symbol Component Type Manufacturer

C1 capacitor for VCO tuning 270 pF; type NP0 -

L1 VCO coil 50 nH; E558CNA-100035 TOKO

L2 FM input coil 100 nH; C2520C-R10 SAGAMI

L3 FM antenna coil 470 nH; C2520C-R47 SAGAMI

L4 FM antenna coil 220 nH; C2520C-R22 SAGAMI

L5 AM mains suppression coil 47 mH; 388BN-1211Z TOKO

L6 10.7 MHz IF coil PF670CCS-A065DX TOKO

L7 weather band input coil 47 nH; LQW31H muRata

D1 VCO variable capacitance diode BB208 NXP Semiconductors

D2 FM RF selectivity variable

capacitance diode BB207 NXP Semiconductors

D3 FM PIN diode BAP70-02 NXP Semiconductors

D4 FM PIN diode BAP70-02 NXP Semiconductors

D5 AM PIN diode BAP70AM NXP Semiconductors

F1 10.7 MHz IF ceramic ﬁlter SFELA10M7HAA0-B0 muRata

Fig 27. FM and AM mode

008aaa060

10 pF

12 pF

47 nH

28RF input

TEF6730AHW

008aaa061

22 nF

330 Ω

1011 98765 4 3 2 1 64

TEF6730AHW IF AGC

Product data sheet Rev. 01 — 21 February 2007 47 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

Fig 28. FM/AM and FM HD mode

Fig 29. FM and AM (narrow band) mode

008aaa062

nF 22

22 nF

330 Ω

1011 98765 4 3 2 1 64

TEF6730AHW IF AGC

FM HD

FM/AM

008aaa063

nF 22 nF

22 nF

330 Ω

1011 98765 4 3 2 1 64

TEF6730AHW IF AGC

Product data sheet Rev. 01 — 21 February 2007 48 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

16. Test information

Fig 30. FM, AM, AM HD and FM HD mode

008aaa064

nF 22

22 nF

330 Ω

1011 98765 4 3 2 1 64

TEF6730AHW IF AGC

FM HD

AM and AM HD

Table 40. DC operating points

Symbol Pin Unloaded DC voltage (V)

AM mode FM mode

Min Typ Max Min Typ Max

AMIFAGCIN 1 - 2.3 - - 2.3 -

FMIFAGCIN1 2 - 2.3 - - 2.3 -

FMIFAGCIN2 3 - 2.3 - - 2.3 -

IFAGCDEC 4 - 2.3 - - 2.3 -

SWDEC 5 - 1.4 - - 1.4 -

CFSW1 6 - 1.4 - - 1.4 -

CFSW2 7 - 1.4 - - 1.4 -

FMMIXOUT1 8 external 8.5 external 8.5

AMMIXOUT2 9 external 8.5 external 8.5

FMMIXOUT2 10 external 8.5 external 8.5

AMMIXOUT1 11 external 8.5 external 8.5

VCC(RF) 12 external 8.5 external 8.5

V50LNA 13 - 5.2 - - 0.9 -

Product data sheet Rev. 01 — 21 February 2007 49 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

LNAIN 14 - 1.9 - - 0.1 -

AGCCNTRL 15 - 4.7 - - 0.9 -

i.c. 16 - - - - - -

LNAOUT 17 - 0 - - 0 -

i.c. 18 - - - - - -

LNAAGCDEC 19 - 5.2 - - 0.8 -

AMMIXDEC 20 - 3.9 - ﬂoating

AMMIXIN 21 - 3.9 - ﬂoating

TAMAGC 22 - 1.4 - ﬂoating

PINAGCDEC 23 - 1.1 - - 1.1 -

IAMAGC 24 external biasing external biasing

RFGND 25 external GND external GND

FMMIXIN1 26 - 0 - FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0

FMMIXIN2 27 - 0 - FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0

WXMIXIN 28 - 0 - WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0

WXMIXDEC 29 - 0 - WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0

IFMAGC 30 - 0 - external biasing

TFMAGC 31 - 0.8 - - 0.8 -

DAAOUT1 32 0.5 - VCC(PLL) −0.6 0.5 - VCC(PLL) −0.6

DAAOUT2 33 0.5 - VCC(PLL) −0.7 0.5 - VCC(PLL) −0.7

KAGC 34 - 6.6 - - 6.5 -

VTUNE 35 0 - 8.5 0 - 8.5

CPOUT 36 0 - 8.5 0 - 8.5

VCC(PLL) 37 external 8.5 external 8.5

VCOGND 38 external GND external GND

OSCFDB 39 - 5.8 - - 5.8 -

OSCTNK 40 - 5.8 - - 5.8 -

VCC(VCO) 41 external 8.5 external 8.5

SWPORT 42 external external

AFSAMPLE 43 - 0 - - 0 -

AFHOLD 44 - 5 - - 5 -

FGND 45 external GND external GND

ADDR2 46 external 8.5 or external GND external 8.5 or external GND

ADDR1 47 external 8.5 or external GND external 8.5 or external GND

i.c. 48 - - - - - -

i.c. 49 - - - - - -

SDA 50 external I2C-bus voltage external I2C-bus voltage

SCL 51 external I2C-bus voltage external I2C-bus voltage

DGND 52 external GND external GND

Table 40. DC operating points

…continued

Symbol Pin Unloaded DC voltage (V)

AM mode FM mode

Min Typ Max Min Typ Max

Product data sheet Rev. 01 — 21 February 2007 50 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

FREF1 53 - 1.2 - - 1.2 -

FREF2 54 - 1.2 - - 1.2 -

VREF 55 4.1 4.3 4.5 4.1 4.3 4.5

GND 56 external GND external GND

VCC 57 external 8.5 external 8.5

IFOUT1 58 - 5.5 - - 5.5 -

IFOUT2 59 - 5.5 - - 5.5 -

IFAGCMSB 60 external 0 or external 3.3 external 0 or external 3.3

IFAGCLSB 61 external 0 or external 3.3 external 0 or external 3.3

VCC(IF) 62 external 8.5 external 8.5

IFGND 63 external GND external GND

IFAGCBIAS 64 - 2.3 - - 2.3 -

Table 40. DC operating points

…continued

Symbol Pin Unloaded DC voltage (V)

AM mode FM mode

Min Typ Max Min Typ Max

Product data sheet Rev. 01 — 21 February 2007 51 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

17. Package outline

Fig 31. Package outline SOT855-1 (HTQFP64)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT855-1 MS-026

SOT855-1

04-05-18

05-05-11

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included

DIMENSIONS (mm are the original dimensions)

HTQFP64: plastic thermal enhanced thin quad flat package; 64 leads; body 10 x 10 x 1 mm; exposed die pad

0 5 10 mm

scale

64 17

49 32

116

48 33

EHE

UNIT A

max

mm 1.2 0.12

0.05 1.05

0.95 0.27

0.17 0.18

0.12 10.1

9.9 10.1

9.9 12.15

11.85 12.15

11.85 0.75

0.45 1.45

1.05 1.45

1.05

A1A2A3

0.25

bpc D(1) E(1) e

0.5

4.7

4.5

4.7

4.5

EhHEL

Lpv

0.2

0.08

0.1

ZD(1) ZE(1) θ

7°

0°

exposed die pad

detail X L

(A3)

pin 1

index

Product data sheet Rev. 01 — 21 February 2007 52 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

18. Soldering

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note

AN10365 “Surface mount reﬂow

soldering description”

18.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is often preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not

suitable for ﬁne pitch SMDs. Reﬂow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

18.2 Wave and reﬂow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

•Through-hole components

•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reﬂow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature proﬁle. Leaded packages,

packages with solder balls, and leadless packages are all reﬂow solderable.

Key characteristics in both wave and reﬂow soldering are:

•Board speciﬁcations, including the board ﬁnish, solder masks and vias

•Package footprints, including solder thieves and orientation

•The moisture sensitivity level of the packages

•Package placement

•Inspection and repair

•Lead-free soldering versus PbSn soldering

18.3 Wave soldering

Key characteristics in wave soldering are:

•Process issues, such as application of adhesive and ﬂux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

•Solder bath speciﬁcations, including temperature and impurities

Product data sheet Rev. 01 — 21 February 2007 53 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

18.4 Reﬂow soldering

Key characteristics in reﬂow soldering are:

•Lead-free versus SnPb soldering; note that a lead-free reﬂow process usually leads to

higher minimum peak temperatures (see Figure 32) than a PbSn process, thus

reducing the process window

•Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

•Reﬂow temperature proﬁle; this proﬁle includes preheat, reﬂow (in which the board is

heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classiﬁed in accordance with

Table 41 and 42

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reﬂow

soldering, see Figure 32.

Table 41. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Package reﬂow temperature (°C)

Volume (mm3)

< 350 ≥ 350

< 2.5 235 220

≥ 2.5 220 220

Table 42. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reﬂow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 260 250 245

> 2.5 250 245 245

Product data sheet Rev. 01 — 21 February 2007 54 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

For further information on temperature proﬁles, refer to Application Note

AN10365

“Surface mount reﬂow soldering description”

MSL: Moisture Sensitivity Level

Fig 32. Temperature proﬁles for large and small components

001aac844

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Product data sheet Rev. 01 — 21 February 2007 55 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

19. Footprint for soldering

Fig 33. Footprint

0.500

0.285

(56 ×)

0.1425

(8 ×)

0.400

(3 ×)

0.400 (3 ×)

7.900 (4 ×)

10.250 (2 ×)

12.400 (2 ×)

13.650 (2 ×)

12.200 (2 ×)

10.400 (4 ×)

9.035 (4 ×)

4.700

(2 ×)

4.800

(2 ×)

solder land

solder paste deposit

solder land plus solder paste

placement area

occupied area

0.285

(8 ×)

SOT855-1Dimensions in mm

Product data sheet Rev. 01 — 21 February 2007 56 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

20. Abbreviations

21. Revision history

Table 43. Abbreviations

Acronym Description

ADC Analog-to-Digital Converter

AF Alternative Frequency

AFU Alternative Frequency Updating

AGC Automatic Gain Control

DAA Digital Auto Alignment

DSP Digital Signal Processor

DX Distance

HD High Deﬁnition

IF Intermediate Frequency

LNA Low Noise Ampliﬁer

LO Local Oscillator

LSB Least Signiﬁcant Bit

LW Long Wave

MSB Most Signiﬁcant Bit

MW Medium Wave

PIN Positive Intrinsic Negative

PLL Phase-Locked Loop

RF Radio Frequency

SCL Serial Clock

SDA Serial Data

SW Short Wave

VCO Voltage-Controlled Oscillator

WB Weather Band

Table 44. Revision history

Document ID Release date Data sheet status Change notice Supersedes

TEF6730A_1 20070221 Product data sheet - -

Product data sheet Rev. 01 — 21 February 2007 57 of 58

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

22. Legal information

22.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

22.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

22.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of a NXP Semiconductors product can reasonably be expected to

result in personal injury, death or severe property or environmental damage.

NXP Semiconductors accepts no liability for inclusion and/or use of NXP

Semiconductors products in such equipment or applications and therefore

such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

22.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

I2C-bus — logo is a trademark of NXP B.V.

23. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors TEF6730A

Front-end for digital-IF car radio

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 21 February 2007

Document identifier: TEF6730A_1

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

24. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 4

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 6

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6

7 Functional description . . . . . . . . . . . . . . . . . . . 8

7.1 FM mixer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

7.2 FM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

7.3 Antenna DAA1 and DAA2. . . . . . . . . . . . . . . . . 8

7.4 AM LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.5 AM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.6 AM mixer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.7 VCO and dividers . . . . . . . . . . . . . . . . . . . . . . . 9

7.8 Tuning PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.9 AM/FM IF AGC ampliﬁer. . . . . . . . . . . . . . . . . . 9

2C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . . . 9

8.1 Read mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

8.1.1 Read mode: data byte TUNER. . . . . . . . . . . . 10

8.1.2 Read mode: data byte ID . . . . . . . . . . . . . . . . 11

8.2 Write mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 11

8.2.1 Mode and subaddress byte for write. . . . . . . . 16

8.2.2 Write mode: data byte CONTROL . . . . . . . . . 22

8.2.3 Write mode: data byte PLLM . . . . . . . . . . . . . 23

8.2.4 Write mode: data byte PLLL. . . . . . . . . . . . . . 23

8.2.5 Write mode: data byte DAA . . . . . . . . . . . . . . 23

8.2.6 Write mode: data byte AGC . . . . . . . . . . . . . . 24

8.2.7 Write mode: data byte BAND . . . . . . . . . . . . . 25

8.2.7.1 Tuning overview . . . . . . . . . . . . . . . . . . . . . . . 26

8.2.8 Write mode: data byte TEST . . . . . . . . . . . . . 26

9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 27

10 Thermal characteristics. . . . . . . . . . . . . . . . . . 27

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 28

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 29

13 I2C-bus characteristics . . . . . . . . . . . . . . . . . . 41

14 Overall system parameters. . . . . . . . . . . . . . . 43

15 Application information. . . . . . . . . . . . . . . . . . 45

16 Test information. . . . . . . . . . . . . . . . . . . . . . . . 48

17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 51

18 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

18.1 Introduction to soldering . . . . . . . . . . . . . . . . . 52

18.2 Wave and reﬂow soldering . . . . . . . . . . . . . . . 52

18.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 52

18.4 Reﬂow soldering. . . . . . . . . . . . . . . . . . . . . . . 53

19 Footprint for soldering . . . . . . . . . . . . . . . . . . 55

20 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 56

21 Revision history . . . . . . . . . . . . . . . . . . . . . . . 56

22 Legal information . . . . . . . . . . . . . . . . . . . . . . 57

22.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 57

22.2 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

22.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 57

22.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 57

23 Contact information . . . . . . . . . . . . . . . . . . . . 57

24 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58