FUJITSU SEMICONDUCTOR DATA SHEET DS04-27708-2E ASSP for Power Supply Application (for secondary battery) DC/DC Converter IC for Parallel Charging of 3/4 cell Li-ion & NiMH Batteries MB3879 DESCRIPTION The MB3879 is a DC/DC converter IC for parallel charging of 3/4 cell Li-ion & NiMH batteries, which uses the pulse-width modulation (PWM) for controlling output voltages and output currents independently. This IC can dynamically control secondary batterie's charge current, which detects voltage dropping in an AC adapter in order to keep its power constant (Dynamically controlled charging). This operation allows quick charging by variable charging current in accordance with operating status of a notebook PC. Moreover, the total current of the system current and control IC input current are detected, and control of the secondary battery is enabled. An efficient charge becomes possible because of the charge current comes in changeability according to the operation state of notebook PC by this operation. The IC also allows parallel charging that charges two batteries simultaneously, reducing charging time dramatically. The IC, using a built-in output voltage setting resistor, allows high-precision setting of output voltages. With its output-voltage switching function that is ready for both graphite-type and coke-type Li-ion batteries as well as NiMH battery, the IC is best suited to a built-in charger of a notebook PC. This product is covered by US Patent Number 6,147,477. FEATURES * Detecting a voltage dropping in the AC adapter, and dynamically controlling the charge current (Dynamicallycontrolled charging) * Detecting total current of system current and control-IC input current (Differential-charging) (Continued) PACKAGE 48-pin plastic LQFP (FPT-48P-M05) MB3879 (Continued) * Selection of output voltages by 4-bit decoder: 12.3V (3 cells: 4.1V), 12.6V (3 cells: 4.2V), 16.4V (4 cells: 4.1V), 16.8V (4 cells: 4.2V) * High efficiency: 94% (using reverse current preventive diode) * Wide range of power supply voltage: 8 V to 25 V * Setting precision of output voltage (built-in output voltage setting resistor): 0.8% (Ta = +25 C) * Setting precision of charge current: 5% * Setting of frequency for only external capacitor, using built-in frequency setting resistor. * Oscillation frequency range: 100 kHz to 500 kHz * Built-in current detect amplifier with wide range of in-phase input voltages: 0 V to Vcc * Stand-by current: 0 A * Built-in load-independent soft-start circuit * Built-in charge mode detection function * Built-in totem-pole outputs supporting Pch MOS FET 2 MB3879 PIN ASSIGNMENT +INC1 -INC1 FB1 OUTC1 -INE1 +INE1 FB2 -INE2 +INE2 DTC GND CT 48 47 46 45 44 43 42 41 40 39 38 37 (TOP VIEW) CTL 7 30 FB5 VDD 8 29 -INE5 VB 9 28 TEST OUT-EV 10 27 GNDO OUT-EC 11 26 VH OUT-EA2 12 25 VCCO 24 +INE4 OUT 31 23 6 CS1 VSS 22 -INE4 CS2 32 21 5 -INE6 D3 20 OUTC3 FB6 33 19 4 +INE3 D2 18 FB4 -INE3 34 17 3 OUTC2 D1 16 +INC3 FB3 35 15 2 +INC2 D0 14 IN2 IN1 36 13 1 OUT-EA1 VCC (FPT-48P- 05) 3 MB3879 PIN DESCRIPTION Pin No. Symbol I/O 1 VCC 2 D0 I VDD logic input terminal 3 D1 I VDD logic input terminal 4 D2 I VDD logic input terminal 5 D3 I VDD logic input terminal 6 VSS 7 CTL I 8 VDD VDD logic power supply terminal 9 VB O Reference voltage output terminal O Constant-voltage charging distinction signal output terminal H level: Dynamically-controlled charging, Differential charging, or Constant-voltage charging mode L level: BATT1 or BATT2 Constant-voltage charging mode O Constant-current charge distinction signal output terminal H level: Dynamically-controlled charging, Differential charging, or Constant-voltage charging mode L level: BATT1 or BATT2 Constant-current charging mode O Differential-charging distinction signal output terminal H level: Dynamically-controlled-charging, Constant-voltaging, or Constant-current charging mode L level: Differential-charging mode 10 11 12 OUT-EV OUT-EC OUT-EA2 Descriptions Power supply terminal VDD logic ground terminal Power supply control terminal. Setting "L" level on CTL terminal places the IC in standby mode. 13 OUT-EA1 O Dynamically-controlled charging distinction signal output terminal H level: Dynamically-controlled charging, Constant-voltage charging, or Constant-current charging mode L level: Dynamically-controlled charging mode 14 IN1 I <BATT1> Current detection amplifier (Current Amp2) input terminal Output voltage feedback input terminal 15 +INC2 I <BATT1> Current detection amplifier (Current Amp2) input terminal 16 FB3 O <BATT1> Error amplifier (Error Amp3) output terminal 17 OUTC2 O <BATT1> Current detection amplifier (Current Amp2) output terminal 18 -INE3 I <BATT1> Error amplifier (Error Amp3) inverted input terminal 19 +INE3 I <BATT1> Error amplifier (Error Amp3) non-inverted input terminal 20 FB6 O <BATT1> Error amplifier (Error Amp6) output terminal 21 -INE6 I <BATT1> Error amplifier (Error Amp6) inverted input terminal 22 CS2 Soft-start capacitor connection terminal 23 CS1 Soft-start capacitor connection terminal 24 OUT O External FET gate driving terminal 25 VCCO Driver block power supply terminal (Continued) 4 MB3879 (Continued) Pin No. Symbol I/O Descriptions 26 VH O FET driver circuit power supply terminal (VH = VCC-6V) 27 GND0 Ground terminal 28 TEST O Internal reference voltage for setting charge voltage 29 -INE5 I <BATT2> Error amplifier (Error Amp5) inverted input terminal 30 FB5 O <BATT2> Error amplifier (Error Amp5) output terminal 31 +INE4 I <BATT2> Error amplifier (Error Amp4) non-inverted input terminal 32 -INE4 I <BATT2> Error amplifier (Error Amp4) inverted input terminal 33 OUTC3 O <BATT2> Current detection amplifier (Current Amp3) output terminal 34 FB4 O <BATT2> Error amplifier (Error Amp4) output terminal 35 +INC3 I <BATT2> Current detection amplifier (Current Amp3) input terminal 36 IN2 I <BATT2> Current detection amplifier (Current Amp3) input terminal Output voltage feedback input terminal 37 CT Triangular wave oscillation frequency setting capacitor connection terminal 38 GND Ground terminal 39 DTC I External duty control input terminal 40 +INE2 I Error amplifier (Error Amp2) non-inverted input terminal 41 -INE2 I Error amplifier (Error Amp2) inverted input terminal 42 FB2 O Error amplifier (Error Amp2) output terminal 43 +INE1 I Error amplifier (Error Amp1) non-inverted input terminal 44 -INE1 I Error amplifier (Error Amp1) inverted input terminal 45 OUTC1 O Current detection amplifier (Current Amp2) output terminal 46 FB1 O Error amplifier (Error Amp1) output terminal 47 -INC1 I Current detection amplifier (Current Amp1) input terminal 48 +INC1 I Current detection amplifier (Current Amp1) input terminal 5 MB3879 BLOCK DIAGRAM VCC 1 48 -INC1 47 +INE1 43 45 <Current + Amp1> x25 - + <Error Amp1> <VDD> - - + 13 OUT-EA1 12 OUT-EA2 11 OUT-EC 10 OUT-EV 25 VCCO 24 OUT <MODE Comp.2> + 46 42 <Error Amp2> -INE2 41 - +INE2 40 + - <MODE Comp.3> + - <<Dynamically-Contorl>> DTC -INE3 OUTC2 +INC2 39 IN1 +INE3 FB3 -INE4 OUTC3 +INC3 14 IN2 36 +INE4 31 FB4 34 CS1 <MODE Comp.1> <<Differencial-Control>> 18 <MODE Comp.4> <<Current-Contorl>> 17 <Current + Amp2> x25 - 15 + <Error Amp3> - - + + 19 16 32 <Current + Amp3> x25 - 35 <Error Amp4> - + + <PWM Comp> FB Voltage Selector 33 26 bias (VCC - 6 V) Voltage <VH> 27 R1 22.4 k R1 <<Voltage-Contorl>> 22.4 k <Error Amp5> 29 FB5 30 Drive VCC <SOFT1> VB 23 -INE5 <OUT> + + + - - + + R2 <UVLO> FB Voltage Selector FB1 FB2 44 FB Voltage Selector -INE OUTC1 +INC1 VH GNDO VCC UVLO VB UVLO R2 <Error Amp6> -INE6 21 3V R3 8.4 k R3 8.4 k FB6 - + + 2.8 k 2.8 k 2V 20 <SOFT2> VB CS2 22 (4.2 V) D0 D1 D2 D3 2 3 4 <REF> 5 6 VSS 6 <Decoder> 8 <Larch> VDD (4.1 V) <OSC> <VB> bias (5 V) 37 28 CT TEST <VR> 9 38 VB GND <CTL> 7 CTL MB3879 ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Symbol VCC Conditions VCC and VCCO terminal VDD Rating Unit Min Max 28 V 17 V Output current IO OUT terminal 60 mA Peak output current IOP OUT terminal Duty 5% (t = 1/foscxDuty) 700 mA Power dissipation PD Ta + 25 C 860* mW -55 + 125 C Storage temperature Tstg * : The package is mounted on the dual-sided epoxy board (10 cmx10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 7 MB3879 RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Symbol VCC Conditions VCC and VCCO terminals VDD Value Unit Min Typ Max 8 19 25 V 2.7 5 7 V Reference voltage output current IB VB terminal -1 0 mA VH terminal output current IH VH terminal 0 30 mA VINE -INE1 to -INE6, +INE1 to +INE4 terminal 0 VCC-1.8 V VINC +INC1 to +INC3, -INC1 terminal 0 VCC V VINC IN1 and IN2 terminals 0 VCC V VDTC DTC terminal 0 VCC-0.9 V Output current IO OUT terminal -45 +45 mA Peak output current IOP Duty 5% (t = 1/foscxDuty) OUT terminal -600 +600 mA Input voltage CTL terminal input voltage VCTL CTL terminal 0 25 V Decoder block input voltage VDEC D0 to D3 terminals 0 VDD V Oscillation frequency fOSC 100 300 500 kHz Timing capacitor CT 47 100 330 pF Soft-start capacitor CS 0.022 1.0 F VH terminal capacitor CH 0.1 1.0 F CREF 0.1 1.0 F Ta -30 +25 +85 C Reference voltage output capacitor Operating ambient temperature WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 8 MB3879 ELECTRIC CHARACTERISTICS Parameter 1.Reference voltage block [REF] VTEST1 28 Charge mode = Li4C42, 4.167 4.200 4.233 Ta = +25 C V VTEST2 28 Charge mode = Li4C42, 4.158 4.200 4.242 Ta = -30 C to +85 C V VTEST3 28 Charge mode = Li4C41, 4.063 4.100 4.137 Ta = +25 C V VTEST4 28 Charge mode = Li4C42, 4.050 4.100 4.150 Ta = -30 C to +85 C V VB1 9 Ta = +25 C 4.95 5.00 5.05 V VB2 9 Ta = -30 C to +85 C 4.94 5.00 5.06 V Input stability Line 9 VCC = VCCO = 8 V to 25 V 3 10 mV Load stability Load 9 VB = 0 mA to -1 mA 1 10 mV los 9 VB = 1 V -25 -15 -5 mA VTLH 1 VCC = VCCO = 6.0 6.2 6.4 V VTHL 1 VCC = VCCO = 5.0 5.2 5.4 V Output voltage Output voltage 2.Control circuit bias voltage block [VB] short-circuit output current Threshold voltage 3. Under voltage lockout Hysteresis width protection circuit block Threshold voltage [UVLO] 4. Soft-start block [SOFT1, SOFT2] (VCC = VCCO = 19 V, VDD = 5 V, Charge mode = Li4C42, Ta = +25 C) Value Symbol Pin No. Conditions Unit Min Typ Max 1* V VB = 2.5 2.7 2.9 V VB = 2.3 2.5 2.7 V 0.2*1 V -14 -10 -6 A 240 300 360 kHz Ta = -10 C to +85 C 5*1 % Ta = -30 C to +85 C 10*1 % VH 1 VTLH 9 VTHL 9 Hysteresis width VH 9 Charge current ICS 22, 23 Oscillation frequency fOSC 24 CT = 100 pF f/fdt 24 f/fdt 24 5. Triangular Frequency oscillator block temperature stability [OSC] Frequency temperature stability 1 *1 : Standard design value (Continued) 9 MB3879 Parameter (VCC = VCCO = 19 V, VDD = 5 V, Charge mode = Li4C42, Ta = +25 C) Value Symbol Pin No. Conditions Unit Min Typ Max VIO 18, 19, 31, 32, 40, 41, 43, 44 Error Amp1 to Error Amp4 FB1 to FB4 = 2.5 V 1 5 mV IB 18, 19, 31, 32, 40, 41, 43, 44 -INE1 = +INE1 = -INE2 = +INE2 = -INE3 = +INE3 = -INE4 = +INE4 = 0 V -100 -30 nA Common mode input voltage range VCM 16, 34, 42, 46 Error Amp1 to Error Amp2 0 VCC- 1.8 V Voltage gain AV 16, 34, 42, 46 DC 100*1 dB Frequency band width BW 16, 34, 42, 46 AV = 0 dB 2*1 MHz VOH 16, 20, 30, 34, 42, 46 FB1 to FB6 = -1 mA 4.5 4.7 V VOL 16, 20, 30, 34, 42, 46 FB1 to FB6 = 1 mA 1.0 1.2 V ISOURCE 16, 20, 30, 34, 42, 46 FB1 to FB6 = 2.5 V -9 -4.5 mA lSINK 16, 20, 30, 34, 42, 46 FB1 to FB6 = 2.5 V 4.5 9.0 mA 20, 30 FB5 = FB6 = 2.5 V, Ta = +25 C VTH*2x VTHx VTHx Charge mode = Li4C42, 0.992 1.000 1.008 Li3C42 V 20, 30 FB5 = FB6 = 2.5 V, Ta = -30 C to +85 C VTH*2x VTHx VTHx Charge mode = Li4C42, 0.990 1.000 1.010 Li3C42 V 20, 30 FB5 = FB6 = 2.5 V, Ta = +25 C VTH*3x VTHx VTHx Charge mode = Li4C41, 0.991 1.000 1.009 Li3C41 V 20, 30 FB5 = FB6 = 2.5 V, Ta = -30 C to +85 C VTH*3x VTHx VTHx Charge mode = Li4C41, 0.989 1.000 1.011 Li3C41 V Input offset voltage Input bias current Output voltage 6. Error amplifier block [Error Amp1 to Output source current Error Amp6] Output sink current VTH1 VTH2 Threshold voltage VH3 VTH4 *1 : Standard design value *2 : 16.8 V (Li4C42) , 12.6 V (Li3C42) *3 : 16.4 V (Li4C41) , 12.3 V (Li3C41) 10 (Continued) MB3879 Parameter Input current 6. Error amplifier block [Error Amp1 to Error Amp6] (VCC = VCCO = 19 V, VDD = 5 V, Charge mode = Li4C42, Ta = +25 C) Value Symbol Pin No. Conditions Unit Min Typ Max IINEH1 14, 36 IN1 = IN2 = 16.8 V Charge mode = Li4C42 500 750 A IINEH2 14, 36 IN1 = IN2 = 16.4 V Charge mode = Li4C41 488 730 A IINL 14, 36 VCC = VCCO = 0 V, IN1 = IN2 = 16.9 V 0 1 A Ra 14, 36 R1+R2 IN1 = IN2 = 16.8 V Charge mode = Li4C42 17.6 25.2 32.8 k Rb 21, 29 R3 IN1 = IN2 = 16.8 V Charge mode = Li4C42 5.9 8.4 10.9 k Rc 14, 36 R1 IN1 = IN2 = 12.6 V Charge mode = Li3C42 15.7 22.4 29.1 k Rd 21, 29 R2+R3 IN1 = IN2 = 12.6 V Charge mode = Li3C42 7.8 11.2 14.6 k I+INCH 15, 35, 48 +INC1 to +INC3 = 3 V to VCC, Vin = -100 mV 20 30 A I-INCH 47 +INC1 = 3 V to VCC, Vin = -100 mV 0.1 0.2 A I+INCL 15, 35, 48 +INC1 to +INC3 =0V Vin = -100 mV -180 -120 A I-INCL 47 +INC1 = 0 V Vin = -100 mV -195 -130 A VOUTC1 17, 33, 45 +INC1 to +INC3 = 3 V to VCC, Vin = -100 mV 2.375 2.500 2.625 V VOUTC2 17, 33, 45 +INC1 to +INC3 = 3 V to VCC, Vin = -20 mV 0.410 0.530 0.650 V VOUTC3 17, 33, 45 +INC1 to +INC2 = 0 V to 3 V, Vin = -100 mV 2.25 2.50 2.75 V VOUTC4 17, 33, 45 +INC1 to +INC2 = 0 V to 3 V, Vin = -20 mV 0.33 0.53 0.73 V Input resistance Input current 7. Current detection amplifier block [Current Amp1 to Current Amp3] Current detection voltage (Continued) 11 MB3879 (Continued) Parameter Common mode input voltage range VCM 17, 33, 45 Voltage gain AV 17, 33, 45 BW 17, 33, AV = 0 dB 45 7. Current detection Frequency band width amplifier block [Current Amp1 to Current Output voltage Amp3] Output source current Output sink current 8.PWM comparator block [PWM Comp.] 9. DTC detection block [DTC] Vcc V 23.75 25.00 26.25 V/V 2.0*1 MHz VOUTCH 17, 33, 45 4.8 4.9 V VOUTCL 17, 33, 45 20 200 mV ISOURCE 17, 33, OUTC1 to OUTC3 45 =2V -2 -1 mA ISINK 17, 33, OUTC1 to OUTC3 45 =2V 100 200 A Duty cycle = 0 % 1.9 2.0 V VTH 24 Duty cycle = 100 % 3.0 3.1 V IDTC 39 DTC = 2.5 V nA VTL 24 Duty cycle = 0 % 1.9 2.0 V VTH 24 Duty cycle = 100 % 3.0 3.1 V ISOURCE 24 OUT = 14 V, Duty 5 % (t = 1 / fOSC x Duty) -400*1 mA ISINK 24 OUT = 19 V, Duty 5 % (t = 1 / fOSC x Duty) 400*1 mA ROH 24 OUT = -45 mA 6.5 9.8 ROL 24 OUT = 45 mA 5.0 7.5 Rise time tr1 24 OUT = 3300 pF (Si4435 equivalent) 50*1 ns Fall time tf1 24 OUT = 3300 pF (Si4435 equivalent) 50*1 ns Output voltage VH 26 VCC = VCCO = 8 V to 25 V, VH = 0 mA to 30 mA Threshold voltage Input terminal current Threshold voltage Output on resistor *1 : Standard design value 12 +INC1 to +INC3 = 3 V to VCC, Vin = -100 mV 0 24 Output sink current 11. Bias voltage block [VH] VTL Output source current 10. Output section [OUT] (VCC = VCCO = 19 V, VDD = 5 V, Charge mode = Li4C42, Ta = +25 C) Value Symbol Pin No. Conditions Unit Min Typ Max -400 -200 VCC - VCC - VCC - 6.5 6.0 5.5 V MB3879 (Continued) Parameter CTL input voltage 12. Control block [CTL] Input current Data output delay time CTL signal re-input time (VCC = VCCO = 19 V, VDD = 5 V, Charge mode = Li4C42, Ta = +25 C) Value Symbol Pin No. Conditions Unit Min Typ Max 2.0 25.0 V Standby status 0 0.8 V 7 CTL = 5 V 100 150 A ICTLL 7 CTL = 0 V 0 1 A tD0 24 CTL = "H" levelStart charging 1 ms tRCTL 7 CTL = "H" level"L" level"H" level 2 ms VIL 2, 3, 4, 5 0 VDD x 0.2 V VIH 2, 3, 4, 5 VDD x 0.7 VDD V IH 2, 3, 4, 5 D3 to D0 = 5 V 50 75 A IL 2, 3, 4, 5 D3 to D0 = 0 V 10 A tDS 2, 3, 4, 5 D3 to D0CTL 1 ms VTH 7 Operating status VTL 7 ICTLH Input voltage 13. Decoder block [DEC] Input current Data setup time VTLH 10, 11, FB1 to FB6 = 12, 13 3.2 3.3 3.4 V VTHL 10, 11, FB1 to FB6 = 12, 13 2.9 3.0 3.1 V VH 10, 11, 12, 13 0.3*1 V VOL OUT-EA1 = OUT-EA2 = 10, 11, OUT-EV = OUT-EC = 2 12, 13 mA 0.4 V VOH OUT-EA1 = OUT-EA2 = 10, 11, VDD - OUT-EV = OUT-EC = 12, 13 0.4 -0.4 mA V Threshold voltage 14. Mode Hysteresis width detection block [MODE Comp.] Output voltage IDDS 8 CTL = 0 V 0 10 A IDD 8 CTL = 5 V, OUT-EV = "L" level 200 300 A Standby current ICCS 1, 25 CTL = 0 V 0 10 A Power supply current ICC 1, 25 CTL = 5 V 8 12 mA Standby current 15. VDD power supply Power supply current 16. General *1 : Standard design value 13 MB3879 TYPICAL CHARACTERISTICS Power current vs. VDD logic block power supply voltage 12 Ta = +25 C CTL = 5 V 10 8 6 4 2 0 0 5 10 15 20 25 Power supply current IDD (A) Power supply current ICC (mA) Power supply current vs. Power supply voltage 500 450 400 350 300 250 200 150 100 50 0 0 Power supply voltage VCC (V) 4 6 8 10 Reference voltage vs. Power supply voltage 5 Reference voltage VTEST (V) 5 4 3 2 TEST = 4.2 V setting Ta = +25C CTL = 5 V TEST = 0 mA 1 0 0 5 10 15 20 25 4 3 2 TEST = 4.1 V setting Ta = +25C CTL = 5 V TEST = 0 mA 1 0 0 5 10 15 20 25 Power supply voltage VCC (V) Power supply voltage VCC (V) Reference voltage vs. Ambient temperature Reference voltage vs. Ambient temperature 4.15 4.25 4.24 TEST = 4.2 V specified VCC = 19 V CTL = 5 V TEST = 0 mA 4.23 4.22 4.21 4.2 4.19 4.18 4.17 4.16 4.15 -40 -20 0 20 40 60 80 Ambient temperature Ta ( C) 100 Reference voltage VTEST2 (V) Reference voltage VTEST (V) 2 VDD logic power supply voltage VDD (V) Reference voltage vs. Power supply voltage Reference voltage VTEST1 (V) Ta = +25 C VCC = 19 V CTL = 5 V 4.14 TEST = 4.1 V specified VCC = 19 V CTL = 5 V TEST = 0 mA 4.13 4.12 4.11 4.1 4.09 4.08 4.07 4.06 4.05 -40 -20 0 20 40 60 80 100 Ambient temperature Ta ( C) (Continued) 14 MB3879 Reference voltage vs. Power supply voltage Reference voltage vs. Load current 6 Reference voltage VB (V) 5 4 3 2 Ta = +25 C CTL = 5 V VB = 0 mA 1 0 0 5 10 15 20 Ta = +25 C VCC = 19 V CTL = 5 V 5 4 3 2 1 0 25 0 5 5.10 CTL terminal current ICTL ( A) Reference voltage VB (V) 5.04 5.02 5.00 4.98 4.96 4.94 4.92 4.90 -40 -20 0 20 40 60 80 100 Ambient temperature Ta ( C) Triangular oscillation frequency fOSC (Hz) 20 25 500 VCC = 19 V CTL = 5 V VB = 0 mA 5.06 15 30 CTL terminal current and reference voltage vs. CTL terminal voltage Reference voltage vs. Ambient temperature 5.08 10 Load current IB (mA) Power supply voltage VCC (V) 10 Ta = +25 C VCC = 19 V 450 400 9 8 350 7 ICT 300 6 VB 250 5 200 4 150 3 100 2 50 1 0 0 5 10 15 20 Reference voltage VB (V) Reference voltage VB (V) 6 0 25 CTL terminal voltage VCTL (V) Triangular oscillation frequency vs. Timing capacitor 1M Ta = +25 C VCC = 19 V CTL = 5 V 100 k 10 k 10 100 1000 Timing capacitor CT (pF) (Continued) 15 MB3879 Triangular oscillation frequency vs. Ambient temperature 310 340 Ta = +25 C CTL = 5 V CT = 100 pF 308 306 304 302 300 298 296 294 292 290 0 5 10 15 20 25 30 Triangular wave oscillation frequency fOSC (kHz) Triangular oscillation frequency fOSC (kHz) Triangular oscillation frequency vs. Power supply voltage Ta = +25 C VCC = 19 V CTL = 5 V CT = 100 pF 330 320 310 300 290 280 270 260 250 240 -40 -20 Power supply voltage VCC (V) 0 20 40 60 Ambient temperature Ta ( C) 80 100 Error amplifier threshold voltage VTH (V) Error amplifier threshold voltage VTH (V) Error amplifier threshold voltage vs. Ambient temperature (Error Amp6) 17.0 VCC = 19 V CTL = 5 V 16.9 16.8 16.7 16.6 16.5 -40 -20 0 20 40 60 80 Ambient temperature Ta ( C) 100 Error amplifier threshold voltage vs. Ambiennt temperature characteristics (Error Amp5) 17.0 VCC = 19 V CTL = 5 V 16.9 16.8 16.7 16.6 16.5 -40 -20 0 20 40 60 Ambient temperature Ta ( C) 80 100 (Continued) 16 MB3879 Error amplifier gain, phase vs. Frequency (Error Amp2) Ta = +25 C Gain AV (dB) 240 k 20 VCC = 19 V 180 AV 90 0 0 -20 -90 -40 -180 1k 10 k 100 k 1M 10 k 1 F + Phase (deg) 40 41 2.4 k IN 40 10 k - 42 + 2.1 V OUT Error Amp2 10 M Frequency f (Hz) Error amplifier gain, phase vs. Frequency (Error Amp3) Ta = +25 C 40 180 AV VCC = 19 V 4.2 V 240 k 90 0 0 Phase (deg) Gain AV (dB) 20 -20 -90 -40 -180 1k 10 k 100 k 1M 10 k 1 F+ IN 10 k 2.4 k 18 - 23 + 19 + 2.5 V 10 k 16 OUT Error Amp2 10 k 10 M Frequency f (Hz) (Continued) 17 MB3879 (Continued) Current detection amplifier, phase vs. Frequency Ta = +25 C Phase (deg) AV 90 Gain AV (dB) 20 VCC = 19 V 10 k 1 F + 180 40 (35) 15 IN 17 14 - (33) OUT (36) 12.6 V Current Amp2 (Current Amp3) 10 k 0 0 -20 -90 -40 -180 1k 10 k 100 k 1M 10 M Frequency f (Hz) Power dissipation vs. Ambient temperature Power dissipation PD (mW) 1000 900 860 800 700 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 Ambient temperature Ta ( C) 18 + 100 MB3879 FUNCTIONS 1. DC/DC Converter Functions (1) Reference voltage block (REF) The reference voltage generator (REF) generates a temperature-compensated reference voltage from the voltage supplied from the VCC terminal (pin 1). The voltage is used as the reference voltage for Error Amp. (2) Control bias voltage block (VB) The control bias voltage block (VB) generates a temperature-compensated reference voltage using internal reference voltage (5.0V Typ) from VB terminal. The voltage is used as the reference voltage for the IC's internal circuitry. The reference voltage can be used to supply a load current of up to 1 mA to an external device through the VB terminal (3) Triangular waveform oscillator block (OSC) The triangular wave oscillation frequency setting resistor is built in, and the triangular wave oscillation waveform (amplitude of 1.6 V to 2.6 V) is generated by connecting the triangular wave oscillation frequency setting capacitor with the CT terminal (pin 37) . The triangular oscillation waveform is input to the PWM comparator on the IC. (4) Error amplifier block (Error Amp1) The error amplifier (Error Amp1) controls the charge current with the amplifier which outputs the PWM control signal detecting the total current of the system current and control IC input current. It supports a wide range of common mode input voltages from "0 V to Vcc - 1.8 V". In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from FB1 terminal to -INE1 terminal, enabling stable phase compensation to be provided for the system. This section also outputs signal to mode detection section. (5) Error amplifier block (Error Amp2) The error amplifier (Error Amp2) detects the dropping voltage of AC adapter by connecting an external resistor to +INE2 terminal (pin 40), and outputs PWM control signals. It supports a wide range of common mode input voltages from "0 V to Vcc - 1.8 V". In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from FB2 terminal (pin 42) to -INE2 terminal (pin 41), enabling stable phase compensation to be provided for the system. This block also outputs signal to mode detection block. (6) Error amplifiers block (Error Amp3 and Error Amp4) The error amplifiers (Error Amp3 and Error Amp4) detect the output voltages of current detection amplifiers (Current Amp2 and Current Amp3) and compare the voltages with ones on +INE3 terminal (pin 19) and +INE4 terminal (pin 31), and then outputting PWM control signal. This block controls charge currents. In addition, an arbitrary loop gain can be set by connecting a feedback resistor from FB3 terminal (pin 16) to INE3 terminal (pin 18) and from FB4 terminal (pin 34) to -INE4 terminal (pin 32) and capacitor, enabling stable phase compensation to be provided for the system. This block also outputs signal to mode detection block. By connecting a soft-start capacitor to CS1 terminal (pin 23), an inrush current upon power supply startup is prevented. By detecting soft-start with the error amplifier, soft-start time becomes constant, being independent of output loads. 19 MB3879 (7) Error amplifiers block (Error Amp5 and Error Amp6) The error amplifiers (Error Amp5 and Error Amp6) detect the DC/DC converter output voltage and outputs PWM control signals. An on-chip output voltage setting resistor is provided on the IC, external output voltage setting resistor is not needed. A 4-bit decoder selects output voltage among 12.6V (3 cells), 12.3V (3 cells), 16.8V (4 cells), and 16.4V (4 cells), which are applicable to NiMH batteries as well as Li-ion batteries. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from FB5 terminal (pin 30) to -INE5 terminal (pin 29)and from FB6 terminal (pin 20) to -INE6 terminal (pin 21), enabling stable phase compensation to be provided for the system. This block also outputs signal to mode detection block. By connecting a soft-start capacitor to CS2 terminal (pin 22), an inrush current upon power supply startup is prevented. By detecting soft-start with the error amplifier, soft-start time becomes constant, being independent of output loads. (8) Current detection amplifier block (Current Amp1) The current detection amplifier (Current Amp1) detects voltage dropping occurring across the both sides of output sense resistor (RS1) between +INC1 terminal (pin 48) and -INC1 terminal (pin 47), regarding total current between system current and control IC input current. This block outputs the signal amplified 25 times to next stage error amplifier (Error Amp1). (9) Current detection amplifier block (Current Amp2 and Current Amp3) The current detection amplifiers (Current Amp2 and Current Amp3) detect voltage dropping occurring across the both sides of output sense resistor (RS2) between +INC2 terminal (pin 15) and IN1 terminal (pin 14), regarding total current between system current and control IC input current. This block outputs the signal amplified 25 times to next stage error amplifier (Error Amp3). The current detection amplifier (Current Amp3) detects voltage dropping occurring across the both sides of output sense resistor (RS3) between +INC3 terminal (pin 35) and IN2 terminal (pin 36), and then outputs the signal amplified 25 times to next stage error amplifier (Error Amp3). (10) PWM comparator block (PWM Comp.) The PWM comparator is a voltage-to-pulse width converter for controlling the output duty depending on the output voltage of the error amplifiers. The comparator compares the triangular wave generated by the triangular wave oscillator with the output voltage of error amplifier and voltage of DTC terminal (pin 39), and turns on Pch MOS FET when triangular wave voltage is lower than output voltage of error amplifier and voltage of DTC terminal. (11) Output block (OUT) The output block is designed in the totem pole configuration, capable of driving an external P-channel MOS FET. Output amplitude is set to "6V (typical)" at "L" level on output stage by using a voltage generated in bias voltage block. This feature allows higher conversion efficiency and low withstanding voltages on external Pch MOS FET even under wide input voltage range. (12) Bias voltage block (VH) The Bias voltage block output a minimum voltage of output circuit, Vcc-6V (typical). A same voltage as Vcc is output under standby status. 20 MB3879 2. VDD Logic Block (1) Control block (CTL) The system is placed under standby mode by setting CTL terminal (pin 7) to "L" level (power supply current is a maximum of 10 A under standby mode). Setting "H" level at CTL terminal generates an internal reference voltage, placing the system under output operation status. After setting "L" level at CTL terminal, CTL signal reactivation time (tRCTL=2ms(Min)) is required to set the "H" level signal. (2) Decoder block (DEC) By applying signals to D0 terminal (pin 2) through D3 terminal (pin 5), the 4-bit decoder section (DEC) selects output voltage among 12.6V (3 cells), 12.3V (3 cells), 16.8V (4 cells), and 16.4V (4 cells). The voltages are applicable not only to Li-ion batteries but also to NiMH batteries that require cancellation of output voltage control. (See " DECODER SECTION OUTPUT VOLTAGE SETTING CODES" for details.) (3) Mode detection block (MODE Comp.) The mode detection block outputs which charge mode to OUT-EA1 terminal (pin 13), OUT-EA2 terminal (pin 12), OUT EC terminal (pin 11), and OUT-EV terminal (pin 10). For dynamically-controlled charging mode, OUTEA1 terminal is set to "L" level and OUT-EA2 terminal, OUT-EC terminal, and OUT-EV terminal are set to "H" level. For Differential-charging mode, OUT-EA2 terminal is set to "L" level and OUT-EA1 terminal, OUT-EC terminal, and OUT-EV terminal are set to "H" level. For Constant-current charge mode, OUT-EC terminal is set to "L" level and OUT-EA1 terminal, OUT-EA2 terminal, and OUT-EV terminal are set to "H" level. For Constantvoltage charge mode, OUT-EV terminal is set to "L" level and OUT-EA1 terminal, OUT-EA2 terminal, and OUTEC terminal are set to "H" level. Using DTC terminal (pin 39), duty setting from external device is allowed. In such a case, set all of OUT-EA1 terminal, OUT-EA2 terminal, OUT-EC terminal, and OUT-EV terminal to H level when FB terminal voltages of all error amplifiers are higher than DTC terminal voltage. 3. Control Function Specifies settings of "on" and "off" of outputs with setting conditions of CTL terminal (pin 7). "On" and "off" settings of outputs Voltage level of CTL terminal "On/off" status of output L OFF (standby mode) H ON (operating mode) 4. Protection Functions (1) Undervoltage lockout protection circuit block (UVLO) The transient state or a momentary decrease in power supply voltage (VCC) or internal reference voltage (VB), which occurs when the power supply is turned on, may cause the control IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, the undervoltage lockout protection circuit detects decrease of the internal reference voltage level with respect to the power supply voltage and internal reference voltage, and holds OUT terminal (pin 24) on output terminals at "H" level. The circuit restores the output transistor to normal when the supply voltage and internal reference voltage reach the threshold voltage of the undervoltage lockout protection circuit. 21 MB3879 (2) Functions upon operation of protection circuit (UVLO) The following table summarizes functions upon operation of VCCUVLO and VBUVLO (VCC or VB voltage is below UVLO threshold voltage). CS1 CS2 OUT OUT-EA1 OUT-EA2 OUT-EV OUT-EC L L H L L L L 5. Soft-start Function (1) Soft-start block (SOFT1 and SOFT2) By connecting capacitors to CS1 terminal (pin 23) and CS2 terminal (pin 22), an inrush current upon power supply startup is prevented. By detecting soft-start with the error amplifier, soft-start time becomes constant, being independent of output loads of DC/DC converter. (See " SETTING SOFT-START TIME " for details.) SETTING CHARGE CURRENT Voltage values of +INE3 terminal (pin 19) and +INE4 terminal (pin 31) specify charge current (output limit current value). If a current exceeding specified current value is about to flow, a charge voltage drops by the setting current value. +INE3 and +INE4 voltage setting +INE3 (V) = 25 x I2 (A) x RS2 () +INE4 (V) = 25 x I3 (A) x RS3 () +INE3 : Voltage for setting charge current on battery 1 +INE4 : Voltage for setting charge current on battery 2 SETTING MAXIMUM CURRENT on AC ADAPTER Voltage value of +INE1 terminal (pin 43) specifies charge current (output limit current value) so that total current of system current and control IC input current does not exceed maximum current of AC adapter. If a current exceeding specified current value is about to flow, system is placed under Differential-charging mode by the specified current value, and charge current is reduced. +INE1 voltage setting +INE1 (V) = 25 x I1 (A) x RS1 () +INE1 : Voltage for setting maximum current of AC adapter 22 MB3879 SETTING DETECTION VOLTAGE FOR AC ADAPTER VOLTAGE By connecting an external resistor to +INE2 terminal (pin 40), the system is placed under Dynamically-controlled charging mode when voltage at junction A of AC adapter input voltage (VCC) decreases below - INE2 terminal voltage. This feature decreases charge current to keep on constant power of AC adapter. AC adapter detection voltage setting : Vth Vth = (R1 + R2) / R2 x -INE2 <Error Amp2> -INE2 +INE2 VCC R1 41 - 40 + A R2 SETTING TRIANGULAR WAVE OSCILLATION FREQUENCY Triangular wave oscillation frequency is specified by connecting a timing capacitor (CT) to CT terminal (pin 37). Triangular wave oscillation frequency : fOSC fOSC (kHz) =: 30000 / CT (pF) 23 MB3879 DECODER BLOCK OUTPUT VOLTAGE SETTING CODES The following summarizes decoder block output voltage setting codes : Application DC/DC output voltage (V) D0 D1 D2 D3 Number of BATT type < IN1, IN2 > cells 0 0 0 0 12.3 Li-ion 3 4.1 Li3C41 0 0 0 1 12.6 Li-ion 3 4.2 Li3C42 0 0 1 0 12.3 none none none 0 0 1 1 12.3 none none none 0 1 0 0 12.3 none none none 0 1 0 1 12.3 none none none 0 1 1 0 16.4 Li-ion 4 4.1 Li4C41 0 1 1 1 16.8 Li-ion 4 4.2 Li4C42 1 0 0 0 12.3 none none none 1 0 0 1 12.3 none none none 1 0 1 0 12.3 none none none 1 0 1 1 12.3 none none none 1 1 0 0 12.3 none none none 1 1 0 1 Not controlled NiMH 10 to 12 NiMH 1 1 1 0 12.3 none none none 1 1 1 1 12.3 none none none < Functions of bits > D0 : Selecting BATT type (Li-ion or NiMH) D1 and D2 : Selecting the number of cells (3 Cell or 4 Cell) D3 : Selecting charge voltage (4.1 V or 4.2 V) 24 Charge voltage (V) Charge mode symbol MB3879 SETTING SOFT-START TIME 1. Setting Soft-start Time in Constant-current Mode To prevent surge currents when the IC is turned on, you can set a soft-start by connecting a soft-start capacitor (Cs1) to the CS1 terminal (pin 23). Setting CTL terminal (pin 7) voltage to "H" level to activate the IC (Vcc UVLO threshold voltage), Q2 is turned off and charging starts on soft-start capacitor (Cs1) connected to the CS1 terminal at 10 A. The error amplifier output (FB3 terminal (pin 16) or FB4 terminal (pin 34)) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (+INE3 terminal (pin 19) voltage (+INE4 terminal (pin 31) voltage, and CS1 terminal voltage). The FB3 (FB4) terminal voltage during the soft-start period (CS1 terminal voltage < +INE3 (+INE4)) is therefore determined by comparison between the -INE3 (-INE4) terminal and CS1 terminal voltages. The DC/DC converter output voltage rises in proportion to the CS1 terminal voltage as the soft-start capacitor connected to the CS1 terminal is charged. The soft-start time is obtained from the following equation: Soft-start time : ts (time to output 100%) ts (s) =: +INE3 (+INE4) / 10 (A) x CS1 (F) CS1 terminal voltage = 5.5 V Error Amp block Comparison voltage to -INE3 (-INE4) voltage = +INE3 V (+INE4) =0V Soft-start time ts VB 10 A 10 A FB3 16 FB4 34 -INE3 18 -INE4 32 CS1 +INE3 CS1 +INE4 - + + Error Amp 23 19 31 Q2 UVLO <Soft-start circuit> 25 MB3879 2. Setting Soft-start Time in Constant-voltage Mode To prevent surge currents when the IC is turned on, you can set a soft-start by connecting a soft-start capacitor (CS2) to the CS2 terminal (pin 22). Setting CTL terminal (pin 7) voltage to "H" level to activate the IC (Vcc UVLO threshold voltage), Q2 is turned off and charging starts on soft-start capacitor (CS2) connected to the CS2 terminal at 10 A. The error amplifier output (FB5 terminal (pin 30) or FB6 terminal (pin 20)) is determined by comparison between the lower one of the potentials at two noninverting input terminals (TEST terminal (pin 28) voltage and CS2 terminal voltage). The FB5 (FB6) terminal voltage during the soft-start period (CS2 terminal voltage < TEST) is therefore determined by comparison between the -INE5 (-INE6) terminal and CS2 terminal voltages. The DC/DC converter output voltage rises in proportion to the CS2 terminal voltage as the soft-start capacitor connected to the CS2 terminal is charged. The soft-start time is obtained from the following equation: Soft-start time : ts (time to output 100%) ts (s) =: TEST / 10 (A) x CS2 (F) CS2 terminal voltage = 5.5 V Error Amp block Comparison voltage to -INE5 (-INE6) voltage = TEST =0V Soft-start time ts VB 10 A 10 A FB5 30 FB6 20 -INE5 29 -INE6 21 CS2 TEST CS2 - + + 22 28 Q2 <Soft-start circuit> 26 Error Amp UVLO MB3879 USING WITH SHORT-CIRCUIT CS1 AND CS2 TERMINAL By making a short circuit CS1 terminal (pin 23) and CS2 terminal (pin 22), the start-up of constant current charging mode and constant voltage charging mode is allowed at the same time. A capacitor to be connected must have a charging current at 20 A. TREATMENT WITHOUT USING THE CSCP TERMINAL If the soft-start function is not used, open CS1 terminal (pin 23) and CS2 terminal (pin 22). "Open" 22 CS2 "Open" 23 CS1 <Treatment without using the CSCP terminal> 27 MB3879 OPERATING SEQUENCE 1. Sequence of Normal Power Supply Startup and Charge Startup Completion <AC adapter is connected with Battery 1 inserted> *1 *2 *3 *4 *6 *7 *8 *5 *9 *10 *11 *12 VIN VCC VDD Battery1 (Insert) (Remove) Battery2 (Insert) (Remove) tRCTL tD0 CTL Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 Decoder output tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1 :Insert Battery 1 *2 :VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level *3 :CTL signal is "L" level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4 :VIN and VCC rises by connecting AC adapter. *5 :Charge voltage data is set by microprocessor. *6 :CTL signal is turned on after data setup time (tDS) . *7 :Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8 :Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H" level. *9 :Shift from constant current charge control to constant voltage change control. OUT-EC = "H"level, OUT-EV = "L"level. *10:With CTL signal "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC="L" level. *11:Data set after turning off CTL signal. *12:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL=2 ms (Min)) or longer time is required. 28 MB3879 2. Sequence that Limitation (Differential Control) Activates by Input Current during Constant Current Charging on BATT1 <AC adapter is connected with Battery 1 inserted, and exceeding input current> *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL tRCTL tD0 Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 Decoder output tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level *3:CTL signal is "L" level after resetting microprocessor (CTL = "HiZ"until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H"level. *9:Shift from constant current charge control to differential charge control by exceeding input current. OUT-EA1 = "L" level, OUT-EC = "H" level. *10:Returning to input current level within allowable range, shift to constant current charge control. OUT-EA1 = "H" level, OUTEC = "L" level. *11:After CTL signal set at "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *12:Data set after turning off CTL signal. *13:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 29 MB3879 3. Sequence that Limitation (Differential Control) Activates by Input Current during Constant Voltage Charging on BATT1 <AC adapter is connected with Battery 1 inserted, exceeding input current> *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 *14 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output tRCTL tD0 Reset microprocessor tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L"level *3:CTL signal is "L"level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H"level. *9:Shift from constant current charge control to constant voltage charge control. OUT-EC = "H"level, OUT-EV = "L"level. *10:Shift to differential charge control by exceeding input current. OUT-EA1 = "L" level, OUT-EV = "H" level. *11:Returning to input current level within allowable range, shift to constant voltage charge control. OUT-EA1 = "H"level, OUT-EV = "L"level *12:After CTL signal set at"L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *13:Data set after turning off CTL signal. *14:After CTL signal set at"L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 30 MB3879 4. Sequence that Limitation (Dynamically-controlled Charging) Activates by Dropping Input Current during Constant Current Charging on BATT1 <AC adapter is connected with Battery 1 inserted, under dropping input current> *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL tRCTL tD0 Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 Decoder output tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level *3:CTL signal is "L" level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H" level. *9:Shift from constant current charge control to dynamically-controlled charge control due to dropping input voltage. OUT-EA2 = "L" level, OUT-EC = "L" level *10:Returning to input voltage level within allowable range, shift to constant current charge control. OUT-EA2 = "H" level, OUT-EC = "L" level. *11:After CTL signal set at "L" level. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *12:Data set after turning off CTL signal. *13:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 31 MB3879 5. Sequence that Limitation (Dynamically-controlled Charging) Activates by Dropping Input Voltage during Constant Voltage Charging on BATT1 <AC adapter is connected with Battery 1 inserted, under dropping input voltage> *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 *14 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL tRCTL tD0 Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 tDS Data Data Decoder output Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV *1:Insert Battery 1 OUT-EC : Undefined *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level *3:CTL signal is "L" level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H" level. *9:Shift from constant current mode to constant voltage charge control. OUT-EC = "H" level, OUT-EV = "L" level. *10:Shift to dynamically-controlled charge control due to dropping input voltage. OUT-EA2 = "L" level, OUT-EV = "H" level. *11:Returning to input voltage level within allowable range, shift to constant voltage charge control. OUT-EA2 = "H" level, OUT-EV = "L"level *12:After CTL signal set at "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level *13:Data set after turning off CTL signal. *14:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 32 MB3879 6. Sequence of Normal Power Supply Startup and Charge Startup Completion <Battery 1 is inserted with AC adapter is connected, or with "0V" battery voltage, AC adapter is connected and then Battery 1 is inserted> *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 VIN VCC VDD Battery1 (Insert) (Remove) (Insert) (Remove) Battery2 tRCTL tD0 CTL Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 Decoder output tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:VIN and VCC rises by connecting AC adapter. *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *3:CTL signal is "L" level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4:Insert Battery 1 *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H" level. *9:Shift from constant current charge control to constant voltage change control. OUT-EC = "H" level, OUT-EV = "L"level. *10:With CTL signal"L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *11:Data set after turning off CTL signal. *12:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 33 MB3879 7. Sequence when Battery 2 (almost empty) is inserted during BATT1 is being charged constant voltage , and shifting to constant current charge mode <Battery 2 (almost empty) is inserted when AC adapter is connected and Battery 1 is inserted > *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 (Insert) (Remove) (Insert) (Remove) Battery2 tRCTL tD0 CTL Reset microprocessor BATT1 voltage BATT2 voltage D0-D3 Decoder output tDS Data Data Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Insert Battery 1. *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *3:CTL signal is "L" level after resetting microprocessor (CTL = "HiZ" until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at "H" level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = "H" level. *9:Shift from BATT1 constant current charge control to constant voltage change control. OUT-EC = "H" level, OUT-EV = "L" level. *10:Battery2 (almost empty) is inserted. Controlled by FB4 (BATT2 constant current charge) . OUT-EC = "L" level. *11:With CTL signal "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *12:Data set after turning off CTL signal. *13:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 34 MB3879 8. Sequence of Normal Power Supply Shutoff and Completion of Charging <Battery 1 is removed and then AC adapter is removed.> *1 *2 *3 *4 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:With CTL signal "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *2:Voltages of BATT1 and BATT2 fall by removing Battery 1. *3:VIN and VCC power supply falls by removing AC adapter. *4:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = HiZ 35 MB3879 9. Sequence of Normal Power Supply Shutoff and Completion of Charging < AC adapter is removed and then Battery 1 is removed.> *1 VIN *2 *3 *4 VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:With CTL signal "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *2:VIN and VCC power falls by removing AC adapter. *3:Voltages of BATT1 and BATT2 falls by removing Battery 1. *4:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = HiZ 36 MB3879 10. Sequence of Normal Power Supply Shutoff and Completion of Charging < Battery 1 and 2 are removed during charge operation.> *1 *2 *3 VIN VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output Data Set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Stopping charge operation by removing Battery 1. *2:With CTL signal "L" level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC="L" level. *3:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC =HiZ 37 MB3879 11. Sequence of Normal Power Supply Shutoff and Completion of Charging <AC adapter is removed during charge operation.> *1 VIN *2 VCC VDD Battery1 Battery2 (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output Data set FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Fall of VIN and VCC voltages due to removal of AC adapter. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = "L" level. *2:CTL signal is "L" level. 38 MB3879 EQUIVALENT CIRCUIT DIAGRAM FOR CTL, D0 to D3, OUT-EA1, EA2, EV, EC TERMINALS * CTL terminal CTL 50 k Q1 D1 50 k * D0 to D3 terminals VDD D1 Q1 D0 to D3 D2 100 k Q2 VSS * OUT-EA1 to OUT-EC terminal VDD Q1 D1 OUT-EA1 OUT-EA2 Q2 D2 OUT-EV OUT-EC VSS 39 MB3879 EQUIVALENT CIRCUIT DIAGRAM FOR DECODER BLOCK VDD D D0 Q DD0 CK XQ R D D1 Q DD1 CK XQ R D D2 Decode output Decoder Q DD2 CK XQ R D D3 Q DD3 CK XQ R VDD VDD a point Charging start signal CTL Power tDS D0-D3 tD0 tRCTL Data2 Data1 CTL DD0-DD3 a point Charging start signal Power 40 Data2 Set Data1 Set Data1 Load Data2 Load MB3879 NOTES ON USING REVERSE CURRENT PROTECTION DIODE * If charging currents (I1 and I2) are imbalance under constant voltage control, voltages are controlled on the basis of a lower battery voltage. Therefore, battery voltage on either side is higher for the potential occurring on reverse current protection diodes (D1 and D2) and sense resistors (RS2 and RS3). * Take notes and voltage and current characteristics of reverse current protection diodes (D1 and D2) so that the voltage will not exceed overcharge halt voltage. VCCO DC-IN 25 A B OUT 24 I1 RS2 D1 VH Battery 1 26 C D I2 RS3 D2 Battery 2 41 MB3879 APPLICATION CIRCUIT EXAMPLE RS1 10 m R3 100 k R4 51 k R22 100 k R19 30 k R21 2.7 k Q3 SW2 R18 100 k R15 30 k R17 2.7 k Q2 SW1 <Current + Amp1> x25 - + <Error Amp1> - + OUT-EA1 13 <MODE Comp.2> + <Error Amp2> OUT-EA2 12 - <MODE Comp.3> - + + OUT-EC 11 - <<Dynamically-Contorl>> <MODE Comp.4> <<Current-Contorl>> <Current + Amp2> x25 - <Current + Amp3> x25 - + <Error Amp3> <Error Amp4> - + + OUT-EV 10 - - + + C9 0.1 F <OUT> + + + - Drive OUT 24 VCC <SOFT1> VB VH 26 bias (VCC - 6 V) Voltage GNDO <VH> 27 C3 0.1 F A B BATT1 12.6 V/ 16.8 V Q1 L1 22 F D1 23 + + D2 C4 C5 100 100 F F RS2 75 m Battery 1 C D BATT2 12.6 V/ 16.8 V D3 RS3 75 m Battery 2 VIN 16 V/ 19 V R1 22.4 k R1 <<Voltage-Contorl>> 22.4 k <Error Amp5> -INE5 C7 3300 pF R14 51 k - + + 29 FB5 <UVLO> R2 VCC UVLO VB UVLO 30 R2 <Error Amp6> -INE6 21 - + + 2.8 k 2.8 k C15 3300 pF 3V R3 8.4 k R3 8.4 k R27 51 k 2V FB6 20 <SOFT2> VB CS2 22 C14 0.022 F (4.2 V) VDD <REF> D0 D1 2 D2 3 D3 4 5 VSS 6 <Decoder> C19 0.1 F 8 <Larch> 5V (4.1 V) <OSC> CTL <VB> bias (5 V) CT C10 100 pF 37 28 TEST C8 0.1 F 9 VB C7 0.1 F 42 C1 C2 10 F10 F VCCO 25 <PWM Comp> CS1 C13 0.022 F <VDD> - FB Voltage Selector R2 0 (30 k) <MODE Camp.1> <<Differencial-Control>> FB Voltage Selector R11 30 k C20 0.1 F VCC 1 FB Voltage Selector R10 150 k R25 -INE1 100 k 44 OUTC1 45 +INC1 48 -INC1 C12 47 3300 +INE1 pF 43 R26 51 k FB1 46 FB2 42 R24 47 k C11 6800 pF -INE2 41 R23 15 k +INE2 40 DTC 39 R28 100 k -INE3 18 OUTC2 C16 17 3300 pF +INC2 A 15 R29 IN1 51 B 14 k +INE3 19 FB3 R20 16 30 k -INE4 R13 100 k 32 OUTC3 C6 33 3300 pF +INC3 35 C R12 IN2 51 36 D k +INE4 31 FB4 R16 34 30 k <VR> GND 38 <CTL> 7 MB3879 PARTS LIST COMPONENT ITEM SPECIFICATION VENDOR PARTS No. Q1 Q2, Q3 FET FET VDS = 30 V, Qg = 43 nC (Typ) VDS = 60 V TOSHIBA VISHAY SILICONIX TPC8102 2N7002E D1 to D3 Diode With VF = 0.42 V (Max) and IF = 3 A ROHM RB053L-30 L1 Inductor 22 H 3.5 A, 31.6 m TDK SLF12565T-220M3R5 C1, C2 C3 C4, C5 C6, C7 C8, C9 C10 C11 C12, C15, C16 C13,C14 C17, C19, C20 Ceramics Condenser Ceramics Condenser Electrolytic Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser 10 F 0.1 F 100 F 3300 pF 0.1 F 100 pF 6800 pF 3300 pF 0.022 F 0.1 F 25 V 50 V 25 V 50 V 50 V 50 V 50 V 50 V 50 V 50 V TDK TDK SANYO MURATA TDK TDK MURATA MURATA TDK TDK C3225JF1E106Z C1608JB1H104K 25CV100AX GRM39B322K50 C1608JB1H104K C1608CH1H101J GRM39B682K50 GRM39B332K50 C1608JB1H223K C1608JB1H104K RS1 R2 Resistor Jumper Resistor* Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor 10 m 0 30 k 100 k 51 k 75 m 150 k 30 k 51 k 100 k 30 k 2.7 k 100 k 30 k 15 k 47 k 100 k 51 k 1% 50 m Max 0.5 % 0.5 % 0.5 % 1% 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % KOA KOA ssm ssm ssm KOA ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm SL1TE10mF RK73ZJ1J RR0816P303D RR0816P104D RR0816P513D SL1TE75mF RR0816P154D RR0816P303D RR0816P513D RR0816P104D RR0816P303D RR0816P272D RR0816P104D RR0816P303D RR0816P153D RR0816P473D RR0816P104D RR0816P513D R3 R4 RS2,RS3 R10 R11 R12, R14 R13 R15, R16 R17, R21 R18, R22 R19, R20 R23 R24 R25, R28 R26, R27, R29 * : 30 k for 4 cells Notes : TOSHIBA : Toshiba Corporation ROHM : ROHM CO., LTD. TDK : TDK Corporation SANYO : SANYO Electric Co., Ltd. MURATA : Murata Manufacturing Co., Ltd. KOA : KOA Corporation ssm : SUSUMU Co., Ltd. 43 MB3879 REFERENCE DATA Conversion efficiency (%) Conversion efficiency - Charge current (constant voltage mode Li3C42) 100 Ta = +25 C VIN = 16 V BATT charge voltage = 12.6 V setting BATT2 = OPEN SW1 = SW2 = ON (%) = (VBATT1 x IBATT1) / (VIN x IIN) x 100 98 96 94 92 90 88 86 84 82 80 10 m 100 m 1 10 BATT1 charge current IBATT1 (A) Conversion efficiency (%) Conversion efficiency - Charge current (constant current mode Li3C42) 100 Ta = +25 C VIN = 16 V BATT charge voltage = 12.6 V setting BATT2 = OPEN SW1 = SW2 = ON (%) = (VBATT1 x IBATT1) / (VIN x IIN) x 100 98 96 94 92 90 88 86 84 82 80 0 2 4 6 8 10 12 14 16 BATT1 charge voltage VBATT1 (V) (Continued) 44 MB3879 Conversion efficiency - Charge current (constant current mode Li4C42) Conversion efficiency (%) 100 Ta = +25 C VIN = 19 V BATT charge voltage = 16.8 V setting BATT2 = OPEN SW1 = SW2 = ON (%) = (VBATT1 x IBATT1) / (VIN x IIN) x 100 98 96 94 92 90 88 86 84 82 80 10 m 100 m 1 10 BATT1 charge current IBATT1 (A) Conversion efficiency (%) Conversion efficiency - Charge current (constant current mode Li4C42) 100 Ta = +25 C VIN = 19 V BATTcharge voltage = 16.8 V setting BATT2 = OPEN SW1 = SW2 = ON (%) = (VBATT1 x IBATT1) / (VIN x IIN) x 100 98 96 94 92 90 88 86 84 82 80 0 2 4 6 8 10 12 14 16 18 20 BATT1 charge voltage VBATT1 (V) (Continued) 45 MB3879 Conversion efficiency - Charge current (constant voltage mode Li3C42) Conversion efficiency (%) 100 Parallel charging 98 Ta = +25 C, VIN = 16 V 96 BATT charging voltage = 12.6 V setting SW1 = SW2 = ON 94 (%) = (VBATT1 x IBATT1 + 92 VBATT2 x IBATT2) / (VIN x IIN) 90 x 100 88 IBATT1 = IBATT2 86 84 82 80 10 m 100 m 1 10 BATT1 charge current IBATT1 (A) Conversion efficiency (%) Conversion efficiency - Charge current (constant current mode Li3C42) 100 Parallel charging 98 Ta = +25 C VIN = 16 V 96 BATT charging voltage = 12.6 V setting 94 SW1 = SW2 = ON (%) = (VBATT1 x IBATT1 + VBATT2 92 x IBATT2) / (VIN x IIN) x 100 90 IBATT1 = IBATT2 88 86 84 82 80 0 2 4 6 8 10 12 14 16 BATT1 charge voltage VBATT1 (V) (Continued) 46 MB3879 Conversion efficiency (%) Conversion efficiency - Charge current (constant voltage mode Li4C42) 100 Parallel charging 98 Ta = +25 C, VIN = 19 V 96 BATT charging voltage = 16.8 V setting SW1 = SW2 = ON 94 (%) = (VBATT1 x IBATT1 + VBATT2 x IBATT2) 92 / (VIN x IIN) 90 x 100 88 IBATT1 = IBATT2 86 84 82 80 10 m 100 m 1 10 BATT1 charge current IBATT1 (A) Conversion efficiency - Charge current (constant current mode Li4C42) Conversion efficiency (%) 100 Parallel charging 98 Ta = +25 C 96 VIN = 19 V BATT charging voltage = 16.8 V specified 94 SW1 = SW2 = ON 92 (%) = (VBATT1 x IBATT1 + VBATT2 x IBATT2) / 90 (VIN x IIN) 88 x 100 86 IBATT1 = IBATT2 84 82 80 0 2 4 6 8 10 12 14 16 18 20 BATT1 charge voltage VBATT1 (V) (Continued) 47 MB3879 BATT voltage - BATT charge current (Li3C42) BATT1 voltage VBATT1 (V) 18 Ta = +25 C VIN = 16 V BATT1 : Electric load (Made by KIKUSUI : PLZ-150W) BATT2 : OPEN 16 14 12 10 Dead Battery MODE DCC MODE 8 6 4 2 DCC : Dynamically-Controlled Charging 0 0 0.5 1 1.5 2 BATT1 charge current IBATT1 (A) BATT voltage - BATT charge current (Li4C42) BATT1 voltage VBATT1 (V) 20 Ta = +25 C VIN = 19 V BATT1 : Electric load (Made by KIKUSUI : PLZ-150W) BATT2 : OPEN 18 16 14 12 Dead Battery MODE 10 DCC MODE 8 6 4 2 DCC : Dynamically-Controlled Charging 0 0 0.5 1 1.5 2 BATT1 charge current IBATT1 (A) (Continued) 48 MB3879 BATT voltage - BATT charge current (Li3C42) BATT1 voltage VBATT1 (V) 18 Parallel charging Ta = +25 C VIN = 16 V BATT1 : Electric load (Made by KIKUSUI : PLZ-150W) IBATT1 = IBATT2 16 14 12 10 Dead Battery MODE 8 DCC MODE 6 4 2 DCC : Dynamically-Controlled Charging 0 0 0.5 1 1.5 2 BATT1 charge current IBATT1 (A) BATT voltage - BATT charge current (Li4C42) BATT1 voltage VBATT1 (V) 20 Parallel charging Ta = +25 C VIN = 19 V BATT1 : Electric load (Made by KIKUSUI : PLZ-150W) IBATT1 = IBATT2 18 16 14 12 Dead Battery MODE 10 DCC MODE 8 6 4 2 DCC : Dynamically-Controlled Charging 0 0 0.5 1 1.5 2 BATT1 charge current IBATT1 (A) (Continued) 49 MB3879 Switching waveform voltage mode (Li3C42) Ta = +25 C VIN = 16 V BATT1 = 20 BATT2 = OPEN VD (V) 20 Switching waveform current mode (Li3C42) Ta = +25 C VIN = 16 V BATT1 = 8 BATT2 = OPEN VD (V) 20 VD VD 10 10 0 VOUT (V) 20 0 VOUT (V) 20 VOUT 10 VOUT 10 0 0 0 1 2 3 4 5 6 7 8 Switching waveform voltage mode (Li4C42) Ta = +25 C VIN = 19 V BATT1 = 20 BATT2 = OPEN VD VD (V) 20 0 9 10 (s) 1 2 3 4 5 6 7 8 9 10 (s) Switching waveform current mode (Li4C42) Ta = +25 C VIN = 19 V BATT1 = 8 BATT2 = OPEN VD VD (V) 20 10 10 0 VOUT (V) 20 0 VOUT (V) 20 VOUT 10 10 0 0 0 1 2 3 4 5 6 7 8 9 10 (s) VOUT 0 1 2 3 4 5 6 7 8 9 10 (s) (Continued) 50 MB3879 (Continued) Soft-start operation waveform voltage mode (Li3C42) VBATT1 (V) Ta = +25 C VIN = 16 V BATT1 = 20 15 BATT2 = OPEN 10 VBATT1 VBATT2 VBATT2 (V) 15 5 0 ts 0 2 VBATT2 10 5 10 5 0 5 9 ms VCTL 0 Ta = +25 C VIN = 16 V BATT1 = 20 VBATT2 (V) BATT2 = OPEN 15 VBATT1 (V) VBATT1 15 10 0 VCTL (V) 5 Discharge operation waveform current mode (Li3C42) 0 VCTL (V) VCTL 5 0 4 6 0 8 10 12 14 16 18 20 (ms) 2 4 6 8 10 12 14 16 18 20 (ms) Soft-start operation waveform voltage mode (Li4C42) Discharge operation waveform current mode (Li4C42) VBATT1 (V) 20 VBATT1 (V) 20 15 10 Ta = +25 C VIN = 19 V BATT1 = 20 BATT2 = OPEN VBATT1 VBATT2 (V) 20 15 VBATT1 VBATT2 Ta = +25 C VIN = 19 V BATT1 = 20 BATT2 = OPEN VBATT2 (V) 20 15 10 5 10 5 10 0 5 0 5 VCTL (V) 5 ts VBATT2 8.8 ms VCTL 0 0 15 0 VCTL (V) VCTL 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) 0 2 4 6 8 10 12 14 16 18 20 (ms) 51 MB3879 NOTES ON USE * Design ground lines on printed circuit with regard to common impedance. * Be sure to take measures against electrostatics. * Use static protection products or conductive containers for storing semiconductor devices. * Use conductive bag or conductive containers for storing or carrying printed boards with semiconductor devices mounted. * Be sure to connect ground lines of work table, tools and measurement devices. * Establish a ground for human body of a worker using a resistor of 250 k to 1 M serially connected between the body and the ground. * Do not apply a negative voltage. * If a negative voltage lower than -0.3V, a parasitic transistor may appear on LSI, causing malfunction. ORDERING INFORMATION Part number MB3879PFV 52 Package 48-pin Plastic LQFP (FPT-48P-M05) Remarks MB3879 PACKAGE DIMENSION 48-pin Plastic LQFP (FPT-48P-M05) Note 1) * : These dimensions include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. 9.000.20(.354.008)SQ +0.40 +.016 *7.00 -0.10 (.276 -.004 )SQ 36 0.1450.055 (.006.002) 25 24 37 0.08(.003) Details of "A" part +0.20 1.50 -0.10 +.008 13 48 "A" 0~8 LEAD No. 1 0.50(.020) C (Mounting height) .059 -.004 INDEX 0.100.10 (.004.004) (Stand off) 12 0.200.05 (.008.002) 0.08(.003) M 0.500.20 (.020.008) 0.600.15 (.024.006) 0.25(.010) 2002 FUJITSU LIMITED F48013S-c-5-9 Dimensions in mm (inches) 53 MB3879 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0209 FUJITSU LIMITED Printed in Japan