Si500D D IFFERENTIAL O UTPUT S I L I C O N O SCILLATOR Features Quartz-free, MEMS-free, and PLL-free all-silicon oscillator Any-rate output frequencies from 0.9 to 200 MHz Short lead times Excellent temperature stability (20 ppm) Highly reliable startup and operation High immunity to shock and vibration Low jitter: <1.5 ps 0 to 85 C operation includes 10-year aging in hot environments Footprint compatible with industrystandard 3.2 x 5.0 mm XOs CMOS and SSTL versions available Driver stopped, tri-state, or powerdown operation RoHS compliant 1.8, 2.5, or 3.3 V options Low power More than 10x better fit rate than competing crystal solutions Specifications Parameters Frequency Range Frequency Stability Condition Temperature stability, 0 to +70 C Temperature stability, 0 to +85 C Total stability, 0 to +70 C operation1 Total stability, 0 to +85 C operation2 Operating Temperature Storage Temperature Supply Voltage Supply Current 1.8 V option 2.5 V option 3.3 V option LVPECL Low Power LVPECL LVDS HCSL Differential CMOS(3.3 V option,10 pF,200 MHz) Differential SSTL-3 Differential SSTL-2 Differential SSTL-18 Tri-State Powerdown VDIFF = 0 Min 0.9 Typ -- Max 200 Units MHz -- 10 -- ppm -- 20 -- ppm -- -- 150 ppm -- -- 250 ppm 0 -55 1.71 2.25 2.97 -- -- -- -- -- -- -- -- -- 34.0 19.3 14.9 25.3 +85 +125 1.98 2.75 3.63 36.0 22.2 16.5 29.3 C C V V V mA mA mA mA -- 29.0 31.8 mA -- -- -- -- -- 46 - 13 ns/TCLK 24.5 24.3 22.2 9.7 1.0 -- 27.7 26.7 25 10.7 1.9 54 + 13 ns/TCLK mA mA mA mA mA % Output Symmetry Notes: 1. Inclusive of 25 C initial frequency accuracy, operating temperature range, supply voltage change, output load change, first-year aging at 25 C, shock, vibration, and one solder reflow. 2. Inclusive of 25 C initial frequency accuracy, operating temperature range, supply voltage change, output load change, ten-year aging at 85 C, shock, vibration, and one solder reflow. 3. See "AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators" for further details regarding output clock termination recommendations. 4. Min column entries are minima of VOH. Max column entries are maxima of VOL. Rev. 0.3 5/09 Copyright (c) 2009 by Silicon Laboratories Si500D This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si500D Parameters Rise and Fall Times (20/80%)3 LVPECL Output Option (DC coupling, 50 to VDD - 2.0 V)3 Low Power LVPECL Output Option (AC coupling, 100 Differential Load)3 LVDS Output Option (2.5/3.3 V) (RTERM = 100 diff)3 LVDS Output Option (1.8 V) (RTERM = 100 diff)3 HCSL Output Option3 CMOS Output Voltage3 SSTL Output Voltage4 Powerup Time Condition LVPECL/LVDS HCSL/Differential SSTL Differential CMOS, 15 pF, >80 MHz Mid-level Min -- -- -- VDD - 1.5 Typ -- -- 1.1 -- Max 460 800 1.6 VDD - 1.34 Units ps ps ns V Diff swing .720 -- .880 VPK Mid-level -- N/A -- V Diff swing .68 -- .95 VPK Mid-level Diff swing Mid-level Diff swing Mid-level Diff swing DC termination per pad VOH, sourcing 9 mA VOL, sinking 9 mA 1.15 0.25 0.85 0.25 0.35 0.65 45 VDD - 0.6 -- -- -- -- -- -- -- -- -- -- V VPK V VPK V VPK V V SSTL-18 .5 x VDD + 0.375 -- SSTL-2 SSTL-3 From time VDD crosses min spec supply .5 x VDD + 0.48 .45 x VDD + 0.48 -- -- 1.26 0.45 0.96 0.45 0.425 0.82 55 -- 0.6 .5 x VDD - 0.375 .5 x VDD - 0.48 .45 VDD - 0.48 -- -- 2 ms -- -- 250 + 3 x TCLK ns -- -- 250 + 3 x TCLK ns -- -- -- -- 12 + 3 x TCLK 2 Non-CMOS -- 1 2 CMOS, CL = 7 pF -- 1 3 -- 0.6 1 -- 0.7 1.5 s ms ps RMS ps RMS ps RMS ps RMS OE Deassertion to Clk Stop Return from Output Driver Stopped Mode Return From Tri-State Time Return From Powerdown Time Period Jitter (1-sigma) Integrated Phase Jitter 1.0 MHz - min(20 MHz, 0.4 x FOUT),non-CMOS 1.0 MHz - min(20 MHz, 0.4 x FOUT),CMOS format V V V Notes: 1. Inclusive of 25 C initial frequency accuracy, operating temperature range, supply voltage change, output load change, first-year aging at 25 C, shock, vibration, and one solder reflow. 2. Inclusive of 25 C initial frequency accuracy, operating temperature range, supply voltage change, output load change, ten-year aging at 85 C, shock, vibration, and one solder reflow. 3. See "AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators" for further details regarding output clock termination recommendations. 4. Min column entries are minima of VOH. Max column entries are maxima of VOL. 2 Rev. 0.3 Si500D Package Specifications Table 1. Package Diagram Dimensions (mm) Dimension A A1 b D Min 0.80 0.00 0.59 3.20 BSC. e Nom 0.85 0.03 0.64 Dimension L1 aaa bbb ccc Min 0.00 -- -- -- Nom 0.05 -- -- -- Max 0.10 0.10 0.10 0.08 1.27 BSC. ddd -- -- 0.10 E 4.00 BSC. eee -- -- 0.05 L 0.95 1.00 Max 0.90 0.05 0.69 1.05 Table 2. Pad Connections Table 3. Tri-State/Powerdown/Driver Stopped Function on OE (3rd Option Code) 1 OE 2 NC--Make no external connection to this pin 3 GND 4 Output 5 Complementary Output 6 VDD Dimension C1 E X1 Y1 A B C Open Active Active Active D E F Active Active Active 1 TriActive State Level Powerdown Active Driver Stopped Active 0 TriPowerDriver Active Active down Stopped Level State Active 0 C CC CC T TTT TT (mm) 2.70 1.27 0.75 1.55 Y Y WW 0 = Si500 CCCCC = mark code TTTTTT = assembly manufacturing code YY = year WW = work week Figure 2. Top Mark Figure 1. Recommended Land Pattern Rev. 0.3 3 Si500D Environmental Compliance Parameter Conditions/Test Method Mechanical Shock MIL-STD-883, Method 2002.4 Mechanical Vibration MIL-STD-883, Method 2007.3 A Resistance to Soldering Heat MIL-STD-202, 260 C for 8 seconds Solderability MIL-STD-883, Method 2003.8 Damp Heat IEC 68-2-3 Moisture Sensitivity Level J-STD-020, MSL 3 Ordering Information The Si500D supports a variety of options including frequency, output format, supply voltage, and tristate/powerdown. Specific device configurations are programmed into the Si500D at time of shipment. Configurations are specified using the figure below. Silicon Labs provides a web-based part number utility that can be used to simplify part number configuration. Refer to www.silabs.com/SiliconXOPartnumber to access this tool. The Si500D XO series is supplied in a ROHS-compliant, Pb-free, 6-pad, 3.2 x 4.0 mm package. Tape and reel packaging is available as an ordering option. 500D X Si500 Differential Oscillator 1st Option Code A B C D E F G H J K L M N P Q R S T U V W X 4 VDD Format 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 1.8 1.8 1.8 1.8 1.8 1.8 LVPECL Low Power LVPECL LVDS HCSL Dual Output CMOS Differential CMOS Dual Output SSTL Differential SSTL LVPECL Low Power LVPECL LVDS HCSL Dual Output CMOS Differential CMOS Dual Output SSTL Differential SSTL LVDS HCSL Dual Output CMOS Differential CMOS Dual Output SSTL Differential SSTL X X XXMXXXX A C X R Frequency R = Tape & Reel Blank = Tubes xMxxxxx: fOUT < 10 MHz xxMxxxx: 10 MHz < fOUT < 100 MHz xxxMxxx: fOUT > 100 MHz 3rd Option Code Tri-State/Powerdown/ Output Driver Stopped OE active high/tristate A OE active low/tristate B OE active high/powerdown C OE active low/powerdown D OE active high/driver stopped E OE active low/driver stopped F 2nd Option Code A B Stability (ppm, max) 150 250 Rev. 0.3 Oper. Temp Range F 0 to 70 C H 0 to 85 C Product Revision = C Package A 3.2 x 4.0 mm SMD Si500D DOCUMENT CHANGE LIST Revision 0.2 to Revision 0.3 Revision B to Revision C updated in Ordering Information 0 to 85 C Operating Temperature Range option added Rev. 0.3 5 Si500D CONTACT INFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. 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Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. 6 Rev. 0.3