5.7 kV rms, Signal Isolated,
Basic CAN FD Transceiver
Enhanced Product
ADM3050E-EP
Rev. 0 Document Feedback
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FEATURES
5.7 kV rms signal isolated CAN FD transceiver
1.7 V to 5.5 V supply and logic side levels
4.5 V to 5.5 V supply on bus side
ISO 11898-2:2016-compliant CAN FD
Data rates up to 12 Mbps for CAN FD
Low maximum loop propagation delay: 145 ns
Extended common-mode range (VCANx): ±25 V
Bus fault protection (CANH, CANL): ±40 V
Passes EN 55022, Class B by 6 dB
Safety and regulatory approvals
VDE certificate of conformity, VDE V 0884-10 (pending)
UL: 5700 V rms for 1-minute duration per UL 1577 (pending)
CSA component acceptance 5A at 5.7 kV rms
IEC 60950, IEC 61010 (pending)
High CMTI: >75 kV/µs
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC standard)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available on request
APPLICATIONS
CANOpen, DeviceNet, and other CAN bus implementations
Industrial automation
Military and aerospace (MILA) avionics for sensors,
actuators, and engine control
FUNCTIONAL BLOCK DIAGRAM
DOMINANT
TIMEOUT
CAN
TRANSCEIVER
CANH
CANL
RXD
TXD
GND
2
GND
1
ADM3050E-EP
THERMAL
SHUTDOWN
DIGITAL ISOLATOR
V
DD1
V
DD2
17317-001
Figure 1.
GENERAL DESCRIPTION
The ADM3050E-EP is a 5.7 kV rms isolated controller area
network (CAN) physical layer transceiver with a high
performance, basic feature set. The ADM3050E-EP fully meets
the CAN flexible data rate (CAN FD) ISO 11898-2:2016
requirements and is further capable of supporting data rates as
high as 12 Mbps.
The device employs Analog Devices, Inc., iCoupler® technology
to combine a 2-channel isolator and a CAN transceiver into a
single small outline integrated circuit (SOIC) surface-mount
package. The ADM3050E-EP is a fully isolated solution for CAN
and CAN FD applications. The ADM3050E-EP provides
isolation between the CAN controller and physical layer bus.
Safety and regulatory approvals (pending) for a 5.7 kV rms
withstand voltage, an 849 VPEAK working voltage, and a 12.8 kV
surge test, ensure that the ADM3050E-EP meets application
isolation requirements.
Low loop propagation delays and the extended common-mode
range of ±25 V support robust communication on longer bus
cables. Dominant timeout functionality protects against bus
lock up in a fault condition, and current limiting and thermal
shutdown features protect against output short circuits. The
CAN bus input and output pins are protected to ±40 V against
accidental connection to a +24 V bus supply. The device is fully
specified over the −55°C to +125°C industrial temperature range.
Additional application and technical information can be found
in the ADM3050E data sheet.
ADM3050E-EP Enhanced Product
Rev. 0 | Page 2 of 13
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 5
Insulation and Safety Related Specifications ............................ 6
Package Characteristics ............................................................... 6
Regulatory Information ............................................................... 6
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics (Pending) .............................................................7
Absolute Maximum Ratings ............................................................8
Thermal Resistance .......................................................................8
ESD Caution...................................................................................8
Pin Configuration and Function Descriptions ..............................9
Operational Truth Table ...............................................................9
Typical Performance Characteristics ........................................... 10
Test Circuits ..................................................................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
2/2019—Revision 0: Initial Version
Enhanced Product ADM3050E-EP
Rev. 0 | Page 3 of 13
SPECIFICATIONS
All voltages are relative to their respective ground, 1.7 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −55°C ≤ TA ≤ +125°C, unless otherwise
noted. Typical specifications are at VDD1 = VDD2 = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
SUPPLY CURRENT
Bus Side IDD2
Recessive State 5.3 7 mA TXD high, load resistance (RL) = 60 Ω
Dominant State 63 75 mA Limited by transmit dominant timeout
(tDT), RL = 60 Ω
73 mA Limited by tDT, RL = 60 Ω, 4.75 V ≤ VDD2 ≤
5.25 V
70% Dominant/30% Recessive Worst case, RL = 60 Ω
1 Mbps 45 58 mA
5 Mbps 49 60 mA
12 Mbps 58 65 mA
Logic Side
i
Coupler Current
I
DD1
5.5
TXD high, low, or switching
DRIVER
Differential Outputs See Figure 18
Recessive State Voltage
TXD high, R
L
, and common-mode filter
capacitor (CF) open
CANH, CANL VCANL, VCANH 2.0 3.0 V
Differential Output VOD −500 +50 mV
Dominant State Voltage TXD low, CF open
CANH VCANH 2.75 4.5 V 50 Ω ≤ RL ≤ 65 Ω
CANL
V
CANL
0.5
2.0
50 Ω ≤ R
L
≤ 65 Ω
Differential Output VOD 1.5 3.0 V 50 Ω ≤ RL ≤ 65 Ω
1.4 3.3 V 45 Ω ≤ RL ≤ 70
1.5 5.0 V RL = 2240 Ω
Output Symmetry (VDD2 − VCANH to VCANL) VSYM −0.55 +0.55 V RL = 60 Ω, CF = 4.7 nF
Short-Circuit Current |ISC| RL open
Absolute
CANH 115 mA VCANH = −3 V
CANL 115 mA VCANL = 18 V
Steady State
CANH 115 mA VCANH = −24 V
CANL
115
V
CANL
= 24 V
Logic Input TXD
Input Voltage
High VIH 0.65 × VDD1 V
Low VIL 0.35 × VDD1 V
Complementary Metal-Oxide
Semiconductor (CMOS) Logic Input
Currents
|IIH|, |IIL| 10 µA Input high or low
RECEIVER
Differential Inputs
Differential Input Voltage Range VID See Figure 19, RXD capacitance (CRXD)
open, −25 V < VCANL, VCANH < +25 V
Recessive −1.0 +0.5 V
Dominant 0.9 5.0 V
Input Voltage Hysteresis
V
HYS
150
Unpowered Input Leakage Current |IIN (OFF)| 10 µA VCANH, VCANL = 5 V, VDD2 = 0 V
ADM3050E-EP Enhanced Product
Rev. 0 | Page 4 of 13
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Input Resistance
CANH, CANL RINH, RINL 6 25 kΩ
Differential RDIFF 20 100 kΩ
Input Resistance Matching mR −0.03 +0.03 mR = 2 × (RINH − RINL)/(RINH + RINL)
CANH, CANL Input Capacitance
C
INH
, C
INL
35
Differential Input Capacitance CDIFF 12 pF
Logic Output (RXD)
Output Voltage
Low VOL 0.2 0.4 V Output impedance (IOUT) = 2 mA
High VOH VDD1 − 0.2 V IOUT = −2 mA
Short-Circuit Current
I
OS
7
85
Output voltage (V
OUT
) = GND
1
or V
DD1
COMMON-MODE TRANSIENT IMMUNITY
(CMTI)1
Common-mode voltage (VCM) ≥ 1 kV,
transient magnitude ≥ 800 V
Input High, Recessive |CMH| 75 100 kV/µs Input voltage (VIN) = VDD1 (TXD) or
CANH/CANL recessive
Input Low, Dominant |CML| 75 100 kV/µs VIN = 0 V (TXD) or CANH/CANL dominant
1 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining CANH/CANL recessive or RXD ≥ VDD1 − 0.2 V. |CML| is the maximum
common-mode voltage slew rate that can be sustained while maintaining CANH/CANL dominant or RXD ≤ 0.4 V. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Enhanced Product ADM3050E-EP
Rev. 0 | Page 5 of 13
TIMING SPECIFICATIONS
All voltages are relative to their respective ground, 1.7 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −55°C ≤ TA ≤ +125°C, unless otherwise
noted. Typical specifications are at VDD1 = VDD2 = 5 V and TA = 25°C, unless otherwise noted. See the ADM3050E data sheet for
information about tBIT_BUS.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER See Figure 2 and Figure 18,
tBIT_TXD = 200 ns, RL = 60 Ω,
CL = 100 pF
Maximum Data Rate 12 Mbps
Propagation Delay from TXD to Bus (Recessive to Dominant) tTXD_DOM 35 60 ns
Propagation Delay from TXD to Bus (Dominant to Recessive) tTXD_REC 45 70 ns
Transmit Dominant Timeout tDT 1175 4000 µs TXD low, see Figure 3
RECEIVER See Figure 2 and Figure 20,
tBIT_TXD = 200 ns, RL = 60 Ω,
CL = 100 pF, CRXD = 15 pF
Falling Edge Loop Propagation Delay (TXD to RXD) tLOOP_FALL 145 ns
Rising Edge Loop Propagation Delay (TXD to RXD)
t
LOOP_RISE
145
ns
Loop Delay Symmetry (Minimum Recessive Bit Width) tBIT_RXD
2 Mbps 450 550 ns tBIT_TXD = 500 ns
5 Mbps 160 220 ns tBIT_TXD = 200 ns
8 Mbps 85 140 ns tBIT_TXD = 125 ns
12 Mbps 50 91.6 ns tBIT_TXD = 83.3 ns
Timing Diagrams
TXD 0.3VDD1 0.3VDD1
0.3VDD1
0.7VDD1
0.5V 0.9V
VDD1
VDD1
0V
0V
5 × tBIT_TXD
tTXD_REC tTXD_DOM
tBIT_BUS
tBIT_RXD
tBIT_TXD tLOOP_FALL
tLOOP_RISE
RXD
VOD/VID
17317-002
0.7VDD1
Figure 2. Transceiver Timing Diagram
TXD
V
OD
t
DT
17317-103
Figure 3. Dominant Timeout, tDT
ADM3050E-EP Enhanced Product
Rev. 0 | Page 6 of 13
INSULATION AND SAFETY RELATED SPECIFICATIONS
For additional information, see www.analog.com/icouplersafety.
Table 3.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 5700 V rms 1-minute duration
Minimum External Air Gap (Clearance) L (I01) 7.8 mm min Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L (I02) 7.8 mm min Measured from input terminals to output terminals,
shortest distance path along body
Minimum Clearance in the Plane of the Printed
Circuit Board (PCB) Clearance
L (PCB)
8.3
mm min
Measured from input terminals to output terminals,
shortest distance through air, line of sight, in the PCB
mounting plane
Minimum Internal Gap (Internal Clearance) 25.5 µm min Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >600 V DIN IEC 112/VDE 0303 Part 1
Material Group I Material group (DIN VDE 0110, 1/89, Table 1)
PACKAGE CHARACTERISTICS
Table 4.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input to Output)1 RI-O 1013 Ω
Capacitance (Input to Output)1 CI-O 1.1 pF f = 1 MHz
Input Capacitance2 CI 4.0 pF
1 The device is considered a two-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
See Table 9 and the ADM3050E data sheet for the recommended maximum working voltages for specific cross isolation waveforms and
insulation levels. The ADM3050E-EP is pending approval or approved by the organizations listed in Table 5.
Table 5.
UL (Pending) CSA (Pending) VDE (Pending) CQC (Pending)
UL1577 Component
Recognition Program1
Approved under CSA Component
Acceptance Notice 5A
DIN V VDE V 0884-10
(VDE V 0884-10):2006-122
Certified under CQC11-
471543-2012
Single Protection, 5700 V rms
Isolation Voltage
CSA 60950-1-07+A1+A2 and
IEC 60950-1, second edition, +A1+A2:
Reinforced insulation,
849 VPEAK, VIOTM = 8 kVPEAK
GB4943.1-2011
Basic insulation at 780 V rms (1103 VPEAK) Basic insulation at 780 V rms
(1103 VPEAK)
Reinforced insulation at 390 V rms (552 VPEAK) Reinforced insulation at
390 V rms (552 VPEAK)
IEC 60601-1 Edition 3.1:
Basic insulation (1 MOPP), 490 V rms
(686 VPEAK)
Reinforced insulation (2 MOPP), 238 V rms
(325 VPEAK)
CSA 61010-1-12 and IEC 61010-1 third edition:
Basic insulation at: 300 V rms mains, 780 V
secondary (1103 VPEAK)
Reinforced insulation at: 300 V rms mains,
390 V secondary (552 VPEAK)
File E214100 File 205078 File 2471900-4880-0001 File (pending)
1 In accordance with UL 1577, each ADM3050E-EP is proof tested by applying an insulation test voltage ≥ 6840 V rms for 1 sec.
2 In accordance with DIN V VDE V 0884-10, each ADM3050E-EP is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit =
5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.
Enhanced Product ADM3050E-EP
Rev. 0 | Page 7 of 13
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS (PENDING)
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Protective circuits ensure the maintenance
of the safety data.
Table 6.
Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to IV
For Rated Mains Voltage ≤ 600 V rms I to IV
Climatic Classification
40/125/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage
Reinforced VIORM 849 VPEAK
Basic, DC Working Voltage See the Absolute Maximum Ratings section and Table 9 for
the maximum continuous working voltage for ac bipolar,
ac unipolar, and dc voltages, basic and reinforced insulation,
and 50 year lifetime to 1% failure
VIORM(DC) 1500 VDC
Input to Output Test Voltage, Method B1 VIORM × 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec,
partial discharge < 5 pC
Vpd (m) 1592 VPEAK
Input to Output Test Voltage, Method A Vpd (m)
After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
1274 VPEAK
After Input and/or Safety Test
Subgroup 2 and Subgroup 3
VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
1019 VPEAK
Highest Allowable Overvoltage VIOTM 8000 VPEAK
Impulse 1.2 µs rise time, 50 µs, 50% fall time in air to the preferred
sequence
VIMPULSE 8000 VPEAK
Surge Isolation Voltage VPEAK
Basic VPEAK = 12.8 kV, 1.2 µs rise time, 50 µs, and 50% fall time VIOSM 12000 VPEAK
Reinforced VPEAK = 12.8 kV, 1.2 µs rise time, 50 µs, and 50% fall time VIOSM 8000 VPEAK
Safety Limiting Values Maximum value allowed in the event of a failure (see Figure 4)
Maximum Junction Temperature TS 150 °C
Total Power Dissipation at 25°C PS 2.08 W
Insulation Resistance at TS Test voltage = 500 V RS >109 Ω
0
0.5
1.0
1.5
2.0
2.5
050 100 150 200
SAFE LIMITING POWER (W)
AMBIENT TEMPERATURE ( °C)
14971-104
Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values with Ambient Temperature per DIN V VDE V 0884-10 (See the Thermal Resistance Section for
Additional Information)
ADM3050E-EP Enhanced Product
Rev. 0 | Page 8 of 13
ABSOLUTE MAXIMUM RATINGS
Pin voltages with respect to GND1/GND2 are on same side,
unless otherwise noted.
Table 7.
Parameter Rating
V
DD1
/V
DD2
−0.5 V to +6 V
Logic Side Input and Output: TXD, RXD −0.5 V to VDD1 + 0.5 V
CANH, CANL −40 V to +40 V
Operating Temperature Range −55°C to +125°C
Storage Temperature Range −65°C to +150°C
Maximum Junction Temperature (TJ) 150°C
Electrostatic Discharge (ESD),
IEC 61000-4-2, CANH/CANL
Across Isolation Barrier with Respect
to GND1
±8 kV
Contact Discharge with Respect to
GND2
±8 kV typical
Air Discharge with Respect to GND2 ±15 kV
Human Body Model (HBM), All Pins,
1.5 kΩ, 100 pF
±4 kV
Moisture Sensitivity Level (MSL) MSL3
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to PCB design and
operating environment. Careful attention to PCB thermal
design is required.
The thermal resistance value specified in Table 8 is simulated
based on JEDEC specifications (unless specified otherwise) and
must be used in compliance with JESD51-12.
Table 8. Thermal Resistance
Package Type θJA Unit
RW-161 60 °C/W
1 The θJA value is based on simulations of a devices mounted on a JEDEC
standard, 4-layer board with fine width traces and still air. See the
ADM3050E data sheet for the thermal model definitions.
ESD CAUTION
Table 9. Maximum Continuous Working Voltage1
Parameter Insulation Rating (20-Year Lifetime)2 VDE 0884-11 Lifetime Conditions Fulfilled
AC Voltage
Bipolar Waveform
Basic Insulation 849 VPEAK Lifetime limited by insulation lifetime per VDE-0884-11
Reinforced Insulation
707 V
PEAK
Lifetime limited by insulation lifetime per VDE-0884-11
Unipolar Waveform
Basic Insulation 1697 VPEAK Lifetime limited by insulation lifetime per VDE-0884-11
Reinforced Insulation 1275 VPEAK Lifetime limited by package creepage per IEC 60664-1
DC Voltage
Basic Insulation 1560 VPEAK Lifetime limited by package creepage per IEC 60664-1
Reinforced Insulation
780 V
PEAK
Lifetime limited by package creepage per IEC 60664-1
1 The maximum continuous working voltage refers to the continuous voltage magnitude imposed across the isolation barrier. See the ADM3050E data sheet for more
details.
2 Insulation capability without regard to creepage limitations. Working voltage may be limited by the PCB creepage when considering rms voltages for components
soldered to a PCB (assumes Material Group I up to 1250 V rms), or by the SOIC_W package creepage of 7.8 mm, when considering rms voltages for Material Group II.
Enhanced Product ADM3050E-EP
Rev. 0 | Page 9 of 13
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADM3050E-EP
TOP VIEW
(No t t o Scal e)
16
9
10
11
12
13
14
15
1
8
7
6
5
4
3
2
V
DD1
GND
1
GND
1
TXD
NC
NC
RXD
GND
1
V
DD2
GND
2
GND
2
NC
CANL
CANH
NC
GND
2
NOTES
1. NC = NO CO NNE CT. NO I NTERNAL CO NNE CTION T O I C.
17317-004
Figure 5. Pin Configuration
Table 10. Pin Function Descriptions
Pin No. Mnemonic Description
1
V
DD1
Power Supply, Logic Side, 1.7 V to 5.5 V. This pin requires a 0.1 µF decoupling capacitor.
2, 7, 8 GND1 Ground, Logic Side.
3 RXD Receiver Output Data.
4, 5, 11, 14 NC No Connect. No internal connection to IC.
6 TXD Driver Input Data.
9, 10, 15 GND2 Ground, Bus Side.
12
CANL
CAN Low Input and Output.
13 CANH CAN High Input and Output.
16 VDD2 Power Supply, Bus Side, 4.5 V to 5.5 V. This pin requires a 0.1 µF decoupling capacitor.
OPERATIONAL TRUTH TABLE
Table 11. Truth Table
VDD1 VDD2 TXD Mode RXD CANH/CANL
On On Low Normal Low Dominant (limited by tDT)
On On High Normal High per bus Recessive and set by bus
Off On Don’t care Normal Indeterminate Recessive and set by bus
On Off Don’t care Transceiver off High High-Z
ADM3050E-EP Enhanced Product
Rev. 0 | Page 10 of 13
TYPICAL PERFORMANCE CHARACTERISTICS
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
012345678910 11 12 13 14 15
SUPPLY CURRENT, I
DD1
(mA)
DATA RATE (Mbps)
V
DD1
= 1.8V
V
DD1
= 2.5V
V
DD1
= 3.3V
V
DD1
= 5.0V
17317-106
Figure 6. Supply Current (IDD1) vs. Data Rate
25
30
35
40
45
50
55
60
0 1 234 5 67 8 9 10 11 12 13 14 15
SUPPLY CURRENT, I
DD2
(mA)
DATA RATE (Mbps)
V
DD2
= 4.5V
V
DD2
= 5V
V
DD2
= 5.5V
17317-107
Figure 7. Supply Current (IDD2) vs. Data Rate
80
90
100
110
120
130
140
150
160
170
180
–55 –35 –15 525 45 65 85 105 125
RECEIVER INPUT HYSTERESIS (mV)
TEMPERATURE (°C)
17317-108
Figure 8. Receiver Input Hysteresis vs. Temperature
27
29
31
33
35
37
39
41
43
45
–55 –35 –15 525
45 65 85 105 125
t
TXD_DOM
(n s)
TEMPERATURE (°C)
V
DD1
= 5.0V
V
DD1
= 3.3V
V
DD1
= 2.5V
V
DD1
= 1.8V
17317-109
Figure 9. tTXD_DOM vs. Temperature
–55 –35 –15 525 45 65 85 105 125
TEMPERATURE (°C)
39
41
43
45
47
49
51
53
t
TXD_REC
(n s)
V
DD1
= 1.8V
V
DD1
= 2.5V
V
DD1
= 3.3V
V
DD1
= 5.0V
17317-110
Figure 10. tTXD_REC vs. Temperature
–55 –35 –15 525 45 65 85 105 125
TEMPERATURE (°C)
t
LOOP_RISE (ns)
100
105
110
115
120
125
130
135
VDD1 = 1. 8V
VDD1 = 2. 5V
V
DD1
= 3.3V
V
DD1
= 5.0V
17317-111
Figure 11. tLOOP_RISE vs. Temperature
Enhanced Product ADM3050E-EP
Rev. 0 | Page 11 of 13
–55 –35 –15 525 45 65 85 105 125
TEMPERATURE (°C)
t
LOOP_FALL (n s)
100
105
110
115
120
125
VDD1 = 1. 8V
VDD1 = 2. 5V
VDD1 = 3. 3V
VDD1 = 5. 0V
17317-112
Figure 12. tLOOP_FALL vs. Temperature
2.14
2.16
2.18
2.20
2.22
2.24
2.26
2.28
2.30
2.32
2.34
–55 –5 45 95
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
17317-113
Figure 13. Differential Output Voltage vs. Temperature, RL = 60 Ω
1.5
1.7
1.9
2.1
2.3
2.5
2.7
4.5 4.7 4.9 5.1 5.3 5.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
SUPPLY VOLTAGE, V
DD2
(V)
17317-114
Figure 14. Differential Output Voltage vs. Supply Voltage (VDD2), RL = 60 Ω
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
–55 –35 –15 525 45 65 85 105 125
SUPPLY CURRENT, IDD1 ( mA)
TEMPERATURE (°C)
VDD1 = 1. 8V
VDD1 = 2. 5V
VDD1 = 3. 3V
VDD1 = 5. 0V
17317-115
Figure 15. Supply Current (IDD1) vs. Temperature
–55 –35 –15 525 45 65 85 105 125
TEMPERATURE (°C)
32.5
33.0
33.5
34.0
34.5
35.0
35.5
36.0
SUPPLY CURRENT, IDD2 ( mA)
17317-116
Figure 16. Supply Current (IDD2) vs. Temperature
2100
2200
2300
2400
2500
2600
2700
2800
2900
–55 –35 –15 525 45 65 85 105 125
DOMINANT TIMEOUT,
t
DT ( µs)
TEMPERATURE (°C)
17317-117
Figure 17. Dominant Timeout (tDT) vs. Temperature
ADM3050E-EP Enhanced Product
Rev. 0 | Page 12 of 13
TEST CIRCUITS
TXD
CF
GND1GND2
VOD VCANH
VCANL
RL
RL
2
2
17317-005
Figure 18. Driver Voltage Measurement
C
RXD
RXD
GND
1
GND
2
CANH
CANL
V
ID
17317-006
Figure 19. Receiver Voltage Measurement
C
RXD
RXD
GND
1
GND
2
TXD CANH
R
L
C
L
CANL
NOTES
1. 1% T OL E RANCE FO R ALL RE S ISTO RS AND CAP ACITORS.
17317-007
Figure 20. Switching Characteristics Measurements
R
DIFF
C
DIFF
GND
2
CANH
CANL
17317-008
Figure 21. RDIFF and CDIFF Measured in Recessive State, Bus Disconnected
RINH CINH
RINL CINL
GND2
CANH
CANL
17317-009
Figure 22. Input Resistance (RINx) and Input Capacitance (CINx) Measured in
Recessive State, Bus Disconnected
Enhanced Product ADM3050E-EP
Rev. 0 | Page 13 of 13
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-013-AA
10.50 (0.4134)
10.10 (0.3976)
0.30(0.0118)
0.10 (0.0039)
2.65 (0.1043)
2.35 (0.0925)
10.65 (0.4193)
10.00(0.3937)
7.60 (0.2992)
7.40 (0.2913)
0.75(0.0295)
0.25(0.0098)
45°
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10 0.33 (0.0130)
0.20 (0.0079)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
8°
0°
169
8
1
1.27 (0.0500)
BSC
03-27-2007-B
Figure 23. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
ADM3050ETRWZ-EP −55°C to +125°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
ADM3050ETRWZ-EP-RL −55°C to +125°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
EVAL-ADM3050EEBZ
Evaluation Board
1 Z = RoHS Compliant Part.
©2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D17317-0-2/19(0)