Page 1 of 11
Document No. 70-0177-04 www. pse mi.com ©2005 Peregrine Semiconductor Corp. All rights reserved.
Parameter Conditions Typical Units
Operation Frequency1 DC - 4000 MHz
Inser t io n Los s 1000 MH z
2500 MH z 0.65
0.70 dB
dB
Isolation: RFC - RF1/RF2 1000 MH z
2500 MH z 33.5
21.5 dB
dB
Isolation: RF1 - RF2 1000 MH z
2500 MH z 37.5
22 dB
dB
‘ON’ Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 0.725 µs
‘OFF’ Switching Time 50% CTRL to 25 dB isolation, 1 GHz 0.625 µs
Inp ut 1 dB C o mpress io n 1000 MH z +32 dB m
Inp ut IP 3 1000 MH z , 20 dBm in p ut power +53 dB m
Min
DC
31.5
19.5
35.5
20
30
Max
4000
0.75
0.80
1.5
1.3
Return Loss 1000 MH z
2500 MH z 19
16 dB
dB
RFC
RF1 RF2
CMOS
Control
Driver
V1 V2
The PE 42 83 RF Swi tch is des ign ed to c ov er a bro ad r an ge
of applications from DC through 4000 MHz. This reflective
switch integrates on-board CMOS control logic with a low
voltage CMOS-compatible control interface, and can be
controlled using either single-pin or comp lementary control
inpu ts . The PE4 283 operates us i ng a +3 volt power suppl y.
The PE4283 SPDT High Power RF Switch is manufactured
on Peregrine’s UltraCMOS™ process, a patented variation
of silicon -on-insulator (SOI) technology on a sapphire
substrate, offering th e per f or m ance of GaAs wi th the
eco nom y an d in te gr ation of conv e nti o nal CMOS.
Pro duct Specificat ion
SPDT High Power UltraCMOS
DC – 4.0 GHz RF Switch
Product Description
Figure 1. Functional Diagram
PE4283
Features
Single-pin or complementary CMOS
logic control inputs
1.5 kV ESD toleranc e
Low insertion loss: 0.65 dB at
1000 MHz, 0.70 dB at 2500 MHz
RF C- R F 1/RF 2 isolation of 33.5 dB at
1000 MHz, 21.5 dB at 2500 MHz
RF 1-R F 2 isolation of 37.5 dB at
1000 MHz, 22 dB at 2500 MHz
Typical input 1 dB compression point
of +3 2 dBm
Ultra -s mall SC-70 package
Note: 1. Devi ce linearity wil l begin to degrade belo w 10 MHz.
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = Z L = 50 )
Fig ure 2. Package Typ e SC- 7 0
6-lead SC-70
Product Specification
PE4283
Page 2 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 UltraCMOS™ RFIC Solutions
Table 2 . Pin Descriptions
Electrostatic Discharge (ESD) Precautions
When hand ling this UltraCMOS ™ devi ce, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latc h-Up Avoidance
Unlike conventional CMO S device s, UltraCMOS™
devices are immune to latch-up.
Table 4. DC Electrical Specifications Figure 3. Pin Configuration (Top View)
1
2
3 4
5
6V2
RFC
V1
RF1
GND
RF2
283
pin 1
Pin
No. Pin
Name Description
1 RF1
RF Port12
2 GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
3 RF2
RF Port22
4 V1 Sw itch control inpu t, CMOS logic le ve l.
5 RFC
RF Common2
6 V2
This pin su pp or ts tw o int er f ac e op t i ons :
Single-pin control mode. A no mi na l 3- v ol t
supply connection is required.
Complementary-pin control mode. A
complementary CM O S control si gnal
to V1 is supplied to this pin.
Parameter Min Typ Max Units
VDD Power Supply Voltage 2.0 3.0 3.3 V
IDD Power Supply Current
(V1 = 3V, V2 = 3V) 8 50 µA
Control Voltage High 0.7x VDD V
Control Voltage Low 0.3x VDD V
Note: 2. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any input -0.3 VDD+
0.3 V
TST Storage temperature
range -65 150 °C
TOP Operating temperature
range -40 85 °C
PIN Input po wer ( 5 0) +34 dBm
VESD
ESD Voltage (HBM,
M L_STD 883 Method
3015.7) 1500 V
ESD Voltage (MM,
JEDEC, JESD22- A114-B) 100 V
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may c aus e permanent dev i ce damag e.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposu re t o ab solut e maximu m rat i ngs for
exten de d perio ds may affect device reliab ility.
Figure 4. Maximum Operating Input Power3
Note: 3. Operating within DC limits (Table 4).
Product Specification
PE4283
Page 3 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 www. pse mi.com
Control Voltages Signal Path
Pin 6 (V2) = VDD
Pin 4 (V1) = High RFC to RF1
Pin 6 (V2) = VDD
Pin 4 (V1) = Low RFC to RF2
Table 5. Single-pin Control Logic Truth Table
Table 6. Complementary-pin Control Logic
Truth Table
Control Voltages Signal Path
Pin 6 (V2 ) = Low
Pin 4 (V1) = High RFC to RF1
Pin 6 (V2) = High
Pin 4 (V1) = Low RFC to RF2
Control Logic Input
The PE4283 is a versatile RF CMOS switch that
supports two operating control modes; single-pin
control mode and complementary-pin control
mode.
Single-pin c o ntr ol m od e enables the switch to
operate with a single control pin (pin 4) supporting
a +3-volt CMOS logic input, and requires a
dedicated +3-volt power supply connection (pin 6).
Thi s mo de of op er ation red uce s the number of
control lines required and simplifies the switch
control interface typically derived from a CMOS
µProcessor I/O port.
Complementary-pin control mode allows the
switch to operate using complementary control
pins V1 and V2 ( pi ns 4 & 6), that can be di r ectl y
driven by +3-volt CMOS logic or a suitable
µProcessor I/O port. This enables the PE4283 to
operate in positive control voltage mode within the
PE4283 operating li m i ts.
Product Specification
PE4283
Page 4 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 UltraCMOS™ RFIC Solutions
Evaluation Kit
The SPD T swi t c h EK Bo ar d was designed to ease
customer evaluation of Peregrine’s PE4283. The
RF commo n (RFC) port is connecte d through a
50 transmission line via the top SMA connector,
J1. RF1 and RF2 are connected through 50
transmission lines via SMA connectors J2 and J3,
respectively. A through 50 transmission is
available via SMA connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0021” and r of 4.4.
J6 and J7 provide a means for contro lling DC and
digital inputs to the device. J6-1 is connected to
the device V2 input. J7-1 is connected to the
device V1 input. Series resistors (R1 and R2 ) are
provided to re duce the package resonance
between RF and DC lines.
Figure 5. Evaluation Board Layouts
Figure 6. Evaluation Board Sche mati c
Peregr ine S pec ificat ion 102/0322
Peregr ine S pec ificat ion 101/0162
Product Specification
PE4283
Page 5 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 www. pse mi.com
Figure 8. Insertion Loss @ 3 V Figure 7. Insertion Loss @ 25 °C
Typical Performance Data
Figure 9. Isolation: RF1-RF2 @ 25 °C Figure 10. Isolation: RF1-RF2 @ 3 V
Product Specification
PE4283
Page 6 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 UltraCMOS™ RFIC Solutions
Figure 13. Return Loss: RF1-RF2 @ 25 °C Figure 14. Return Loss: RF1-RF2 @ 3 V
Typical Performance Data
Figure 11. Isolation: RFC-RF1/RF2 @ 25 °C Figure 12. Isolation: RFC-RF1/RF2 @ 3 V
Product Specification
PE4283
Page 7 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 www. pse mi.com
Typical Performance Data
Figure 15. Return Loss: RFC-RF1 @ 25 °C Figure 16. Return Loss RFC-RF1 @ 3 V
Figure 17. Return Loss: RFC-RF2 @ 25 °C Figure 18. Return Loss: RFC-RF2 @ 3 V
Product Specification
PE4283
Page 8 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 UltraCMOS™ RFIC Solutions
Figure 19. Input 1 dB Compressi on and IIP3
Typical Performance Data
Product Specification
PE4283
Page 9 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 www. pse mi.com
1.80
2.20
0.65
BSC
1.80
2.40
1.15
1.35
0.15
0.30
0.80
1.10
0.80
1.00
0.10
0.30
0.10
0.40 0.10
0.18
0.00
0.10
Figure 20. Package Drawing
6-lead SC-70
Product Specification
PE4283
Page 10 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 UltraCMOS™ RFIC Solutions
Table 7. Ordering Information
Or der Code Part Marking Description Package Shipping Method
4283-01 283 PE4283-06SC70-7680A 6-lead SC-70 7680 units / Canister
4283-02 283 PE4283-06SC70-3000C 6-lead SC-70 3000 units / T&R
4283-00 PE4283-EK PE4283-06SC70-EK Evaluation Kit 1 / Box
4283-51 283 PE4283G-06SC70-7680A Green 6-lead SC-70 7680 units / Canister
4283-52 283 PE4283G-06SC70-3000C Green 6-lead SC-70 3000 units / T&R
Figure 21. Tape and Reel Specification s
Pin 1
Tape Feed Direction
Product Specification
PE4283
Page 11 of 11
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0177-04 www. psemi.com
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For a list of represent at ives in your area, please r efer to our Web site at: www.p semi.com
Data Sheet Identification
Advance Information
The product is in a f ormative or design stage. The data
sheet contains design target specif icat ions for product
development. Specif ications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine r eserves the right
to change specifications at any time without notice in order
to supply t he best possible product.
Product Specification
The data sheet contains final data . In the event Peregrine
dec ide s to cha nge the spe c ific a tions, Pereg rine will not ify
cust omers of the intended changes by issuing a DCN
(Document Change Notice).
The information in t his data sheet is believed to be r eliable.
Howeve r, Peregrine assum es no liability f or th e use of this
information. Use shall be entirely at the user’s own r isk.
No patent rights or licenses to any circuits described in this
data sheet are implied or gr anted to any third party.
Peregrine’s pr oducts are not designed or intended for use in
devices or systems intended f or surgical implant, or in other
applications intended t o support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situat ion in which personal injury or death m ight occur.
Peregr ine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS and HaRP are trademarks of Peregrine
Semiconductor Cor p.
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