ESD7002, SZESD7002 ESD Protection Diode Low Capacitance ESD Protection Diode for High Speed Data Line The ESD7002 surge protection device is designed to protect high speed data lines from ESD. Ultra-low capacitance and low ESD clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. The flow-through style package allows for easy PCB layout and matched trace lengths necessary to maintain consistent impedance between high speed differential lines such as USB 3.0 and HDMI. Features * * * * * * * Low Capacitance (0.3 pF Typical, I/O to GND) Diode capacitance matching Protection for the Following IEC Standards: IEC 61000-4-2 (Level 4) Low ESD Clamping Voltage SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable These Devices are Pb-Free and are RoHS Compliant www.onsemi.com MARKING DIAGRAM SC-70 CASE 419 STYLE 4 72 MG G 1 72 = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) PIN CONFIGURATION AND SCHEMATIC Pin 1 Pin 2 Typical Applications * * * * USB2.0/3.0 LVDS HDMI High Speed Differential Pairs Pin 3 MAXIMUM RATINGS (TJ = 25C unless otherwise noted) = Rating Symbol Value Unit Operating Junction Temperature Range TJ -55 to +125 C Storage Temperature Range Tstg -55 to +150 C Lead Solder Temperature - Maximum (10 Seconds) TL 260 C IEC 61000-4-2 Contact (ESD) IEC 61000-4-2 Air (ESD) ESD ESD 8 15 kV kV ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. (c) Semiconductor Components Industries, LLC, 2014 July, 2017 - Rev. 4 1 Publication Order Number: ESD7002/D ESD7002, SZESD7002 ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise specified) Parameter Symbol Conditions VRWM I/O Pin to GND VBR IT = 1 mA, I/O Pin to GND Reverse Leakage Current IR VRWM = 5 V, I/O Pin to GND Clamping Voltage (Note 1) VC IEC61000-4-2, 8 kV Contact See Figures 3 and 4 Clamping Voltage TLP (Note 2) VC IPP = 8 A IPP = 16 A IPP = -8 A IPP = -16 A 31.2 33.9 -5.5 -10.8 Junction Capacitance Match DCJ VR = 0 V, f = 1 MHz between I/O1 to GND and I/O 2 to GND 5 10 % Junction Capacitance CJ VR = 0 V, f = 1 MHz between I/O Pins 0.2 0.4 pF Junction Capacitance CJ VR = 0 V, f = 1 MHz between I/O Pins and GND 0.3 0.5 pF 3dB Bandwidth fBW RL = 50 W 5 Reverse Working Voltage Breakdown Voltage Min Typ 16.5 Max Unit 16 V 23 V mA 1 V GHz 1. For test procedure see Figures 5 and 6 and application note AND8307/D. 2. ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns. 1E-02 1.0 1E-03 0.9 1E-04 0.8 CAPACITANCE (pF) CURRENT (A) 1E-05 1E-06 1E-07 1E-08 1E-09 1E-10 0.7 0.6 0.5 0.4 0.3 1E-11 0.2 1E-12 0.1 1E-13 0 0 4 2 6 8 10 12 14 16 18 20 22 24 0 2 4 VOLTAGE (V) 50 100 150 200 TIME (ns) 10 12 14 Figure 2. Typical CV Characteristic Curve VOLTAGE (V) VOLTAGE (V) 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 -10 0 8 VBias (V) Figure 1. Typical IV Characteristic Curve -50 6 250 300 350 400 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -20 Figure 3. IEC61000-4-2 +8 kV Contact ESD Clamping Voltage 0 20 40 60 80 100 120 140 160 180 200 TIME (ns) Figure 4. IEC61000-4-2 -8 kV Contact ESD Clamping Voltage www.onsemi.com 2 ESD7002, SZESD7002 IEC61000-4-2 Waveform IEC 61000-4-2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 5. IEC61000-4-2 Spec ESD Gun Oscilloscope DUT 50 W Cable 50 W Figure 6. Diagram of ESD Clamping Voltage Test Setup The following is taken from Application Note AND8308/D - Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000-4-2 waveform. Since the IEC61000-4-2 was written as a pass/fail spec for larger www.onsemi.com 3 ESD7002, SZESD7002 -16 14 -14 12 -12 CURRENT (A) -18 16 CURRENT (A) 18 10 8 6 -10 -8 -6 4 -4 2 -2 0 0 0 NOTE: 5 10 15 20 25 30 35 40 0 -2 -4 -6 -8 -10 -12 VOLTAGE (V) VOLTAGE (V) Figure 7. Positive TLP IV Curve Figure 8. Negative TLP IV Curve -14 TLP parameter: Z0 = 50 W, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns. Transmission Line Pulse (TLP) Measurement L Transmission Line Pulse (TLP) provides current versus voltage (I-V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 9. TLP I-V curves of ESD protection devices accurately demonstrate the product's ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 10 where an 8 kV IEC 61000-4-2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I-V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. 50 W Coax Cable S Attenuator / 50 W Coax Cable 10 MW IM VM DUT VC Oscilloscope Figure 9. Simplified Schematic of a Typical TLP System Figure 10. Comparison Between 8 kV IEC 61000-4-2 and 8 A and 16 A TLP Waveforms www.onsemi.com 4 ESD7002, SZESD7002 Without ESD7002 With ESD7002 Figure 11. USB3.0 Eye Diagram with and without ESD7002 at 5 Gb/s 1 0.5 0 S21 (dB) -0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 1.E+06 1.E+07 1.E+08 FREQUENCY (Hz) 1.E+09 Figure 12. Typical Insertion Loss ORDERING INFORMATION Package Shipping ESD7002WTT1G SC-70 (Pb-Free) 3000 / Tape & Reel SZESD7002WTT1G* SC-70 (Pb-Free) 3000 / Tape & Reel Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable. www.onsemi.com 5 ESD7002, SZESD7002 PACKAGE DIMENSIONS SC-70 (SOT-323) CASE 419-04 ISSUE N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. D e1 DIM A A1 A2 b c D E e e1 L HE STYLE 4: PIN 1. 2. 3. 3 E HE 1 2 b e A 0.05 (0.002) c A2 MIN 0.80 0.00 0.30 0.10 1.80 1.15 1.20 0.20 2.00 MILLIMETERS NOM MAX 0.90 1.00 0.05 0.10 0.70 REF 0.35 0.40 0.18 0.25 2.10 2.20 1.24 1.35 1.30 1.40 0.65 BSC 0.38 0.56 2.10 2.40 MIN 0.032 0.000 0.012 0.004 0.071 0.045 0.047 0.008 0.079 INCHES NOM 0.035 0.002 0.028 REF 0.014 0.007 0.083 0.049 0.051 0.026 BSC 0.015 0.083 MAX 0.040 0.004 0.016 0.010 0.087 0.053 0.055 0.022 0.095 CATHODE CATHODE ANODE L A1 SOLDERING FOOTPRINT* 0.65 0.025 0.65 0.025 1.9 0.075 0.9 0.035 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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