1
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
SP706P/R/S/T, SP708R/S/T
■Precision Low Voltage Monitor:
SP706P/R and SP708R at +2.63V
SP706S and SP708S at +2.93V
SP706T and SP708T at +3.08V
■RESET Pulse Width - 200ms
■Independent Watchdog Timer - 1.6 sec
Timeout (SP706P/S/R/T)
■40µA Maximum Supply Current
■Debounced TTL/CMOS Manual-Reset Input
■RESET Asserted Down to VCC = 1V
■RESET Output:
SP706P Active-High
SP706R/S/T Active-Low
SP708R/S/T Both Active High + Active Low
■WDI Can Be Left Floating, Disabling the
Watchdog Function
Now Available in Lead Free Packaging
The SP706P/S/R/T, SP708R/S/T series is a family of microprocessor (µP) supervisory circuits
that integrate myriad components involved in discrete solutions which monitor power-supply and
battery, in µP, and digital systems. The SP706P/S/R/T, SP708R/S/T series will significantly
improve system reliability and operational efficiency when compared to results obtained with
discrete components. The features of the SP706P/S/R/T, SP708R/S/T series include a
watchdog timer, a µP reset, a Power Fail Comparator, and a manual-reset input. The SP706P/
S/R/T, SP708R/S/T series is ideal for +3.0V or +3.3V applications in automotive systems,
computers, controllers, and intelligent instruments. The SP706P/S/R/T, SP708R/S/T series is
an ideal solution for systems in which critical monitoring of the power supply to the µP and related
digital components is demanded.
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S607PS WOLV39.2SEY%4SEY
T607PS WOLV80.3SEY%4SEY
R807PS HGIH/WOLV36.2SEY%4ON
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T807PS HGIH/WOLV80.3SEY%4ON
■Built-In Vcc Glitch Immunity
■Available in 8-pin PDIP, NSOIC, and
µSOIC packages
■Voltage Monitor for Power Failure or Low
Battery Warning
■Pin Compatible Enhancement to Industry
Standards 706P/R/S/T and 708R/S/T
®
+3.0V/+3.3V Low Power Microprocessor
Supervisory Circuits
2
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
SPECIFICATIONS
Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted,
typical at 25°C.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
Terminal Voltage (with respect to GND):
VCC........................................................-0.3V to +6.0V
All Other Inputs ...........................-0.3V to (VCC +3.0V)
Input Current:
VCC.....................................................................20mA
GND...................................................................20mA
Output Current (all outputs)...............................20mA
ESD Rating...........................................................2kV
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Continuous Power Dissipation
Plastic DIP
(derate 9.09mW/OC above +70OC)..................727mW
SO
(derate 5.88mW/OC above +70OC)..................471mW
Mini SO
(derate 4.10mW/OC above +70OC)..................330mW
Storage Temperature Range.............-65˚C to +160˚C
Lead Temperature (solding 10 sec)................+300˚C
Note1: WDI Minimum Rise/Fall time is 1 microsecond.
(Note1)
3
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
SPECIFICATIONS (continued)
Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted,
typical at 25°C.
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4
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
SP706P/R/S/T
18
7
6
5
4
3
2
1
MR
V
CC
GND
PFI
WDO
RESET / RESET*
WDI
PFO
SP708S/R/T
18
7
6
5
4
3
2
1
MR
V
CC
GND
PFI
RESET
RESET
N.C.
PFO
*SP706P only
DIP and SOIC
18
7
6
5
4
3
2
1
WDO
MR
VCC
WDI
PFO
PFI
GND
18
7
6
5
4
3
2
1
RESET
RESET
MR
VCC
N.C.
PFO
PFI
GND
RESET / RESET*
SP706P/R/S/T
SP708S/R/T
*SP706P only
µSOIC
Figure 1. Pinouts
5
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
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71- -82
Table 1. Device Pin Description
6
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
GND * For the SP706P only
1.25V
2.63V for the SP706P/R
2.93V for the SP706S
3.08V for the SP706T
V
CC
TIMEBASE FOR
RESET AND
WATCHDOG
WATCHDOG
TIMER
RESET
GENERATOR
WATCHDOG
TRANSITION
DETECTOR
70µA
MR
V
CC
RESET/RESET*
WDO
PFI
PFO
WDI
SP706P/R/S/T
1.25V
2.63V for the SP708R
2.93V for the SP708S
3.08V for the SP708T
VCC
RESET
GENERATOR
250µA
MR
VCC
RESET
PFI
PFO
GND
RESET
SP708R/S/T
Figure 2. Internal Block Diagram for the SP706P/R/S/T
7
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
Figure 4A. Power-Fail Comparator De-assertion
Response Time.
30pF 1KΩ
PFO
+1.25V
+3.3V
PFI
V
CC
= +3.3V
T
A
= +25 C
Figure 4B. Circuit for the Power-Fail Comparator
De-assertion Response Time.
Figure 5A. Power-Fail Comparator Assertion
Response Time.
Figure 5B. Circuit for the Power-Fail Comparator
Assertion Response Time.
Figure 6A. SP706 RESET Output Voltage vs. Supply
Voltage.
Figure 6B. Circuit for the SP706 RESET Output
Voltage vs. Supply Voltage.
330pF
2KΩ
V
CC
T
A
= +25
o
C
V
CC
RESET RESET
GND
30pF
1KΩ
PFO
+1.25V
+3.3V
PFI
V
CC
= +3.3V
T
A
= +25 C
1.2V
0V
1.4V
PFI
3V
PFO
PFI
1.2V
PFO
0V
3V
1.4V
3.6V
VCC
0V
RESET
8
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
Figure 7A. SP706 RESET Response Time Figure 7B. Circuit for the SP706 RESET Response
Time
Figure 8. SP708 RESET and RESET Assertion Figure 9. SP708 RESET and RESET De-Assertion
Figure 10. Circuit for the SP708 RESET and RESET Assertion and De-Assertion
330pF
V
CC
T
A
= +25
o
C
10KΩ
RESET
RESET
330pF 10KΩ
GND
V
CC
330pF
10KΩ
V
CC
T
A
= +25
o
C
V
CC
RESET RESET
GND
0V
3.2V
RESET
0V
3.2V
RESET 2.8V
0V
0V
2.8V
RESET
RESET
9
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
Figure 11. SP708 RESET Output Voltage vs. Supply
Voltage
Figure 12. SP708 RESET Response Time
Figure 13. Circuit for the SP708 RESET Output Voltage vs. Supply Voltage and the RESET Response Time
Figures
GND
RESET
V
CC
330pF
V
CC
10KΩ
0V
0V
RESET
3.6V
VCC
10
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
the reset threshold, an internal timer releases
RESET after 200ms. RESET pulses LOW when-
ever VCC dips below the reset threshold, such as
in a brownout condition. When a brownout
condition occurs in the middle of a previously
initiated reset pulse, the pulse continues for at
least another 140ms. During power-down, once
VCC falls below the reset threshold, RESET
stays LOW and is guaranteed to be 0.4V or less
until VCC drops below 1V.
The active-HIGH RESET output is simply
the complement of the RESET output and is
guaranteed to be valid with VCC down to 1.1V.
Some µPs, such as Intel's 80C51, require an
active-HIGH reset pulse.
Watchdog Timer
The SP706P/R/S/T-SP708R/S/T series watchdog
circuit monitors the µP's activity. If the µP does
not toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET
is released and WDI is driven HIGH or LOW,
the timer will start counting. Pulses as short as
50ns can be detected.
Typically, WDO will be connected to the
non-maskable interrupt input (NMI) of a µP.
When VCC drops below the reset threshold, WDO
will go LOW independent of the current status
of the watchdog timer. Normally this would
trigger an NMI but RESET goes LOW simulta-
neously, and thus overrides the NMI.
If WDI is left unconnected, WDO can be used as
a low-line output. Since floating WDI disables
the internal timer, WDO goes LOW only when
VCC falls below the reset threshold, thus
functioning as a low-line output.
Power-Fail Comparator
The power-fail comparator can be used for
various purposes because its output and
noninverting input are not internally connected.
The inverting input is internally connected to
a 1.25V reference.
FEATURES
The SP706P/R/S/T-SP708R/S/T series provides
four key functions:
1. A reset output during power-up, power-down
and brownout conditions.
2. An independent watchdog output that goes
LOW if the watchdog input has not been toggled
within 1.6 sec.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring a
power supply other than +3.3V/+3.0V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
The SP706R/S/T devices are the same as the
SP708R/S/T devices except for the active-HIGH
RESET substitution of the watchdog timer. The
SP706P device is the same as the SP706R de-
vice except an active-HIGH RESET is provided
rather than an active-LOW RESET.
THEORY OF OPERATION
The SP706P/R/S/T-SP708R/S/T series is a mi-
croprocessor (µP) supervisory circuit that moni-
tors the power supplied to digital circuits such
as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that re-
quires power supply monitoring. Implementing
this series will reduce the number of compo-
nents and overall complexity of a system. The
watchdog functions of this product family will
continuously oversee the operational status of a
system. The operational features and benefits of
the SP706P/R/S/T-SP708R/S/T series are de-
scribed, in more detail, below.
RESET Output
A microprocessor's reset input starts the µP
in a known state. The SP706P/R/S/T-SP708R/
S/T series asserts reset during power-up and
prevents code execution errors during power-
down or brownout conditions.
During power-up, once VCC reaches 1V, RESET
is a guaranteed logic LOW of 0.4V or less. As
VCC
rises, RESET stays LOW. When VCC rises above
11
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
To build an early-warning circuit for power
failure, connect the PFI pin to a voltage divider
as shown in Figure 16. Choose the voltage
divider ratio so that the voltage at PFI falls
below 1.25V just before the +5V regulator drops
out. Use PFO to interrupt the µP so it can prepare
for an orderly power-down.
Manual Reset
The manual-reset input (MR) allows RESET to
be triggered by a pushbutton switch. The switch
is effectively debounced by the 140ms
minimum RESET pulse width. MR is TTL/
CMOS logic compatible, so it can be driven by
an external logic line. MR can be used to force
a watchdog timeout to generate a RESET pulse
in the SP706P/R/S/T-SP708R/S/T series.
Simply connect WDO to MR.
Figure 14. Watchdog Timing Waveforms
Figure 15. Timing Diagrams with WDI Tri-stated. The RESET Output is the Inverse of the RESET Waveform
Shown.
t
RS
RESET*
WDO
0V
WDI
RESET*
0V
+3.3V
0V
0V
t
WD
t
WD
t
WD
t
WP
* externally triggered LOW by MR,
RESET is for the SP813L/813M only
+3.3V
+3.3V
+3.3V
VCC
RESET
0V
0V
0V
tRS
tRS
tMR
0V
MR*
WDO
VRT VRT
*externally driven LOW
tMD
+3.3V
+3.3V
+3.3V
+3.3V
12
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
Ensuring a Valid RESET Output Down to
VCC = 0V
When VCC falls below 1V, the RESET output no
longer sinks current, it becomes an open circuit.
High-impedance CMOS logic inputs can drift to
undetermined voltages if left undriven. If a pull-
down resistor is added to the RESET pin, any
stray charge or leakage currents will be shunted
to ground, holding RESET LOW. The resistor
value is not critical. It should be about 100KΩ,
large enough not to load RESET and small
enough to pull RESET to ground.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC
by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
sensitivity to high-frequency noise on the
line being monitored. RESET can be used to
monitor voltages other than the +3.3V/+3.0V
VCC line. Connect PFO to MR to initiate a
RESET pulse when PFI drops below 1.25V.
Figure 17 shows the SP706R/S/T-SP708R/
S/T series configured to assert RESET when the
+3.3V/+3.0V supply falls below the RESET
threshold, or when the +12V supply falls below
approximately 11V.
Monitoring a Negative Voltage Supply
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 18.
When the negative rail is good (a negative
voltage of large magnitude), PFO is LOW. By
adding the resistors and transistor as shown, a
HIGH PFO triggers RESET. As long as PFO
remains HIGH, the SP706P/R/S/T-SP708R/S/
T series will keep RESET asserted (where
RESET = LOW and RESET = HIGH). Note that
this circuit's accuracy depends on the PFI
threshold tolerance, the VCC line, and the resis-
tors.
Interfacing to mPs with Bidirectional
RESET Pins
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
RESET output. If, for example, the RESET
PFI
PFO
VCC
+3.3V/+3.0V
GND
RESET
to µP
MR
+12V
1MΩ
1%
130KΩ
1%
Figure 17. Monitoring Both +3.3V/+3.0V and +12V
Power Supplies
GND GND
RESET
INTERRUPT
I/O LINE
VCC
RESET
PFO
PFI R2
R1
Unregulated DC
Power Supply
Regulated +3.3V/+3.0V
Power Supply
VCC
0.1µF
PFI
µP
NMI WDO
PUSHBUTTON
SWITCH
MR
Figure 16. Typical Operating Circuit
13
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
output is driven HIGH and the µP wants to pull
it LOW, indeterminate logic levels may result.
To correct this, connect a 4.7kΩ resistor
between the RESET output and the µP reset
I/O, as shown if Figure 19. Buffer the
RESET output to other system components.
Negative-Going VCC Transients
While issuing resets to the µP during power-up,
power-down, and brownout conditions, these
supervisors are relatively immune to short-
duration negative-going VCC transients (glitches).
It is usually undesirable to reset the µP when VCC
experiences only small glitches.
Figure 20 shows maximum transient dura-
tion vs. reset-comparator overdrive, for which
reset pulses are not generated. The data was gen-
erated using negative-going VCC pulses, starting
at 3.3V and ending below the reset threshold by
Figure 18. Monitoring a Negative Voltage Supply Figure 19. Interfacing to Microprocessors with
Bidirectional RESET I/O for the SP706
PFI
PFO
R2
R1
VCC
+3.3V/+3.0V
GND
PFO
V-
+3.3V
VTRIP
0V 0V
VCC - 1.25
R1
1.25 - VTRIP
R2
V-
=
100kΩ
100kΩ
RESET
to µP
2N3904
, VTRIP < 0
V-
MR
0V
+3.3V
MR
the magnitude indicated (reset comparator over-
drive). The graph shows the maximum pulse
width a negative-going VCC transient may
typically have without causing a reset pulse to
be issued. As the amplitude of the transient
increases (i.e. goes farther below the reset
threshold), the maximum allowable pulse width
decreases. Typically, a VCC transient that goes
100mV below the reset threshold and lasts for
40µs or less will not cause a reset pulse to be
issued. A 100nF bypass capacitor mounted close
to the VCC pin provides additional transient
immunity.
Applications
The SP706P/R/S/T-SP708R/S/T series offers
unmatched performance and the lowest power
consumption for these industry standard de-
vices. Refer to Figures 21 and 22 for supply
current performance characteristics rated against
temperature and supply voltages.
V
CC
+3.3V/+3.0V
GND
V
CC
+3.3V/+3.0V
GND
RESET RESET
4.7KΩ
µP
Buffered RESET connects to System Components
14
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
Reset Overdrive (mV)
Maximum Transient Duration
100
80
60
40
20
0
10 100 1000 10000
Figure 20. Maximum Transient Duration Without
Causing a Reset Pulse vs. Reset Comparator Overdrive
Figure 21. Supply Current vs. Temperature
Figure 22. Supply Current vs. Supply Voltage
1nF Capacitor
VOUT TO GND
Above Line
RESET
Generated
NO
RESET
Generated
14
16
18
20
22
24
26
28
30
2.5 3 3.5 4 4.5 5 5.5
Supply Voltage (V)
19.4
19.5
19.6
19.7
19.8
19.9
20.0
20.1
20.2
-60 -40 -20 0 20 40 60 80 100
Temperature (°C)
V
cc=3.3V
Supply Current (mA)
Supply Current (µµ
µµ
µA) Transient Duration (µµ
µµ
µS)
15
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
D
ALTERNATE
END PINS
(BOTH ENDS)
D1 = 0.005" min.
(0.127 min.)
E
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A = 0.210" max.
(5.334 max).
E1
C
Ø
L
A2
A1 = 0.015" min.
(0.381min.)
B
B1
e = 0.100 BSC
(2.540 BSC)
e
A
= 0.300 BSC
(7.620 BSC)
A2
B
B1
C
D
E
E1
L
Ø
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.355/0.400
(9.017/10.160)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
8–PIN
16
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
D
EH
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
8–PIN
A
A1
Ø
L
Be
h x 45°
A
A1
B
D
E
e
H
h
L
Ø
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249
0.014/0.019
(0.35/0.49)
0.189/0.197
(4.80/5.00)
0.150/0.157
(3.802/3.988)
0.050 BSC
(1.270 BSC)
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
17
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
PACKAGE: PLASTIC
MICRO SMALL
OUTLINE (µSOIC)
1
0.013
±0.005
0.0256
BSC
0.118
±0.004
0.020
2
0.020
0.116
±0.004 0.034
±0.004
0.040
±0.003
0.004
±0.002
0.118
±0.004
0.118
±0.004
0.037
Ref
0.0215
±0.006
3.0˚
±3˚
R .003
12.0˚
±4˚
0.006
±0.006
0.006
±0.006
0.008
0˚ - 6˚
0.012
±0.003
0.01
12.0˚
±4˚
0.16
±0.003
0.0965
±0.003
0.116
±0.004
50 USOIC devices per tube
All package dimensions are in inches
18
Date: 6-28-04 SP706 +3.0/ +3.3 Low Power Microprocessor Circuits © Copyright 2004 Sipex Corporation
ORDERING INFORMATION
Model ....................................................................................... Temperature Range ................................................................................ Package
SP706PCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706PCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706PCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706RCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706RCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706RCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706SCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706SCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706SCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706TCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706TCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706TCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706PEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706PEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706PEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706REP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706REN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706REU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706SEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706SEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706SEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706TEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706TEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706TEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708RCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708RCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708RCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708SCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708SCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708SCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708TCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708TCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708TCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708REP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708REN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708REU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708SEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708SEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708SEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708TEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708TEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708TEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP708TEU = standard; SP708TEU-L = lead free.
