PTN3310/PTN3311
High-speed serial logic translators
Product data
Supersedes data of 2001 Jun 19 2002 Oct 24
INTEGRATED CIRCUITS
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2
2002 Oct 24
FEATURES
•Meets LVDS EIA-644 and PECL standards
•2 pin-for-pin replacement input/output choices:
–LVDS in, PECL out (PTN3310)
–PECL in, LVDS out (PTN3311)
•Single +3.3 V supply voltage operation
•Available in 8-pin SO or TSSOP package
•Maximum throughput data rate of 800 Mbps typical
APPLICATIONS
•High-speed networking and telecom applications
–ATM
–SONET/SDH
–Switches
–Routers
–Add-drop multiplexers
GENERAL DESCRIPTION
The High-Speed Serial Logic T ranslator provides a point solution
that addresses the various interface logic requirements of Optical
T ransceiver Modules. The product offers a compact translation
between LVDS and PECL high speed serial data lines. This provides
the end users a simple way to mix or match Optical T ransceiver ICs
from various vendors to maximize desired performance and reduces
the need to redesign interfaces to accommodate new Optical
T ransceiver ICs.
The High-Speed Serial Logic T ranslator comes in two translation
choices to allow mixing LVDS and PECL input/outputs. The product
is offered in a small, convenient, 8-pin package.
Figure 1 shows the High-Speed Serial Logic T ranslator Device in a
typical high speed optical module application. Figure 2 shows the
circuit block diagrams.
PIN CONFIGURATIONS
1
2
3
4
8
7
6
5
PTN3310
GND1
VINP
VINN
GND2
VCC1
VOUTP
VOUTN
VCC2
1
2
3
4
8
7
6
5
PTN3311
GND1
VINP
VINN
GND2
VCC1
VOUTP
VOUTN
VCC2
8-pin SO package
ST00014
PIN DESCRIPTIONS
8-pin SO and TSSOP package
Pin # Symbol Name and function
1, 4 GND1, GND2 Ground
2, 3 VINP, VINN Differential inputs
5, 8 VCC1, VCC2 Supply voltage
6, 7 VOUTN, VOUTP Differential outputs
ORDERING INFORMATION
Type n mber
Package
Type
n
u
mber
Name Description Version
PTN3310D SO8 Plastic small-outline package; 8 leads; body width 3.9 mm SOT96-1
PTN3311D SO8 Plastic small-outline package; 8 leads; body width 3.9 mm SOT96-1
PTN3310DP TSSOP8 Plastic thin shrink small-outline package; 8 leads; body width 3 mm;
lead length 0.5 mm SOT505-2
PTN3311DP TSSOP8 Plastic thin shrink small-outline package; 8 leads; body width 3 mm;
lead length 0.5 mm SOT505-2
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 3
Translator
ST00040
Optical
RCVR
Optical
Laser
Driver
Optical Interface IC’s
1 x 9 Optical Module
MAC
(ASIC)
Serial
Backplane
Device
To/From
Serial
Backplane
Translator
Figure 1. High-Speed Serial Logic Translators in Optical Module Application
ST00009
LVDS IN PECL OUT
PTN3310
PECL IN LVDS OUT
PTN3311
Figure 2. High-Speed Serial Logic Translator Block Diagrams
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Limits Unit
VCC Supply voltage –0.3 to +4.0 V
VILVDS receiver input voltage –0.3 to +5.5 V
VOLVDS driver output voltage –0.3 to +5.5 V
tSC LVDS output short circuit duration continuous
TjMaximum junction temperature +150 °C
Tstg Storage temperature range –65 to +150 °C
ESDHBM Electrostatic discharge (Human Body Model, 1.5 kΩ, 100 pF) >2 kV
ESDMM Electrostatic discharge (Machine Model, 0 kΩ, 200 pF) >200 V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Supply voltage 3.0 3.6 V
Tamb Operating ambient temperature range in free air –40 +85 °C
VCCN Power supply noise voltage – 100 mVPP
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 4
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions Min Typ Max Unit
General
VCC Supply voltage 3.0 3.3 3.6 V
ICC Power supply current PTN3311 – 12 20 mA
IEE Power supply current PTN3310 – 13 20 mA
PECL inputs (PTN3311)
VIH Input HIGH voltage12.135 – 2.420 V
VIL Input LOW voltage11.490 – 1.825 V
IIInput current VIN = VCC or GND ––±10 µA
LVDS inputs (PTN3310)
VID Minimum differential input signal amplitude 100 – – mV
IIN Input current
2
VIN = 0 V – – 20 mA
VIN = VCC – – 20 mA
PECL outputs (PTN3310)
VOH Output HIGH voltage12.275 2.345 2.420 V
VOL Output LOW voltage11.490 1.595 1.680 V
CLOutput load capacitance –5–pF
LVDS outputs (PTN331 1); RL = 100 Ω
VOD Output differential voltage 250 350 450 mV
∆VOD Steady-state difference in output differential
voltage between complementary output states – – 50 mV
VOS Offset voltage 1.125 1.250 1.375 V
∆VOS Steady-state dif ference in of fset voltage between
complementary output states – – 50 mV
IOS Output short-circuit current outputs mutually shorted – – 12 mA
output shorted to GND – – 24 mA
CLOutput load capacitance –5–pF
NOTES:
1. These values are for VCC = 3.3 V ; PECL level specifications are referenced to V CC and will track 1:1 with variation of VCC.
2. Power supply either on or off.
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 5
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions Min Typ Max Unit
General
fMAX Maximum throughput data rate 655 800 – Mbps
tS
Clock output skew, part-to-part – 100 – ps
t
SKEW Clock output pulse skew – 50 – ps
t /t
Propagation delay input (differential) to output – 1 3 ns
t
PLH
/t
PHL Propagation delay input (single-ended) to output – 1 3 ns
PECL outputs (PTN3310)
tr/tfOutput rise and fall times at 20% and 80%
intersects – 200 300 ps
LVDS outputs (PTN331 1); RL = 100 Ω; CL = 5 pF
tTLH T ransition time LOW to HIGH RL = 100 Ω; CL = 5 pF – 500 650 ps
tTHL T ransition time HIGH to LOW RL = 100 Ω; CL = 5 pF – 500 650 ps
VOSS Peak-to-peak switching offset voltage Measured between two
matched 49.9 Ω load resistors;
5 pF load capacitance – – 150 mV
LVDS REFERENCE MEASUREMENT CONFIGURATION
ST00041
PTN331x
1 5
2 6
3 7
4 8
CLVDS
Rload
Rload
Vos
Voutp
Cprobe
Cprobe
Voutn
Vod = Voutp – Voutn Rload = 50 Ohms
CLVDS = 5 pF
The above diagram shows the test set-up used when evaluating
LVDS outputs. According to the TIA-EIA-644 Standard, the
maximum lumped capacitance test load should be 5 pF. However ,
by using probes or cables to observe the signal, additional
capacitance is added, which has an effect on the rise and fall times.
Cprobe represents any capacitance caused by the use of probes or
cables. Assuming balanced loading and balanced output drivers, the
total effective capacitance seen by the part is:
CEff = CLVDS + 1/2 Cprobe
To correctly account for the effects of Cprobe, the following formula
should be used:
Dt+
5pF
CEff Dtmeasured,
Where ∆t is the 20%–80% rise/fall time.
To avoid the use of additional calculation of the measured results, a
different approach could be taken; however, the value of Cprobe has
to be known in advance. In that case, the value of CLVDS can be
chosen such that the sum of the capacitances equals 5 pF, i.e.:
CLVDS + 1/2 Cprobe = 5 pF
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 6
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 7
TSSOP8: plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm SOT505-2
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 8
REVISION HISTORY
Rev Date Description
_2 2002 Oct 24 Product data (9397 750 10628); second version supersedes Product data initial
version, 2001 Jun 19.
Engineering Change Notice: 853-2362 28701 (2002 Aug 06).
Modifications:
Add new package option (TSSOP) to existing Product data sheet.
_1 2001 Jun 19 Product data (9397 750 08511); initial version.
Philips Semiconductors Product data
PTN3310/PTN3311High-speed serial logic translators
2002 Oct 24 9
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit
http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Koninklijke Philips Electronics N.V. 2002
All rights reserved. Printed in U.S.A.
Date of release: 10-02
Document order number: 9397 750 10628
Data sheet status[1]
Objective data
Preliminary data
Product data
Product
status[2] [3]
Development
Qualification
Production
Definitions
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Level
I
II
III
