BGM121N256V1 - SILICON LABS

BGM121/BGM123 Blue Gecko Bluetooth ®

SiP Module Data Sheet

The BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module family is targeted for appli-

cations where ultra-small size, reliable high performance RF, low-power consumption

and easy application development are key requirements.

At 6.5 x 6.5 x 1.4 mm the BGM121/BGM123 module fits applications where size is a con-

straint. BGM121/BGM123 also integrates a high performance, ultra robust antenna,

which requires minimal PCB, plastic and metal clearance. The total PCB area required

by BGM121/BGM123 is only 51 mm2.

The BGM121/BGM123 also integrates a Bluetooth 4.2 compliant Bluetooth stack and it

can also run end-user applications on-board or alternatively used as a network co-pro-

cessor over one of the host interfaces.

BGM121/BGM123 SIP modules can be used in a wide variety of applications:

KEY FEATURES

• Bluetooth 4.2 low energy compliant

• Integrated antenna or RF pin

• TX power up to 8 dBm

• RX sensitivity: -90 dBm

• Range: up to 200 meters

• 32-bit ARM® Cortex®-M4 core at 38.4

MHz

• Flash memory: 256 kB

• RAM: 32 kB

• Autonomous Hardware Crypto Accelerator

and Random Number Generator

• Integrated DC-DC Converter

• Onboard Bluetooth stack

• Wearables

• IoT end devices and gateways

• Health, sports and wellness devices

• Industrial, home and building automation

• Smart phone, tablet and PC accessories

• Beacons

Timers and Triggers

RTCC

Cryotimer

Timer/Counter

Low energy timer

Pulse Counter

Watchdog Timer

Protocol Timer

32-bit bus

Peripheral Reflex System

Serial Interfaces

I/O Ports Analog I/F

Lowest power mode with peripheral operational:

USART

Low Energy

UART

I2C

External

Interrupts

General Purpose

I/O

Pin Reset

Pin Wakeup

ADC

IDAC

Analog

Comparator

Radio Transceiver

DEMOD

AGC

IFADC

CRC

BUFC

RFSENSE

MOD

FRC

RAC

EM3—StopEM2—Deep SleepEM1—Sleep EM4—Hibernate EM4—ShutoffEM0—Active

RF Frontend

LNA

Frequency

Synthesizer

PGA

BALUN

Core / Memory

ARM Cortex M4 processor

with DSP extensions and FPU

Energy Management

Brown-Out

Detector

DC-DC

Converter

Voltage

Regulator Voltage Monitor

Power-On Reset

Other

CRYPTO

CRC

Clock Management

High Frequency

Crystal Oscillator

Low Frequency

Crystal Oscillator

Low Frequency

RC Oscillator

High Frequency

RC Oscillator

Ultra Low

Frequency

RC Oscillator

Auxiliary

High Frequency

RC Oscillator

Flash Program

Memory RAM Memory Debug Interface DMA Controller

Memory

Protection Unit

Antenna

Crystals

32.768kHz

38.4MHz

Chip antenna

Matching

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1. Feature List

The BGM121/BGM123 highlighted features are listed below.

•Low Power Wireless System-on-Chip.

•High Performance 32-bit 38.4 MHz ARM Cortex®-M4 with

DSP instruction and floating-point unit for efficient signal

processing

• 256 kB flash program memory

• 32 kB RAM data memory

• 2.4 GHz radio operation

• TX power up to 8 dBm

•Low Energy Consumption

• 9.0 mA RX current at 2.4 GHz

• 8.2 mA TX current @ 0 dBm output power at 2.4 GHz

• 63 μA/MHz in Active Mode (EM0)

• 2.5 μA EM2 DeepSleep current (full RAM retention and

RTCC running from LFXO)

• 2.1 μA EM3 Stop current (State/RAM retention)

• Wake on Radio with signal strength detection, preamble

pattern detection, frame detection and timeout

•High Receiver Performance

• -90 dBm sensitivity @ 1 Mbit/s GFSK (2.4 GHz)

•Supported Protocols

•Bluetooth®

•Support for Internet Security

• General Purpose CRC

• Random Number Generator

• Hardware Cryptographic Acceleration for AES 128/256,

SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC

•Wide Selection of MCU peripherals

• 12-bit 1 Msps SAR Analog to Digital Converter (ADC)

• 2 × Analog Comparator (ACMP)

• Digital to Analog Current Converter (IDAC)

• 32 pins connected to analog channels (APORT) shared be-

tween Analog Comparators, ADC, and IDAC

• 30 General Purpose I/O pins with output state retention and

asynchronous interrupts

• 8 Channel DMA Controller

• 12 Channel Peripheral Reflex System (PRS)

• 2×16-bit Timer/Counter

• 3 + 4 Compare/Capture/PWM channels

• 32-bit Real Time Counter and Calendar

• 16-bit Low Energy Timer for waveform generation

• 32-bit Ultra Low Energy Timer/Counter for periodic wake-up

from any Energy Mode

• 16-bit Pulse Counter with asynchronous operation

• Watchdog Timer with dedicated RC oscillator @ 50nA

• 2×Universal Synchronous/Asynchronous Receiver/Trans-

mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I2S)

•Low Energy UART (LEUART™)

•I2C interface with SMBus support and address recognition

in EM3 Stop

•Wide Operating Range

• 1.85 V to 3.8 V single power supply

• 2.4 V to 3.8 V when using DC-DC

• Integrated DC-DC

• -40 °C to +85 °C

•Dimensions

• 6.5 x 6.5 x 1.4 mm

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Feature List

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 1

2. Ordering Information

Ordering Code Protocol Stack Frequency

Band

Max TX

Power

(dBm)

Antenna Flash

(KB)

RAM

(KB)

GPIO Package

BGM123A256V1R1Bluetooth Smart 2.4 GHz +3 Built-in 256 32 30 1000 pcs

reel

BGM123A256V11Bluetooth Smart 2.4 GHz +3 Built-in 256 32 30 260 pcs

tray

BGM123N256V1R1Bluetooth Smart 2.4 GHz +3 RF pin 256 32 30 1000 pcs

reel

BGM123N256V11Bluetooth Smart 2.4 GHz +3 RF pin 256 32 30 260 pcs

tray

BGM121A256V1R1Bluetooth Smart 2.4 GHz +8 Built-in 256 32 30 1000 pcs

reel

BGM121A256V11Bluetooth Smart 2.4 GHz +8 Built-in 256 32 30 260 pcs

tray

BGM121N256V1R1Bluetooth Smart 2.4 GHz +8 RF pin 256 32 30 1000 pcs

reel

BGM121N256V11Bluetooth Smart 2.4 GHz +8 RF pin 256 32 30 260 pcs

tray

BGM123A256V2R Bluetooth Smart 2.4 GHz +3 Built-in 256 32 30 1000 pcs

reel

BGM123A256V2 Bluetooth Smart 2.4 GHz +3 Built-in 256 32 30 260 pcs

tray

BGM123N256V2R Bluetooth Smart 2.4 GHz +3 RF pin 256 32 30 1000 pcs

reel

BGM123N256V2 Bluetooth Smart 2.4 GHz +3 RF pin 256 32 30 260 pcs

tray

BGM121A256V2R Bluetooth Smart 2.4 GHz +8 Built-in 256 32 30 1000 pcs

reel

BGM121A256V2 Bluetooth Smart 2.4 GHz +8 Built-in 256 32 30 260 pcs

tray

BGM121N256V2R Bluetooth Smart 2.4 GHz +8 RF pin 256 32 30 1000 pcs

reel

BGM121N256V2 Bluetooth Smart 2.4 GHz +8 RF pin 256 32 30 260 pcs

tray

SLWSTK6101C2

SLWRB4302A3

Note:

1. V1 is the Initial production / engineering sample version and is not certified. V2 is the Full production version and will be certified.

2. Blue Gecko Bluetooth Module Wireless Starter Kit (WSTK) with BGM121A256 radio board (SLWRB4302A) and BGM111A256

radio board (SLWRB4300A), expansion board and accessories.

3. BGM121A256 Radio Board

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Ordering Information

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3. System Overview

3.1 Introduction

The BGM121/BGM123 product family combines an energy-friendly MCU with a highly integrated radio transceiver. The devices are well

suited for any battery operated application, as well as other system requiring high performance and low-energy consumption. This sec-

tion gives a short introduction to the full radio and MCU system. A detailed functional description can be found in the EFR32BG1 Blue

Gecko Bluetooth® Smart SoC Family Data Sheet (see general sections and QFN48 2.4 GHz SoC related sections).

A detailed block diagram of the EFR32BG SoC is shown in the figure below which is used in the BGM121/BGM123 Bluetooth Smart

module.

Analog Peripherals

Clock Management

LFXTAL_P / N LFXO

IDAC

ARM Cortex-M4 Core

Up to 256 KB ISP Flash

Program Memory

Up to 32 KB RAM

Watchdog

Timer

Reset

Management

Unit

Brown Out /

Power-On

Reset

RESETn

Digital Peripherals

Input MUX

Port

Mapper

Port I/O Configuration

I2C

Analog Comparator

12-bit ADC

Temp

Sensor

VREFVDD

VDD

Internal

Reference

TIMER

CRYOTIMER

PCNT

USART

Port A

Drivers

Port B

Drivers

PAn

Port C

Drivers PCn

PBn

Port D

Drivers PDn

LETIMER

RTC / RTCC

IOVDD

AUXHFRCO

HFRCO

ULFRCO

HFXO

Port F

Drivers PFn

Memory Protection Unit

LFRCO

LEUART

CRYPTO

CRC

DMA Controller

APORT

Floating Point Unit

Energy Management

DC-DC

Converter

DVDD

VREGVDD

VSS

VREGSW

bypass

AVDD

PAVDD

RFVDD

Voltage

Regulator

DECOUPLE

IOVDD

Voltage

Monitor

VREGVSS

RFVSS

PAVSS

Serial Wire Debug /

Programming

Radio Transciever

2G4RF_IOP

2G4RF_ION

RF Frontend

LNA

BALUN

RFSENSE

Frequency

Synthesizer

DEMOD

AGC

IFADC

CRC

BUFC

MOD

FRC

RAC

PGA

HFXTAL_P

HFXTAL_N

Figure 3.1. Detailed EFR32BG1 Block Diagram

3.2 Radio

The BGM121/BGM123 features a radio transceiver supporting Bluetooth® low energy protocol.

3.2.1 Antenna Interface

BGM121/BGM123 has a built in 2.4GHz ceramic chip antenna or 50 ohm RF pin.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

System Overview

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Table 3.1. Antenna Efficiency and Peak Gain

Parameter With optimal layout Note

Efficiency -1 to -2 dB Efficiency and peak gain depend on the application PCB layout

and mechanical design

Peak gain 1 dBi

3.2.2 Wake on Radio

The Wake on Radio feature allows flexible, autonomous RF sensing, qualification, and demodulation without required MCU activity, us-

ing a subsystem of the BGM121/BGM123 including the Radio Controller (RAC), Peripheral Reflex System (PRS), and Low Energy pe-

ripherals.

3.2.3 RFSENSE

The RFSENSE module generates a system wakeup interrupt upon detection of wideband RF energy at the antenna interface, providing

true RF wakeup capabilities from low energy modes including EM2, EM3 and EM4.

RFSENSE triggers on a relatively strong RF signal and is available in the lowest energy modes, allowing exceptionally low energy con-

sumption. RFSENSE does not demodulate or otherwise qualify the received signal, but software may respond to the wakeup event by

enabling normal RF reception.

Various strategies for optimizing power consumption and system response time in presence of false alarms may be employed using

available timer peripherals.

3.2.4 Packet and State Trace

The BGM121/BGM123 Frame Controller has a packet and state trace unit that provides valuable information during the development

phase. It features:

• Non-intrusive trace of transmit data, receive data and state information

• Data observability on a single-pin UART data output, or on a two-pin SPI data output

• Configurable data output bitrate / baudrate

• Multiplexed transmitted data, received data and state / meta information in a single serial data stream

3.2.5 Random Number Generator

The Frame Controller (FRC) implements a random number generator that uses entropy gathered from noise in the RF receive chain.

The data is suitable for use in cryptographic applications.

Output from the random number generator can be used either directly or as a seed or entropy source for software-based random num-

ber generator algorithms such as Fortuna.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

System Overview

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3.3 Power

The BGM121/BGM123 has an Energy Management Unit (EMU) and efficient integrated regulators to generate internal supply voltages.

Only a single external supply voltage is required, from which all internal voltages are created. An integrated DC-DC buck regulator is

utilized to further reduce the current consumption.

Figure 3.2. Power Supply Configuration

3.3.1 Energy Management Unit (EMU)

The Energy Management Unit manages transitions of energy modes in the device. Each energy mode defines which peripherals and

features are available and the amount of current the device consumes. The EMU can also be used to turn off the power to unused RAM

blocks, and it contains control registers for the dc-dc regulator and the Voltage Monitor (VMON). The VMON is used to monitor multiple

supply voltages. It has multiple channels which can be programmed individually by the user to determine if a sensed supply has fallen

below a chosen threshold.

3.3.2 DC-DC Converter

The DC-DC buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes EM0, EM1, EM2

and EM3. Patented RF noise mitigation allows operation of the DC-DC converter without degrading sensitivity of radio components.

Protection features include programmable current limiting, short-circuit protection, and dead-time protection. The DC-DC converter may

also enter bypass mode when the input voltage is too low for efficient operation. In bypass mode, the DC-DC input supply is internally

connected directly to its output through a low resistance switch. Bypass mode also supports in-rush current limiting to prevent input

supply voltage droops due to excessive output current transients.

3.4 General Purpose Input/Output (GPIO)

BGM121/BGM123 has up to 30 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output

or input. More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual

GPIO pin. The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be

routed to several GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other

peripherals. The GPIO subsystem supports asynchronous external pin interrupts.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

System Overview

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3.5 Clocking

3.5.1 Clock Management Unit (CMU)

The Clock Management Unit controls oscillators and clocks in the BGM121/BGM123. Individual enabling and disabling of clocks to all

peripheral modules is perfomed by the CMU. The CMU also controls enabling and configuration of the oscillators. A high degree of

flexibility allows software to optimize energy consumption in any specific application by minimizing power dissipation in unused periph-

erals and oscillators.

3.5.2 Internal Oscillators

The BGM121/BGM123 fully integrates two crystal oscillators and four RC oscillators, listed below.

• A 38.4MHz high frequency crystal oscillator (HFXO) provides a precise timing reference for the MCU and radio.

• A 32.768 kHz crystal oscillator (LFXO) provides an accurate timing reference for low energy modes.

• An integrated high frequency RC oscillator (HFRCO) is available for the MCU system, when crystal accuracy is not required. The

HFRCO employs fast startup at minimal energy consumption combined with a wide frequency range.

• An integrated auxilliary high frequency RC oscillator (AUXHFRCO) is available for timing the general-purpose ADC and the Serial

Wire debug port with a wide frequency range.

• An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crys-

tal accuracy is not required.

• An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy con-

sumption in low energy modes.

3.6 Counters/Timers and PWM

3.6.1 Timer/Counter (TIMER)

TIMER peripherals keep track of timing, count events, generate PWM outputs and trigger timed actions in other peripherals through the

PRS system. The core of each TIMER is a 16-bit counter with up to 4 compare/capture channels. Each channel is configurable in one

of three modes. In capture mode, the counter state is stored in a buffer at a selected input event. In compare mode, the channel output

reflects the comparison of the counter to a programmed threshold value. In PWM mode, the TIMER supports generation of pulse-width

modulation (PWM) outputs of arbitrary waveforms defined by the sequence of values written to the compare registers, with optional

dead-time insertion available in timer unit TIMER_0 only.

3.6.2 Real Time Counter and Calendar (RTCC)

The Real Time Counter and Calendar (RTCC) is a 32-bit counter providing timekeeping in all energy modes. The RTCC includes a

Binary Coded Decimal (BCD) calendar mode for easy time and date keeping. The RTCC can be clocked by any of the on-board oscilla-

tors with the exception of the AUXHFRCO, and it is capable of providing system wake-up at user defined instances. When receiving

frames, the RTCC value can be used for timestamping. The RTCC includes 128 bytes of general purpose data retention, allowing easy

and convenient data storage in all energy modes.

3.6.3 Low Energy Timer (LETIMER)

The unique LETIMER is a 16-bit timer that is available in energy mode EM2 Deep Sleep in addition to EM1 Sleep and EM0 Active. This

allows it to be used for timing and output generation when most of the device is powered down, allowing simple tasks to be performed

while the power consumption of the system is kept at an absolute minimum. The LETIMER can be used to output a variety of wave-

forms with minimal software intervention. The LETIMER is connected to the Real Time Counter and Calendar (RTCC), and can be con-

figured to start counting on compare matches from the RTCC.

3.6.4 Ultra Low Power Wake-up Timer (CRYOTIMER)

The CRYOTIMER is a 32-bit counter that is capable of running in all energy modes. It can be clocked by either the 32.768 kHz crystal

oscillator (LFXO), the 32.768 kHz RC oscillator (LFRCO), or the 1 kHz RC oscillator (ULFRCO). It can provide periodic Wakeup events

and PRS signals which can be used to wake up peripherals from any energy mode. The CRYOTIMER provides a wide range of inter-

rupt periods, facilitating flexible ultra-low energy operation.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

System Overview

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3.6.5 Pulse Counter (PCNT)

The Pulse Counter (PCNT) peripheral can be used for counting pulses on a single input or to decode quadrature encoded inputs. The

clock for PCNT is selectable from either an external source on pin PCTNn_S0IN or from an internal timing reference, selectable from

among any of the internal oscillators, except the AUXHFRCO. The module may operate in energy mode EM0 Active, EM1 Sleep, EM2

Deep Sleep, and EM3 Stop.

3.6.6 Watchdog Timer (WDOG)

The watchdog timer can act both as an independent watchdog or as a watchdog synchronous with the CPU clock. It has windowed

monitoring capabilities, and can generate a reset or different interrupts depending on the failure mode of the system. The watchdog can

also monitor autonomous systems driven by PRS.

3.7 Communications and Other Digital Peripherals

3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART)

The Universal Synchronous/Asynchronous Receiver/Transmitter is a flexible serial I/O module. It supports full duplex asynchronous

UART communication with hardware flow control as well as RS-485, SPI, MicroWire and 3-wire. It can also interface with devices sup-

porting:

• ISO7816 SmartCards

• IrDA

•I2S

3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART)

The unique LEUARTTM provides two-way UART communication on a strict power budget. Only a 32.768 kHz clock is needed to allow

UART communication up to 9600 baud. The LEUART includes all necessary hardware to make asynchronous serial communication

possible with a minimum of software intervention and energy consumption.

3.7.3 Inter-Integrated Circuit Interface (I2C)

The I2C module provides an interface between the MCU and a serial I2C bus. It is capable of acting as both a master and a slave and

supports multi-master buses. Standard-mode, fast-mode and fast-mode plus speeds are supported, allowing transmission rates from 10

kbit/s up to 1 Mbit/s. Slave arbitration and timeouts are also available, allowing implementation of an SMBus-compliant system. The

interface provided to software by the I2C module allows precise timing control of the transmission process and highly automated trans-

fers. Automatic recognition of slave addresses is provided in active and low energy modes.

3.7.4 Peripheral Reflex System (PRS)

The Peripheral Reflex System provides a communication network between different peripheral modules without software involvement.

Peripheral modules producing Reflex signals are called producers. The PRS routes Reflex signals from producers to consumer periph-

erals which in turn perform actions in response. Edge triggers and other functionality can be applied by the PRS. The PRS allows pe-

ripheral to act autonomously without waking the MCU core, saving power.

3.8 Security Features

3.8.1 GPCRC (General Purpose Cyclic Redundancy Check)

The GPCRC module implements a Cyclic Redundancy Check (CRC) function. It supports both 32-bit and 16-bit polynomials. The sup-

ported 32-bit polynomial is 0x04C11DB7 (IEEE 802.3), while the 16-bit polynomial can be programmed to any value, depending on the

needs of the application.

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System Overview

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3.8.2 Crypto Accelerator (CRYPTO)

The Crypto Accelerator is a fast and energy-efficient autonomous hardware encryption and decryption accelerator. It supports AES en-

cryption and decryption with 128- or 256-bit keys and ECC over both GF(P) and GF(2m), SHA-1 and SHA-2 (SHA-224 and SHA-256).

Supported modes of operation for AES include: ECB, CTR, CBC, PCBC, CFB, OFB, CBC-MAC, GMAC and CCM.

Supported ECC NIST recommended curves include P-192, P-224, P-256, K-163, K-233, B-163 and B-233.

The CRYPTO is tightly linked to the Radio Buffer Controller (BUFC) enabling fast and efficient autonomous cipher operations on data

buffer content. It allows fast processing of GCM (AES), ECC and SHA with little CPU intervention. CRYPTO also provides trigger sig-

nals for DMA read and write operations.

3.9 Analog

3.9.1 Analog Port (APORT)

The Analog Port (APORT) is an analog interconnect matrix allowing access to analog modules ADC, ACMP, and IDAC on a flexible

selection of pins. Each APORT bus consists of analog switches connected to a common wire. Since many clients can operate differen-

tially, buses are grouped by X/Y pairs.

3.9.2 Analog Comparator (ACMP)

The Analog Comparator is used to compare the voltage of two analog inputs, with a digital output indicating which input voltage is high-

er. Inputs are selected from among internal references and external pins. The tradeoff between response time and current consumption

is configurable by software. Two 6-bit reference dividers allow for a wide range of internally-programmable reference sources. The

ACMP can also be used to monitor the supply voltage. An interrupt can be generated when the supply falls below or rises above the

programmable threshold.

3.9.3 Analog to Digital Converter (ADC)

The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to 1 MSamples/s. The

output sample resolution is configurable and additional resolution is possible using integrated hardware for averaging over multiple

samples. The ADC includes integrated voltage references and an integrated temperature sensor. Inputs are selectable from a wide

range of sources, including pins configurable as either single-ended or differential.

3.9.4 Digital to Analog Current Converter (IDAC)

The Digital to Analog Current Converter can source or sink a configurable constant current. This current can be driven on an output pin

or routed to the selected ADC input pin for capacitive sensing. The current is programmable between 0.05 µA and 64 µA with several

ranges with various step sizes.

3.10 Reset Management Unit (RMU)

The RMU is responsible for handling reset of the BGM121/BGM123. A wide range of reset sources are available, including several

power supply monitors, pin reset, software controlled reset, core lockup reset and watchdog reset.

3.11 Core and Memory

3.11.1 Processor Core

The ARM Cortex-M4F processor includes a 32-bit RISC processor integrating the following features and tasks in the system:

• ARM Cortex-M4F RISC processor achieving 1.25 Dhrystone MIPS/MHz

• Memory Protection Unit (MPU) supporting up to 8 memory segments

• 256 KB flash program memory

• 32 KB RAM data memory

• Configuration and event handling of all modules

• 2-pin Serial-Wire debug interface

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System Overview

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3.11.2 Memory System Controller (MSC)

The Memory System Controller (MSC) is the program memory unit of the microcontroller. The flash memory is readable and writable

from both the Cortex-M and DMA. The flash memory is divided into two blocks; the main block and the information block. Program code

is normally written to the main block, whereas the information block is available for special user data and flash lock bits. There is also a

read-only page in the information block containing system and device calibration data. Read and write operations are supported in en-

ergy modes EM0 Active and EM1 Sleep.

3.11.3 Linked Direct Memory Access Controller (LDMA)

The Linked Direct Memory Access (LDMA) controller features 8 channels capable of performing memory operations independently of

software. This reduces both energy consumption and software workload. The LDMA allows operations to be linked together and stag-

ed, enabling sophisticated operations to be implemented.

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3.12 Memory Map

The BGM121/BGM123 memory map is shown in the figures below.

Figure 3.3. BGM121/BGM123 Memory Map — Core Peripherals and Code Space

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

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Figure 3.4. BGM121/BGM123 Memory Map — Peripherals

3.13 Configuration Summary

The features of the BGM121/BGM123 are a subset of the feature set described in the device reference manual. The table below de-

scribes device specific implementation of the features. Remaining modules support full configuration.

Table 3.2. Configuration Summary

Module Configuration Pin Connections

USART0 IrDA SmartCard US0_TX, US0_RX, US0_CLK, US0_CS

USART1 IrDA I2S SmartCard US1_TX, US1_RX, US1_CLK, US1_CS

TIMER0 with DTI TIM0_CC[2:0], TIM0_CDTI[2:0]

TIMER1 TIM1_CC[3:0]

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

System Overview

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4. Electrical Specifications

4.1 Electrical Characteristics

All electrical parameters in all tables are specified under the following conditions, unless stated otherwise:

• Typical values are based on TAMB=25 °C and VDD= 3.3 V, by production test and/or technology characterization.

• Radio performance numbers are measured in conducted mode, based on Silicon Laboratories reference designs using output pow-

er-specific external RF impedance-matching networks for interfacing to a 50 Ω antenna.

• Minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature,

unless stated otherwise.

Refer to Table 4.2 General Operating Conditions on page 13 for more details about operational supply and temperature limits.

4.1.1 Absolute Maximum Ratings

Stresses above those listed below may cause permanent damage to the device. This is a stress rating only and functional operation of

the devices at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure

to maximum rating conditions for extended periods may affect device reliability. For more information on the available quality and relia-

bility data, see the Quality and Reliability Monitor Report at http://www.silabs.com/support/quality/pages/default.aspx.

Table 4.1. Absolute Maximum Ratings

Parameter Symbol Test Condition Min Typ Max Unit

Storage temperature range TSTG -40 — +85 °C

External main supply voltage VDDMAX 0 — 3.8 V

External main supply voltage

ramp rate

VDDRAMPMAX — — 1 V / μs

External main supply voltage

with DC-DC in bypass mode

1.85 3.8 V

Voltage on any 5V tolerant

GPIO pin1

VDIGPIN -0.3 — Min of 5.25

and IOVDD

Voltage on non-5V tolerant

GPIO pins

-0.3 — IOVDD+0.3 V

Max RF level at input PRFMAX2G4 — — 10 dBm

Total current into VDD power

lines (source)

IVDDMAX — — 200 mA

Total current into VSS

ground lines (sink)

IVSSMAX — — 200 mA

Current per I/O pin (sink) IIOMAX — — 50 mA

Current per I/O pin (source) — — 50 mA

Current for all I/O pins (sink) IIOALLMAX — — 200 mA

Current for all I/O pins

(source)

— — 200 mA

Voltage difference between

AVDD and VREGVDD

ΔVDD — — 0.3 V

Note:

1. When a GPIO pin is routed to the analog module through the APORT, the maximum voltage = IOVDD.

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4.1.2 Operating Conditions

The following subsections define the operating conditions for the module.

4.1.2.1 General Operating Conditions

Table 4.2. General Operating Conditions

Parameter Symbol Test Condition Min Typ Max Unit

Operating temperature

range

TOP Ambient temperature range -40 25 85 °C

VDD Operating supply volt-

age 1

VVDD DCDC in regulation 2.4 3.3 3.8 V

DCDC in bypass, 50mA load 1.85 3.3 3.8 V

VDD Current IVDD DCDC in bypass — — 200 mA

HFCLK frequency fCORE 0 wait-states (MODE = WS0) 2— — 26 MHz

1 wait-states (MODE = WS1) 2— 38.4 40 MHz

Note:

1. The minimum voltage required in bypass mode is calculated using RBYP from the DC-DC specification table. Requirements for

other loads can be calculated as VVDD_min+ILOAD * RBYP_max

2. In MSC_READCTRL register

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4.1.3 DC-DC Converter

Test conditions: VDCDC_I=3.3 V, VDCDC_O=1.8 V, IDCDC_LOAD=50 mA, Heavy Drive configuration, FDCDC_LN=7 MHz, unless otherwise

indicated.

Table 4.3. DC-DC Converter

Parameter Symbol Test Condition Min Typ Max Unit

Input voltage range VDCDC_I Bypass mode, IDCDC_LOAD = 50

1.85 — VVREGVDD_

MAX

Low noise (LN) mode, 1.8 V out-

put, IDCDC_LOAD = 100 mA, or

Low power (LP) mode, 1.8 V out-

put, IDCDC_LOAD = 10 mA

2.4 — VVREGVDD_

MAX

Low noise (LN) mode, 1.8 V out-

put, IDCDC_LOAD = 200 mA

2.6 — VVREGVDD_

MAX

Output voltage programma-

ble range1

VDCDC_O 1.8 — VVREGVDD V

Regulation DC Accuracy ACCDC Low noise (LN) mode, 1.8 V target

output

1.7 — 1.9 V

Regulation Window2WINREG Low power (LP) mode,

LPCMPBIAS3 = 0, 1.8 V target

output, IDCDC_LOAD ≤ 75 μA

1.63 — 2.2 V

Low power (LP) mode,

LPCMPBIAS3 = 3, 1.8 V target

output, IDCDC_LOAD ≤ 10 mA

1.63 — 2.1 V

Steady-state output ripple VRRadio disabled. — 3 — mVpp

Output voltage under/over-

shoot

VOV CCM Mode (LNFORCECCM3 =

1), Load changes between 0 mA

and 100 mA

— — 150 mV

DCM Mode (LNFORCECCM3 =

0), Load changes between 0 mA

and 10 mA

— — 150 mV

Overshoot during LP to LN

CCM/DCM mode transitions com-

pared to DC level in LN mode

— 200 — mV

Undershoot during BYP/LP to LN

CCM (LNFORCECCM3 = 1) mode

transitions compared to DC level

in LN mode

— 50 — mV

Undershoot during BYP/LP to LN

DCM (LNFORCECCM3 = 0) mode

transitions compared to DC level

in LN mode

— 125 — mV

DC line regulation VREG Input changes between

VVREGVDD_MAX and 2.4 V

— 0.1 — %

DC load regulation IREG Load changes between 0 mA and

100 mA in CCM mode

— 0.1 — %

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Parameter Symbol Test Condition Min Typ Max Unit

Note:

1. Due to internal dropout, the DC-DC output will never be able to reach its input voltage, VVREGVDD

2. LP mode controller is a hysteretic controller that maintains the output voltage within the specified limits

3. In EMU_DCDCMISCCTRL register

4. Drive levels are defined by configuration of the PFETCNT and NFETCNT registers. Light Drive: PFETCNT=NFETCNT=3; Medi-

um Drive: PFETCNT=NFETCNT=7; Heavy Drive: PFETCNT=NFETCNT=15.

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4.1.4 Current Consumption

4.1.4.1 Current Consumption 3.3 V (DC-DC in Bypass Mode)

Unless otherwise indicated, typical conditions are: VDD = 3.3 V. TOP = 25 °C. EMU_PWRCFG_PWRCG=NODCDC.

EMU_DCDCCTRL_DCDCMODE=BYPASS. Minimum and maximum values in this table represent the worst conditions across supply

voltage and process variation at TOP = 25 °C.

Table 4.4. Current Consumption 3.3V without DC/DC

Parameter Symbol Test Condition Min Typ Max Unit

Current consumption in EM0

Active mode with all periph-

erals disabled

IACTIVE 38.4 MHz crystal, CPU running

while loop from flash1

— 130 — μA/MHz

38 MHz HFRCO, CPU running

Prime from flash

— 88 — μA/MHz

38 MHz HFRCO, CPU running

while loop from flash

— 100 105 μA/MHz

38 MHz HFRCO, CPU running

CoreMark from flash

— 112 — μA/MHz

26 MHz HFRCO, CPU running

while loop from flash

— 102 106 μA/MHz

1 MHz HFRCO, CPU running

while loop from flash

— 222 350 μA/MHz

Current consumption in EM1

Sleep mode with all peripher-

als disabled

IEM1 38.4 MHz crystal1— 65 — μA/MHz

38 MHz HFRCO — 35 38 μA/MHz

26 MHz HFRCO — 37 41 μA/MHz

1 MHz HFRCO — 157 275 μA/MHz

Current consumption in EM2

Deep Sleep mode.

IEM2 Full RAM retention and RTCC

running from LFXO

— 3.3 — μA

4 kB RAM retention and RTCC

running from LFRCO

— 3 6.3 μA

Current consumption in EM3

Stop mode

IEM3 Full RAM retention and CRYO-

TIMER running from ULFRCO

— 2.8 6 μA

Current consumption in

EM4H Hibernate mode

IEM4 128 byte RAM retention, RTCC

running from LFXO

— 1.1 — μA

128 byte RAM retention, CRYO-

TIMER running from ULFRCO

— 0.65 — μA

128 byte RAM retention, no RTCC — 0.65 1.3 μA

Current consumption in

EM4S Shutoff mode

IEM4S no RAM retention, no RTCC — 0.04 0.20 μA

Note:

1. CMU_HFXOCTRL_LOWPOWER=0

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4.1.4.2 Current Consumption 3.3 V using DC-DC Converter

Unless otherwise indicated, typical conditions are: VDD = 3.3V. TOP = 25 °C. Minimum and maximum values in this table represent the

worst conditions across supply voltage and process variation at TOP = 25 °C.

Table 4.5. Current Consumption 3.3V with DC-DC

Parameter Symbol Test Condition Min Typ Max Unit

Current consumption in EM0

Active mode with all periph-

erals disabled, DCDC in Low

Noise DCM mode1.

IACTIVE 38.4 MHz crystal, CPU running

while loop from flash2

— 88 — μA/MHz

38 MHz HFRCO, CPU running

Prime from flash

— 63 — μA/MHz

38 MHz HFRCO, CPU running

while loop from flash

— 71 — μA/MHz

38 MHz HFRCO, CPU running

CoreMark from flash

— 78 — μA/MHz

26 MHz HFRCO, CPU running

while loop from flash

— 76 — μA/MHz

Current consumption in EM0

Active mode with all periph-

erals disabled, DCDC in Low

Noise CCM mode3.

38.4 MHz crystal, CPU running

while loop from flash2

— 98 — μA/MHz

38 MHz HFRCO, CPU running

Prime from flash

— 75 — μA/MHz

38 MHz HFRCO, CPU running

while loop from flash

— 81 — μA/MHz

38 MHz HFRCO, CPU running

CoreMark from flash

— 88 — μA/MHz

26 MHz HFRCO, CPU running

while loop from flash

— 94 — μA/MHz

Current consumption in EM1

Sleep mode with all peripher-

als disabled, DCDC in Low

Noise DCM mode1.

IEM1 38.4 MHz crystal2— 49 — μA/MHz

38 MHz HFRCO — 32 — μA/MHz

26 MHz HFRCO — 38 — μA/MHz

Current consumption in EM1

Sleep mode with all peripher-

als disabled, DCDC in Low

Noise CCM mode3.

38.4 MHz crystal2— 61 — μA/MHz

38 MHz HFRCO — 45 — μA/MHz

26 MHz HFRCO — 58 — μA/MHz

Current consumption in EM2

Deep Sleep mode. DCDC in

Low Power mode4.

IEM2 Full RAM retention and RTCC

running from LFXO

— 2.5 — μA

4 kB RAM retention and RTCC

running from LFRCO

— 2.2 — μA

Current consumption in EM3

Stop mode

IEM3 Full RAM retention and CRYO-

TIMER running from ULFRCO

— 2.1 — μA

Current consumption in

EM4H Hibernate mode

IEM4 128 byte RAM retention, RTCC

running from LFXO

— 0.86 — μA

128 byte RAM retention, CRYO-

TIMER running from ULFRCO

— 0.58 — μA

128 byte RAM retention, no RTCC — 0.58 — μA

Current consumption in

EM4S Shutoff mode

IEM4S no RAM retention, no RTCC — 0.04 — μA

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Parameter Symbol Test Condition Min Typ Max Unit

Note:

1. DCDC Low Noise DCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=3.0 MHz (RCOBAND=0), ANASW=DVDD

2. CMU_HFXOCTRL_LOWPOWER=0

3. DCDC Low Noise CCM Mode = Light Drive (PFETCNT=NFETCNT=3), F=6.4 MHz (RCOBAND=4), ANASW=DVDD

4. DCDC Low Power Mode = Medium Drive (PFETCNT=NFETCNT=7), LPOSCDIV=1, LPBIAS=3, LPCILIMSEL=1, ANASW=DVDD

4.1.4.3 Current Consumption 1.85 V (DC-DC in Bypass Mode)

Unless otherwise indicated, typical conditions are: VDD = 1.85 V. TOP = 25 °C. DC-DC in bypass mode. Minimum and maximum values

in this table represent the worst conditions across supply voltage and process variation at TOP = 25 °C.

Table 4.6. Current Consumption 1.85V without DC/DC

Parameter Symbol Test Condition Min Typ Max Unit

Current consumption in EM0

Active mode with all periph-

erals disabled

IACTIVE 38.4 MHz crystal, CPU running

while loop from flash1

— 131 — μA/MHz

38 MHz HFRCO, CPU running

Prime from flash

— 88 — μA/MHz

38 MHz HFRCO, CPU running

while loop from flash

— 100 — μA/MHz

38 MHz HFRCO, CPU running

CoreMark from flash

— 112 — μA/MHz

26 MHz HFRCO, CPU running

while loop from flash

— 102 — μA/MHz

1 MHz HFRCO, CPU running

while loop from flash

— 220 — μA/MHz

Current consumption in EM1

Sleep mode with all peripher-

als disabled

IEM1 38.4 MHz crystal1— 65 — μA/MHz

38 MHz HFRCO — 35 — μA/MHz

26 MHz HFRCO — 37 — μA/MHz

1 MHz HFRCO — 154 — μA/MHz

Current consumption in EM2

Deep Sleep mode

IEM2 Full RAM retention and RTCC

running from LFXO

— 3.2 — μA

4 kB RAM retention and RTCC

running from LFRCO

— 2.8 — μA

Current consumption in EM3

Stop mode

IEM3 Full RAM retention and CRYO-

TIMER running from ULFRCO

— 2.7 — μA

Current consumption in

EM4H Hibernate mode

IEM4 128 byte RAM retention, RTCC

running from LFXO

— 1 — μA

128 byte RAM retention, CRYO-

TIMER running from ULFRCO

— 0.62 — μA

128 byte RAM retention, no RTCC — 0.62 — μA

Current consumption in

EM4S Shutoff mode

IEM4S No RAM retention, no RTCC — 0.02 — μA

Note:

1. CMU_HFXOCTRL_LOWPOWER=0

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4.1.4.4 Current Consumption Using Radio

Unless otherwise indicated, typical conditions are: VDD = 3.3 V. TOP = 25 °C. DC-DC on. Minimum and maximum values in this table

represent the worst conditions across supply voltage and process variation at TOP = 25 °C.

Table 4.7. Current Consumption Using Radio 3.3 V with DC-DC

Parameter Symbol Test Condition Min Typ Max Unit

Current consumption in re-

ceive mode, active packet

reception (MCU in EM1 @

38.4 MHz, peripheral clocks

disabled)

IRX 1 Mbit/s, 2GFSK, F = 2.4 GHz,

Radio clock prescaled by 4

— 9.0 — mA

Current consumption in

transmit mode (MCU in EM1

@ 38.4 MHz, peripheral

clocks disabled)

ITX F = 2.4 GHz, CW, 0 dBm output

power, Radio clock prescaled by 3

— 8.2 — mA

F = 2.4 GHz, CW, 3 dBm output

power

— 16.5 — mA

F = 2.4 GHz, CW, 8 dBm output

power

— 24.6 — mA

RFSENSE current consump-

tion

IRFSENSE — 51 — nA

4.1.5 Wake up times

Table 4.8. Wake up times

Parameter Symbol Test Condition Min Typ Max Unit

Wake up from EM2 Deep

Sleep

tEM2_WU Code execution from flash — 10.7 — μs

Code execution from RAM — 3 — μs

Wakeup time from EM1

Sleep

tEM1_WU Executing from flash — 3 — AHB

Clocks

Executing from RAM — 3 — AHB

Clocks

Wake up from EM3 Stop tEM3_WU Executing from flash — 10.7 — μs

Executing from RAM — 3 — μs

Wake up from EM4H Hiber-

nate1

tEM4H_WU Executing from flash — 60 — μs

Wake up from EM4S Shut-

off1

tEM4S_WU — 290 — μs

Note:

1. Time from wakeup request until first instruction is executed. Wakeup results in device reset.

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4.1.6 Brown Out Detector

For the table below, see Figure 3.2 Power Supply Configuration on page 5 on page 5 to see the relation between the modules external

VDD pin and internal voltage supplies. The module itself has only one external power supply input (VDD).

Table 4.9. Brown Out Detector

Parameter Symbol Test Condition Min Typ Max Unit

AVDD BOD threshold VAVDDBOD AVDD rising — — 1.85 V

AVDD falling 1.62 — — V

AVDD BOD hysteresis VAVDDBOD_HYST — 21 — mV

AVDD response time tAVDDBOD_DELAY Supply drops at 0.1V/μs rate — 2.4 — μs

EM4 BOD threshold VEM4DBOD AVDD rising — — 1.7 V

AVDD falling 1.45 — — V

EM4 BOD hysteresis VEM4BOD_HYST — 46 — mV

EM4 response time tEM4BOD_DELAY Supply drops at 0.1V/μs rate — 300 — μs

4.1.7 Frequency Synthesizer Characteristics

Table 4.10. Frequency Synthesizer Characteristics

Parameter Symbol Test Condition Min Typ Max Unit

RF Synthesizer Frequency

range

FRANGE_2400 2.4 GHz frequency range 2400 — 2483.5 MHz

LO tuning frequency resolu-

tion with 38.4 MHz crystal

FRES_2400 2400 - 2483.5 MHz — — 73 Hz

Maximum frequency devia-

tion with 38.4 MHz crystal

ΔFMAX_2400 — — 1677 kHz

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4.1.8 2.4 GHz RF Transceiver Characteristics

4.1.8.1 RF Transmitter General Characteristics for the 2.4 GHz Band

Unless otherwise indicated, typical conditions are: TOP = 25 °C,VDD = 3.3 V, DC-DC on. Crystal frequency = 38.4 MHz. RF center

frequency 2.45 GHz. Conducted measurement from the antenna feedpoint.

Table 4.11. RF Transmitter General Characteristics for 2.4 GHz Band

Parameter Symbol Test Condition Min Typ Max Unit

Maximum TX power POUTMAX — 8 — dBm

Minimum active TX Power POUTMIN CW -26 — dBm

Output power step size POUTSTEP -5 dBm < Output power < 0 dBm — 1 — dB

0 dBm < output power <

POUTMAX

— 0.5 — dB

Output power variation vs

supply at POUTMAX

POUTVAR_V 1.85 V < VVREGVDD < 3.3 V,

PAVDD connected directly to ex-

ternal supply, for output power = 8

dBm.

— 3.8 — dB

1.85 V < VVREGVDD < 3.3 V using

DC-DC converter

— 2.2 — dB

Output power variation vs

temperature at POUTMAX

POUTVAR_T From -40 to +85 °C, PAVDD con-

nected to DC-DC output

— 1.5 — dB

Output power variation vs RF

frequency at POUTMAX

POUTVAR_F Over RF tuning frequency range — 0.4 — dB

RF tuning frequency range FRANGE 2400 — 2483.5 MHz

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4.1.8.2 RF Receiver General Characteristics for the 2.4 GHz Band

Unless otherwise indicated, typical conditions are: TOP = 25 °C,VDD = 3.3 V, DC-DC on. Crystal frequency =38.4 MHz. RF center fre-

quency 2.440 GHz. Conducted measurement from the antenna feedpoint.

Table 4.12. RF Receiver General Characteristics for 2.4 GHz Band

Parameter Symbol Test Condition Min Typ Max Unit

RF tuning frequency range FRANGE 2400 — 2483.5 MHz

Receive mode maximum

spurious emission

SPURRX 30 MHz to 1 GHz — -57 — dBm

1 GHz to 12 GHz — -47 — dBm

Max spurious emissions dur-

ing active receive mode, per

FCC Part 15.109(a)

SPURRX_FCC 216 MHz to 960 MHz, Conducted

Measurement

— -55.2 — dBm

Above 960 MHz, Conducted

Measurement

— -47.2 — dBm

Level above which

RFSENSE will trigger1

RFSENSETRIG CW at 2.45 GHz — -24 — dBm

Level below which

RFSENSE will not trigger1

RFSENSETHRES — -50 — dBm

Note:

1. RFSENSE performance is only valid from 0 to 85 °C. RFSENSE should be disabled outside this temperature range.

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4.1.8.3 RF Receiver Characteristics for Bluetooth Smart in the 2.4 GHz Band

Unless otherwise indicated, typical conditions are: TOP = 25 °C,VDD = 3.3 V. Crystal frequency = 38.4 MHz. RF center frequency 2.440

GHz. DC-DC on. Conducted measurement from the antenna feedpoint.

Table 4.13. RF Receiver Characteristics for Bluetooth Smart in the 2.4GHz Band

Parameter Symbol Test Condition Min Typ Max Unit

Max usable receiver input

level, 0.1% BER

SAT Signal is reference signal1. Packet

length is 20 bytes.

— 10 — dBm

30.8% Packet Error Rate2SENS With non-ideal signals as speci-

fied in RF-PHY.TS.4.2.2, section

4.6.1

— -90 — dBm

Signal to co-channel interfer-

er, 0.1% BER

C/ICC Desired signal 3 dB above refer-

ence sensitivity

— 8.3 — dB

Blocking, 0.1% BER, Desired

is reference signal at -67

dBm. Interferer is CW in

OOB range.

BLOCKOOB Interferer frequency 30 MHz ≤ f ≤

2000 MHz

— -27 — dBm

Interferer frequency 2003 MHz ≤ f

≤ 2399 MHz

— -32 — dBm

Interferer frequency 2484 MHz ≤ f

≤ 2997 MHz

— -32 — dBm

Interferer frequency 3 GHz ≤ f ≤

12.75 GHz

— -27 — dBm

Intermodulation performance IM Per Core_4.1, Vol 6, Part A, Sec-

tion 4.4 with n = 3

— -25.8 — dBm

Upper limit of input power

range over which RSSI reso-

lution is maintained

RSSIMAX 4 — — dBm

Lower limit of input power

range over which RSSI reso-

lution is maintained

RSSIMIN — — -101 dBm

RSSI resolution RSSIRES Over RSSIMIN to RSSIMAX — — 0.5 dB

Note:

1. Reference signal is defined 2GFSK at -67 dBm, Modulation index = 0.5, BT = 0.5, Bit rate = 1 Mbps, desired data = PRBS9;

interferer data = PRBS15; frequency accuracy better than 1 ppm

2. Receive sensitivity on Bluetooth Smart channel 26 is -86 dBm

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4.1.9 Oscillators

4.1.9.1 LFXO

Table 4.14. LFXO

Parameter Symbol Test Condition Min Typ Max Unit

Crystal frequency fLFXO — 32.768 — kHz

Overall frequency tolerance

in all conditions1

-100 100 ppm

Note:

1. XTAL nominal frequency tolerance = +/- 20 ppm

4.1.9.2 HFXO

Table 4.15. HFXO

Parameter Symbol Test Condition Min Typ Max Unit

Crystal frequency fHFXO - 38.4 - MHz

Crystal frequency tolerance -40 40 ppm

4.1.9.3 LFRCO

Table 4.16. LFRCO

Parameter Symbol Test Condition Min Typ Max Unit

Oscillation frequency fLFRCO ENVREF = 1 in

CMU_LFRCOCTRL

30.474 32.768 34.243 kHz

ENVREF = 0 in

CMU_LFRCOCTRL

30.474 32.768 33.915 kHz

Startup time tLFRCO — 500 — μs

Current consumption 1ILFRCO ENVREF = 1 in

CMU_LFRCOCTRL

— 342 — nA

ENVREF = 0 in

CMU_LFRCOCTRL

— 494 — nA

Note:

1. Block is supplied by AVDD if ANASW = 0, or DVDD if ANASW=1 in EMU_PWRCTRL register

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4.1.9.4 HFRCO and AUXHFRCO

Table 4.17. HFRCO and AUXHFRCO

Parameter Symbol Test Condition Min Typ Max Unit

Frequency Accuracy fHFRCO Any frequency band, across sup-

ply voltage and temperature

-2.5 — 2.5 %

Start-up time tHFRCO fHFRCO ≥ 19 MHz — 300 — ns

4 < fHFRCO < 19 MHz — 1 — μs

fHFRCO ≤ 4 MHz — 2.5 — μs

Current consumption on all

supplies

IHFRCO fHFRCO = 38 MHz — 204 228 μA

fHFRCO = 32 MHz — 171 190 μA

fHFRCO = 26 MHz — 147 164 μA

fHFRCO = 19 MHz — 126 138 μA

fHFRCO = 16 MHz — 110 120 μA

fHFRCO = 13 MHz — 100 110 μA

fHFRCO = 7 MHz — 81 91 μA

fHFRCO = 4 MHz — 33 35 μA

fHFRCO = 2 MHz — 31 35 μA

fHFRCO = 1 MHz — 30 35 μA

Step size SSHFRCO Coarse (% of period) — 0.8 — %

Fine (% of period) — 0.1 — %

Period Jitter PJHFRCO — 0.2 — % RMS

4.1.9.5 ULFRCO

Table 4.18. ULFRCO

Parameter Symbol Test Condition Min Typ Max Unit

Oscillation frequency fULFRCO 0.95 1 1.07 kHz

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4.1.10 Flash Memory Characteristics

Table 4.19. Flash Memory Characteristics1

Parameter Symbol Test Condition Min Typ Max Unit

Flash erase cycles before

failure

ECFLASH 10000 — — cycles

Flash data retention RETFLASH 10 — — years

Word (32-bit) programming

time

tW_PROG 20 26 40 μs

Page erase time tPERASE 20 27 40 ms

Mass erase time tMERASE 20 27 40 ms

Device erase time2tDERASE — 60 74 ms

Page erase current3IERASE — — 3 mA

Mass or Device erase cur-

rent3

— — 5 mA

Write current3IWRITE — — 3 mA

Note:

1. Flash data retention information is published in the Quarterly Quality and Reliability Report.

2. Device erase is issued over the AAP interface and erases all flash, SRAM, the Lock Bit (LB) page, and the User data page Lock

Word (ULW)

3. Measured at 25°C

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4.1.11 GPIO

For the table below, see Figure 3.2 Power Supply Configuration on page 5 on page 5 to see the relation between the modules external

VDD pin and internal voltage supplies. The module itself has only one external power supply input (VDD).

Table 4.20. GPIO

Parameter Symbol Test Condition Min Typ Max Unit

Input low voltage VIOIL — — IOVDD*0.3 V

Input high voltage VIOIH IOVDD*0.7 — — V

Output high voltage relative

to IOVDD

VIOOH Sourcing 3 mA, IOVDD ≥ 3 V,

DRIVESTRENGTH1 = WEAK

IOVDD*0.8 — — V

Sourcing 1.2 mA, IOVDD ≥ 1.62

DRIVESTRENGTH1 = WEAK

IOVDD*0.6 — — V

Sourcing 20 mA, IOVDD ≥ 3 V,

DRIVESTRENGTH1 = STRONG

IOVDD*0.8 — — V

Sourcing 8 mA, IOVDD ≥ 1.62 V,

DRIVESTRENGTH1 = STRONG

IOVDD*0.6 — — V

Output low voltage relative to

IOVDD

VIOOL Sinking 3 mA, IOVDD ≥ 3 V,

DRIVESTRENGTH1 = WEAK

— — IOVDD*0.2 V

Sinking 1.2 mA, IOVDD ≥ 1.62 V,

DRIVESTRENGTH1 = WEAK

— — IOVDD*0.4 V

Sinking 20 mA, IOVDD ≥ 3 V,

DRIVESTRENGTH1 = STRONG

— — IOVDD*0.2 V

Sinking 8 mA, IOVDD ≥ 1.62 V,

DRIVESTRENGTH1 = STRONG

— — IOVDD*0.4 V

Input leakage current IIOLEAK All GPIO except LFXO pins, GPIO

≤ IOVDD

— 0.1 30 nA

LFXO Pins, GPIO ≤ IOVDD — 0.1 50 nA

Input leakage current on

5VTOL pads above IOVDD

I5VTOLLEAK IOVDD < GPIO ≤ IOVDD + 2 V — 3.3 15 μA

I/O pin pull-up resistor RPU 30 43 65 kΩ

I/O pin pull-down resistor RPD 30 43 65 kΩ

Pulse width of pulses re-

moved by the glitch suppres-

sion filter

tIOGLITCH 20 25 35 ns

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Parameter Symbol Test Condition Min Typ Max Unit

Output fall time, From 70%

to 30% of VIO

tIOOF CL = 50 pF,

DRIVESTRENGTH1 = STRONG,

SLEWRATE1 = 0x6

— 1.8 — ns

CL = 50 pF,

DRIVESTRENGTH1 = WEAK,

SLEWRATE1 = 0x6

— 4.5 — ns

Output rise time, From 30%

to 70% of VIO

tIOOR CL = 50 pF,

DRIVESTRENGTH1 = STRONG,

SLEWRATE = 0x61

— 2.2 — ns

CL = 50 pF,

DRIVESTRENGTH1 = WEAK,

SLEWRATE1 = 0x6

— 7.4 — ns

Note:

1. In GPIO_Pn_CTRL register

4.1.12 VMON

Table 4.21. VMON

Parameter Symbol Test Condition Min Typ Max Unit

VMON Supply Current IVMON In EM0 or EM1, 1 supply moni-

tored

— 5.8 8.26 μA

In EM0 or EM1, 4 supplies moni-

tored

— 11.8 16.8 μA

In EM2, EM3 or EM4, 1 supply

monitored

— 62 — nA

In EM2, EM3 or EM4, 4 supplies

monitored

— 99 — nA

VMON Loading of Monitored

Supply

ISENSE In EM0 or EM1 — 2 — μA

In EM2, EM3 or EM4 — 2 — nA

Threshold range VVMON_RANGE 1.62 — 3.4 V

Threshold step size NVMON_STESP Coarse — 200 — mV

Fine — 20 — mV

Response time tVMON_RES Supply drops at 1V/μs rate — 460 — ns

Hysteresis VVMON_HYST — 26 — mV

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4.1.13 ADC

For the table below, see Figure 3.2 Power Supply Configuration on page 5 on page 5 to see the relation between the modules external

VDD pin and internal voltage supplies. The module itself has only one external power supply input (VDD).

Table 4.22. ADC

Parameter Symbol Test Condition Min Typ Max Unit

Resolution VRESOLUTION 6 — 12 Bits

Input voltage range VADCIN Single ended 0 — 2*VREF V

Differential -VREF — VREF V

Input range of external refer-

ence voltage, single ended

and differential

VADCREFIN_P 1 — VAVDD V

Power supply rejection1PSRRADC At DC — 80 — dB

Analog input common mode

rejection ratio

CMRRADC At DC — 80 — dB

Current from all supplies, us-

ing internal reference buffer.

Continous operation. WAR-

MUPMODE2 = KEEPADC-

WARM

IADC_CONTI-

NOUS_LP

1 Msps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 1

— 301 350 μA

250 ksps / 4 MHz ADCCLK, BIA-

SPROG = 6, GPBIASACC = 1 3

— 149 — μA

62.5 ksps / 1 MHz ADCCLK,

BIASPROG = 15, GPBIASACC =

1 3

— 91 — μA

Current from all supplies, us-

ing internal reference buffer.

Duty-cycled operation. WAR-

MUPMODE2 = NORMAL

IADC_NORMAL_LP 35 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 1

— 51 — μA

5 ksps / 16 MHz ADCCLK

BIASPROG = 0, GPBIASACC = 1

— 9 — μA

Current from all supplies, us-

ing internal reference buffer.

Duty-cycled operation.

AWARMUPMODE2 = KEEP-

INSTANDBY or KEEPIN-

SLOWACC

IADC_STAND-

BY_LP

125 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 1

— 117 — μA

35 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 1

— 79 — μA

Current from all supplies, us-

ing internal reference buffer.

Continous operation. WAR-

MUPMODE2 = KEEPADC-

WARM

IADC_CONTI-

NOUS_HP

1 Msps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 0

— 345 — μA

250 ksps / 4 MHz ADCCLK, BIA-

SPROG = 6, GPBIASACC = 0 3

— 191 — μA

62.5 ksps / 1 MHz ADCCLK,

BIASPROG = 15, GPBIASACC =

0 3

— 132 — μA

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Parameter Symbol Test Condition Min Typ Max Unit

Current from all supplies, us-

ing internal reference buffer.

Duty-cycled operation. WAR-

MUPMODE2 = NORMAL

IADC_NORMAL_HP 35 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 0

— 102 — μA

5 ksps / 16 MHz ADCCLK

BIASPROG = 0, GPBIASACC = 0

— 17 — μA

Current from all supplies, us-

ing internal reference buffer.

Duty-cycled operation.

AWARMUPMODE2 = KEEP-

INSTANDBY or KEEPIN-

SLOWACC

IADC_STAND-

BY_HP

125 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 0

— 162 — μA

35 ksps / 16 MHz ADCCLK,

BIASPROG = 0, GPBIASACC = 0

— 123 — μA

Current from HFPERCLK IADC_CLK HFPERCLK = 16 MHz — 140 — μA

ADC Clock Frequency fADCCLK — — 16 MHz

Throughput rate fADCRATE — — 1 Msps

Conversion time4tADCCONV 6 bit — 7 — cycles

8 bit — 9 — cycles

12 bit — 13 — cycles

Startup time of reference

generator and ADC core

tADCSTART WARMUPMODE2 = NORMAL — — 5 μs

WARMUPMODE2 = KEEPIN-

STANDBY

— — 2 μs

WARMUPMODE2 = KEEPINSLO-

WACC

— — 1 μs

SNDR at 1Msps and fin =

10kHz

SNDRADC Internal reference, 2.5 V full-scale,

differential (-1.25, 1.25)

58 67 — dB

vrefp_in = 1.25 V direct mode with

2.5 V full-scale, differential

— 68 — dB

Spurious-Free Dynamic

Range (SFDR)

SFDRADC 1 MSamples/s, 10 kHz full-scale

sine wave

— 75 — dB

Input referred ADC noise,

rms

VREF_NOISE Including quantization noise and

distortion

— 380 — μV

Offset Error VADCOFFSETERR -3 0.25 3 LSB

Gain error in ADC VADC_GAIN Using internal reference — -0.2 5 %

Using external reference — -1 — %

Differential non-linearity

(DNL)

DNLADC 12 bit resolution -1 — 2 LSB

Integral non-linearity (INL),

End point method

INLADC 12 bit resolution -6 — 6 LSB

Temperature Sensor Slope VTS_SLOPE — -1.84 — mV/°C

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Parameter Symbol Test Condition Min Typ Max Unit

Note:

1. PSRR is referenced to AVDD when ANASW=0 and to DVDD when ANASW=1 in EMU_PWRCTRL

2. In ADCn_CNTL register

3. In ADCn_BIASPROG register

4. Derived from ADCCLK

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4.1.14 IDAC

For the table below, see Figure 3.2 Power Supply Configuration on page 5 on page 5 to see the relation between the modules external

VDD pin and internal voltage supplies. The module itself has only one external power supply input (VDD).

Table 4.23. IDAC

Parameter Symbol Test Condition Min Typ Max Unit

Number of Ranges NIDAC_RANGES — 4 — -

Output Current IIDAC_OUT RANGSEL1 = RANGE0 0.05 — 1.6 μA

RANGSEL1 = RANGE1 1.6 — 4.7 μA

RANGSEL1 = RANGE2 0.5 — 16 μA

RANGSEL1 = RANGE3 2 — 64 μA

Linear steps within each

range

NIDAC_STEPS — 32 —

Step size SSIDAC RANGSEL1 = RANGE0 — 50 — nA

RANGSEL1 = RANGE1 — 100 — nA

RANGSEL1 = RANGE2 — 500 — nA

RANGSEL1 = RANGE3 — 2 — μA

Total Accuracy, STEPSEL1 =

0x10

ACCIDAC EM0 or EM1, AVDD=3.3 V, T = 25

°C

-2 — 2 %

EM0 or EM1 -18 — 22 %

EM2 or EM3, Source mode,

RANGSEL1 = RANGE0,

AVDD=3.3 V, T = 25 °C

— -2 — %

EM2 or EM3, Source mode,

RANGSEL1 = RANGE1,

AVDD=3.3 V, T = 25 °C

— -1.7 — %

EM2 or EM3, Source mode,

RANGSEL1 = RANGE2,

AVDD=3.3 V, T = 25 °C

— -0.8 — %

EM2 or EM3, Source mode,

RANGSEL1 = RANGE3,

AVDD=3.3 V, T = 25 °C

— -0.5 — %

EM2 or EM3, Sink mode, RANG-

SEL1 = RANGE0, AVDD=3.3 V, T

= 25 °C

— -0.7 — %

EM2 or EM3, Sink mode, RANG-

SEL1 = RANGE1, AVDD=3.3 V, T

= 25 °C

— -0.6 — %

EM2 or EM3, Sink mode, RANG-

SEL1 = RANGE2, AVDD=3.3 V, T

= 25 °C

— -0.5 — %

EM2 or EM3, Sink mode, RANG-

SEL1 = RANGE3, AVDD=3.3 V, T

= 25 °C

— -0.5 — %

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Parameter Symbol Test Condition Min Typ Max Unit

Start up time tIDAC_SU Output within 1% of steady state

value

— 5 — μs

Settling time, (output settled

within 1% of steady state val-

ue)

tIDAC_SETTLE Range setting is changed — 5 — μs

Step value is changed — 1 — μs

Current consumption in EM0

or EM1 2

IIDAC Source mode, excluding output

current

— 8.9 13 μA

Sink mode, excluding output cur-

rent

— 12 16 μA

Current consumption in EM2

or EM32

Source mode, excluding output

current, duty cycle mode, T = 25

°C

— 1.04 — μA

Sink mode, excluding output cur-

rent, duty cycle mode, T = 25 °C

— 1.08 — μA

Source mode, excluding output

current, duty cycle mode, T ≥ 85

°C

— 8.9 — μA

Sink mode, excluding output cur-

rent, duty cycle mode, T ≥ 85 °C

— 12 — μA

Output voltage compliance in

source mode, source current

change relative to current

sourced at 0 V

ICOMP_SRC RANGESEL1=0, output voltage =

min(VIOVDD, VAVDD2-100 mv)

— 0.04 — %

RANGESEL1=1, output voltage =

min(VIOVDD, VAVDD2-100 mV)

— 0.02 — %

RANGESEL1=2, output voltage =

min(VIOVDD, VAVDD2-150 mV)

— 0.02 — %

RANGESEL1=3, output voltage =

min(VIOVDD, VAVDD2-250 mV)

— 0.02 — %

Output voltage compliance in

sink mode, sink current

change relative to current

sunk at IOVDD

ICOMP_SINK RANGESEL1=0, output voltage =

100 mV

— 0.18 — %

RANGESEL1=1, output voltage =

100 mV

— 0.12 — %

RANGESEL1=2, output voltage =

150 mV

— 0.08 — %

RANGESEL1=3, output voltage =

250 mV

— 0.02 — %

Note:

1. In IDAC_CURPROG register

2. The IDAC is supplied by either AVDD, DVDD, or IOVDD based on the setting of ANASW in the EMU_PWRCTRL register and

PWRSEL in the IDAC_CTRL register. Setting PWRSEL to 1 selects IOVDD. With PWRSEL cleared to 0, ANASW selects be-

tween AVDD (0) and DVDD (1).

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4.1.15 Analog Comparator (ACMP)

Table 4.24. ACMP

Parameter Symbol Test Condition Min Typ Max Unit

Input voltage range VACMPIN ACMPVDD =

ACMPn_CTRL_PWRSEL 1

0 — VACMPVDD V

Supply Voltage VACMPVDD BIASPROG2 ≤ 0x10 or FULL-

BIAS2 = 0

1.85 — VVREGVDD_

MAX

0x10 < BIASPROG2 ≤ 0x20 and

FULLBIAS2 = 1

2.1 — VVREGVDD_

MAX

Active current not including

voltage reference

IACMP BIASPROG2 = 1, FULLBIAS2 = 0 — 50 — nA

BIASPROG2 = 0x10, FULLBIAS2

= 0

— 306 — nA

BIASPROG2 = 0x20, FULLBIAS2

= 1

— 74 95 μA

Current consumption of inter-

nal voltage reference

IACMPREF VLP selected as input using 2.5 V

Reference / 4 (0.625 V)

— 50 — nA

VLP selected as input using VDD — 20 — nA

VBDIV selected as input using

1.25 V reference / 1

— 4.1 — μA

VADIV selected as input using

VDD/1

— 2.4 — μA

Hysteresis (VCM = 1.25 V,

BIASPROG2 = 0x10, FULL-

BIAS2 = 1)

VACMPHYST HYSTSEL3 = HYST0 -1.75 0 1.75 mV

HYSTSEL3 = HYST1 10 18 26 mV

HYSTSEL3 = HYST2 21 32 46 mV

HYSTSEL3 = HYST3 27 44 63 mV

HYSTSEL3 = HYST4 32 55 80 mV

HYSTSEL3 = HYST5 38 65 100 mV

HYSTSEL3 = HYST6 43 77 121 mV

HYSTSEL3 = HYST7 47 86 148 mV

HYSTSEL3 = HYST8 -4 0 4 mV

HYSTSEL3 = HYST9 -27 -18 -10 mV

HYSTSEL3 = HYST10 -47 -32 -18 mV

HYSTSEL3 = HYST11 -64 -43 -27 mV

HYSTSEL3 = HYST12 -78 -54 -32 mV

HYSTSEL3 = HYST13 -93 -64 -37 mV

HYSTSEL3 = HYST14 -113 -74 -42 mV

HYSTSEL3 = HYST15 -135 -85 -47 mV

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Electrical Specifications

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Parameter Symbol Test Condition Min Typ Max Unit

Comparator delay4tACMPDELAY BIASPROG2 = 1, FULLBIAS2 = 0 — 30 — μs

BIASPROG2 = 0x10, FULLBIAS2

= 0

— 3.7 — μs

BIASPROG2 = 0x20, FULLBIAS2

= 1

— 35 — ns

Offset voltage VACMPOFFSET BIASPROG2 =0x10, FULLBIAS2

= 1

-35 — 35 mV

Reference Voltage VACMPREF Internal 1.25 V reference 1 1.25 1.47 V

Internal 2.5 V reference 2 2.5 2.8 V

Capacitive Sense Internal

Resistance

RCSRES CSRESSEL5 = 0 — inf — kΩ

CSRESSEL5 = 1 — 15 — kΩ

CSRESSEL5 = 2 — 27 — kΩ

CSRESSEL5 = 3 — 39 — kΩ

CSRESSEL5 = 4 — 51 — kΩ

CSRESSEL5 = 5 — 102 — kΩ

CSRESSEL5 = 6 — 164 — kΩ

CSRESSEL5 = 7 — 239 — kΩ

Note:

1. ACMPVDD is a supply chosen by the setting in ACMPn_CTRL_PWRSEL and may be IOVDD, AVDD or DVDD

2. In ACMPn_CTRL register

3. In ACMPn_HYSTERESIS register

4. ±100 mV differential drive

5. In ACMPn_INPUTSEL register

The total ACMP current is the sum of the contributions from the ACMP and its internal voltage reference as given as:

IACMPTOTAL = IACMP + IACMPREF

IACMPREF is zero if an external voltage reference is used.

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4.1.16 I2C

I2C Standard-mode (Sm)

Table 4.25. I2C Standard-mode (Sm)1

Parameter Symbol Test Condition Min Typ Max Unit

SCL clock frequency2fSCL 0 — 100 kHz

SCL clock low time tLOW 4.7 — — μs

SCL clock high time tHIGH 4 — — μs

SDA set-up time tSU,DAT 250 — — ns

SDA hold time3tHD,DAT 100 — 3450 ns

Repeated START condition

set-up time

tSU,STA 4.7 — — μs

(Repeated) START condition

hold time

tHD,STA 4 — — μs

STOP condition set-up time tSU,STO 4 — — μs

Bus free time between a

STOP and START condition

tBUF 4.7 — — μs

Note:

1. For CLHR set to 0 in the I2Cn_CTRL register

2. For the minimum HFPERCLK frequency required in Standard-mode, refer to the I2C chapter in the reference manual

3. The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW)

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I2C Fast-mode (Fm)

Table 4.26. I2C Fast-mode (Fm)1

Parameter Symbol Test Condition Min Typ Max Unit

SCL clock frequency2fSCL 0 — 400 kHz

SCL clock low time tLOW 1.3 — — μs

SCL clock high time tHIGH 0.6 — — μs

SDA set-up time tSU,DAT 100 — — ns

SDA hold time3tHD,DAT 100 — 900 ns

Repeated START condition

set-up time

tSU,STA 0.6 — — μs

(Repeated) START condition

hold time

tHD,STA 0.6 — — μs

STOP condition set-up time tSU,STO 0.6 — — μs

Bus free time between a

STOP and START condition

tBUF 1.3 — — μs

Note:

1. For CLHR set to 1 in the I2Cn_CTRL register

2. For the minimum HFPERCLK frequency required in Fast-mode, refer to the I2C chapter in the reference manual

3. The maximum SDA hold time (tHD,DAT) needs to be met only when the device does not stretch the low time of SCL (tLOW)

I2C Fast-mode Plus (Fm+)

Table 4.27. I2C Fast-mode Plus (Fm+)1

Parameter Symbol Test Condition Min Typ Max Unit

SCL clock frequency2fSCL 0 — 1000 kHz

SCL clock low time tLOW 0.5 — — μs

SCL clock high time tHIGH 0.26 — — μs

SDA set-up time tSU,DAT 50 — — ns

SDA hold time tHD,DAT 100 — — ns

Repeated START condition

set-up time

tSU,STA 0.26 — — μs

(Repeated) START condition

hold time

tHD,STA 0.26 — — μs

STOP condition set-up time tSU,STO 0.26 — — μs

Bus free time between a

STOP and START condition

tBUF 0.5 — — μs

Note:

1. For CLHR set to 0 or 1 in the I2Cn_CTRL register

2. For the minimum HFPERCLK frequency required in Fast-mode Plus, refer to the I2C chapter in the reference manual

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Electrical Specifications

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4.1.17 USART SPI

SPI Master Timing

Table 4.28. SPI Master Timing

Parameter Symbol Test Condition Min Typ Max Unit

SCLK period 1 2tSCLK 2 *

tHFPERCLK

— — ns

CS to MOSI 1 2tCS_MO 0 — 8 ns

SCLK to MOSI 1 2tSCLK_MO 3 — 20 ns

MISO setup time 1 2tSU_MI IOVDD = 1.62 V 56 — — ns

IOVDD = 3.0 V 37 — — ns

MISO hold time 1 2tH_MI 6 — — ns

Note:

1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)

2. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD)

SCLK

CLKPOL = 0

MOSI

MISO

tCS_MO

tH_MI

tSU_MI

tSCKL_MO

tSCLK

SCLK

CLKPOL = 1

Figure 4.1. SPI Master Timing Diagram

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Electrical Specifications

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SPI Slave Timing

Table 4.29. SPI Slave Timing

Parameter Symbol Test Condition Min Typ Max Unit

SCKL period 1 2tSCLK_sl 2 *

tHFPERCLK

— — ns

SCLK high period1 2tSCLK_hi 3 *

tHFPERCLK

— — ns

SCLK low period 1 2tSCLK_lo 3 *

tHFPERCLK

— — ns

CS active to MISO 1 2tCS_ACT_MI 4 — 50 ns

CS disable to MISO 1 2tCS_DIS_MI 4 — 50 ns

MOSI setup time 1 2tSU_MO 4 — — ns

MOSI hold time 1 2tH_MO 3 + 2 *

tHFPERCLK

— — ns

SCLK to MISO 1 2tSCLK_MI 16 +

tHFPERCLK

— 66 + 2 *

tHFPERCLK

Note:

1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)

2. Measurement done with 8 pF output loading at 10% and 90% of VDD (figure shows 50% of VDD)

SCLK

CLKPOL = 0

MOSI

MISO

tCS_ACT_MI

tSCLK_HI

tSCLK

tSU_MO

tH_MO

tSCLK_MI

tCS_DIS_MI

tSCLK_LO

SCLK

CLKPOL = 1

Figure 4.2. SPI Slave Timing Diagram

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Electrical Specifications

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5. Typical Connection Diagrams

5.1 Power, Ground, Debug and Host UART

Typical power supply, ground and MCU debug and host (NCP) UART connections are shown in the figure below.

Note: The Module Reset signal is recommended to be connected to a GPIO line on the Host CPU.

Figure 5.1. BGM121/BGM123 Connected to a Host CPU with Typical Power Supply, Ground and Debug connections

5.2 SPI Peripheral Connection

The figure below shows how to connect a SPI peripheral device

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Typical Connection Diagrams

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Figure 5.2. SPI Peripheral Connections

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Typical Connection Diagrams

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5.3 I2C Peripheral Connection

The figure below shows how to connect an I2C peripheral.

Figure 5.3. BGM121/BGM123 Module Connected with I2C Device

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Typical Connection Diagrams

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6. Layout Guidelines

For optimal performance of the BGM121/BGM123, please follow the PCB layout guidelines and ground plane recommendations indica-

ted in this section.

6.1 Recommended Placement on the Application PCB

For optimal performance of the BGM121/BGM123 Module, please follow these guidelines:

• Place the module at the edge of the PCB, as shown in the figure below.

• Do not place any metal (traces, components, battery, etc.) within the clearance area of the antenna (shown in the figure below).

• Connect all ground pads directly to a solid ground plane.

• Place the ground vias as close to the ground pads as possible.

Figure 6.1. Recommended Application PCB Layout for the BGM121/BGM123 Module

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Layout Guidelines

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The layouts in the next figure will result in severely degraded RF-performance.

Figure 6.2. Non-optimal Application PCB Layouts for the BGM121/BGM123 Module

Figure 6.3. Effect of Ground Plane on Antenna Efficiency for the BGM121/BGM123

6.2 Effect of Plastic and Metal Materials

The antenna on the BGM121/BGM123 is insensitive to the effects of nearby plastic and other materials with low dielectric constant and

no separation between the BGM121/BGM123 and plastic or other materials is needed.

The antenna on theBGM121/BGM123 is will be affected by nearby metal materials and a separation of 10mm is recommended be-

tween the BGM121/BGM123 and metal materials.

6.3 Locating the Module Close to Human Body

Placing the module in touch or very close to the human body will negatively impact antenna efficiency and reduce range.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Layout Guidelines

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6.4 2D Radiation Pattern Plots

Figure 6.4. Typical 2D Radiation Pattern – Front View

Figure 6.5. Typical 2D Radiation Pattern – Side View

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Layout Guidelines

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Figure 6.6. Typical 2D Radiation Pattern – Top View

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Layout Guidelines

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7. Pin Definitions

7.1 Pin Definitions

Figure 7.1. BGM121/BGM123 Pinout

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Table 7.1. Device Pinout

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

1RESETn Reset input, active low.To apply an external reset source to this pin, it is required to only drive this pin low

during reset, and let the internal pull-up ensure that reset is released.

2GND Ground

3GND Ground

42G4RF_ANT_

IN 50 ohm input pin for the internal 2.4GHz antenna

52G4RF_POR

T50 ohm 2.4GHz RF input and output

6GND Ground

23 DNC Do not connect but leave floating

24 DNC Do not connect but leave floating

25 GND Ground

26 V_BATT 1.85 - 3.8VDC input to the internal DC-DC converter and AVDD.

27 GND Ground

28 V_1V8 1.8V output of the internal DC-DC converter. Internally decoupled so do not use an external decoupling ca-

pacitor.

29 GND Ground

30 DNC Do not connect but leave floating

31 V_IOVDD Digital I/O power supply.

32 GND Ground

47 GND Ground

48 HFXO_IN 38.4MHz XTAL input. Connect to HFXO_OUT.

49 HFXO_OUT 38.4MHz XTAL output. Connect to HFXO_IN.

50 GND Ground

51 GND Ground

52 GND Ground

53 ANT_GND Antenna ground

54 GND Ground

55 GND Ground

56 GND Ground

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 48

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

PD9 BUSCY [ADC0:

APORT3YCH1

ACMP0:

APORT3YCH1

ACMP1:

APORT3YCH1

IDAC0:

APORT1YCH1]

BUSDX [ADC0:

APORT4XCH1

ACMP0:

APORT4XCH1

ACMP1:

APORT4XCH1]

TIM0_CC0 #17

TIM0_CC1 #16

TIM0_CC2 #15

TIM0_CDTI0 #14

TIM0_CDTI1 #13

TIM0_CDTI2 #12

TIM1_CC0 #17

TIM1_CC1 #16

TIM1_CC2 #15

TIM1_CC3 #14 LE-

TIM0_OUT0 #17

LETIM0_OUT1 #16

PCNT0_S0IN #17

PCNT0_S1IN #16

US0_TX #17

US0_RX #16

US0_CLK #15

US0_CS #14

US0_CTS #13

US0_RTS #12

US1_TX #17

US1_RX #16

US1_CLK #15

US1_CS #14

US1_CTS #13

US1_RTS #12

LEU0_TX #17

LEU0_RX #16

I2C0_SDA #17

I2C0_SCL #16

FRC_DCLK #17

FRC_DOUT #16

FRC_DFRAME #15

MODEM_DCLK

#17 MODEM_DIN

#16 MO-

DEM_DOUT #15

MODEM_ANT0

#14 MO-

DEM_ANT1 #13

CMU_CLK0 #4

PRS_CH3 #8

PRS_CH4 #0

PRS_CH5 #6

PRS_CH6 #11

ACMP0_O #17

ACMP1_O #17

8PD10

BUSCX [ADC0:

APORT3XCH2

ACMP0:

APORT3XCH2

ACMP1:

APORT3XCH2

IDAC0:

APORT1XCH2]

BUSDY [ADC0:

APORT4YCH2

ACMP0:

APORT4YCH2

ACMP1:

APORT4YCH2]

TIM0_CC0 #18

TIM0_CC1 #17

TIM0_CC2 #16

TIM0_CDTI0 #15

TIM0_CDTI1 #14

TIM0_CDTI2 #13

TIM1_CC0 #18

TIM1_CC1 #17

TIM1_CC2 #16

TIM1_CC3 #15 LE-

TIM0_OUT0 #18

LETIM0_OUT1 #17

PCNT0_S0IN #18

PCNT0_S1IN #17

US0_TX #18

US0_RX #17

US0_CLK #16

US0_CS #15

US0_CTS #14

US0_RTS #13

US1_TX #18

US1_RX #17

US1_CLK #16

US1_CS #15

US1_CTS #14

US1_RTS #13

LEU0_TX #18

LEU0_RX #17

I2C0_SDA #18

I2C0_SCL #17

FRC_DCLK #18

FRC_DOUT #17

FRC_DFRAME #16

MODEM_DCLK

#18 MODEM_DIN

#17 MO-

DEM_DOUT #16

MODEM_ANT0

#15 MO-

DEM_ANT1 #14

CMU_CLK1 #4

PRS_CH3 #9

PRS_CH4 #1

PRS_CH5 #0

PRS_CH6 #12

ACMP0_O #18

ACMP1_O #18

9PD11

BUSCY [ADC0:

APORT3YCH3

ACMP0:

APORT3YCH3

ACMP1:

APORT3YCH3

IDAC0:

APORT1YCH3]

BUSDX [ADC0:

APORT4XCH3

ACMP0:

APORT4XCH3

ACMP1:

APORT4XCH3]

TIM0_CC0 #19

TIM0_CC1 #18

TIM0_CC2 #17

TIM0_CDTI0 #16

TIM0_CDTI1 #15

TIM0_CDTI2 #14

TIM1_CC0 #19

TIM1_CC1 #18

TIM1_CC2 #17

TIM1_CC3 #16 LE-

TIM0_OUT0 #19

LETIM0_OUT1 #18

PCNT0_S0IN #19

PCNT0_S1IN #18

US0_TX #19

US0_RX #18

US0_CLK #17

US0_CS #16

US0_CTS #15

US0_RTS #14

US1_TX #19

US1_RX #18

US1_CLK #17

US1_CS #16

US1_CTS #15

US1_RTS #14

LEU0_TX #19

LEU0_RX #18

I2C0_SDA #19

I2C0_SCL #18

FRC_DCLK #19

FRC_DOUT #18

FRC_DFRAME #17

MODEM_DCLK

#19 MODEM_DIN

#18 MO-

DEM_DOUT #17

MODEM_ANT0

#16 MO-

DEM_ANT1 #15

PRS_CH3 #10

PRS_CH4 #2

PRS_CH5 #1

PRS_CH6 #13

ACMP0_O #19

ACMP1_O #19

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 49

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

10 PD12

BUSCX [ADC0:

APORT3XCH4

ACMP0:

APORT3XCH4

ACMP1:

APORT3XCH4

IDAC0:

APORT1XCH4]

BUSDY [ADC0:

APORT4YCH4

ACMP0:

APORT4YCH4

ACMP1:

APORT4YCH4]

TIM0_CC0 #20

TIM0_CC1 #19

TIM0_CC2 #18

TIM0_CDTI0 #17

TIM0_CDTI1 #16

TIM0_CDTI2 #15

TIM1_CC0 #20

TIM1_CC1 #19

TIM1_CC2 #18

TIM1_CC3 #17 LE-

TIM0_OUT0 #20

LETIM0_OUT1 #19

PCNT0_S0IN #20

PCNT0_S1IN #19

US0_TX #20

US0_RX #19

US0_CLK #18

US0_CS #17

US0_CTS #16

US0_RTS #15

US1_TX #20

US1_RX #19

US1_CLK #18

US1_CS #17

US1_CTS #16

US1_RTS #15

LEU0_TX #20

LEU0_RX #19

I2C0_SDA #20

I2C0_SCL #19

FRC_DCLK #20

FRC_DOUT #19

FRC_DFRAME #18

MODEM_DCLK

#20 MODEM_DIN

#19 MO-

DEM_DOUT #18

MODEM_ANT0

#17 MO-

DEM_ANT1 #16

PRS_CH3 #11

PRS_CH4 #3

PRS_CH5 #2

PRS_CH6 #14

ACMP0_O #20

ACMP1_O #20

11 PD13

BUSCY [ADC0:

APORT3YCH5

ACMP0:

APORT3YCH5

ACMP1:

APORT3YCH5

IDAC0:

APORT1YCH5]

BUSDX [ADC0:

APORT4XCH5

ACMP0:

APORT4XCH5

ACMP1:

APORT4XCH5]

TIM0_CC0 #21

TIM0_CC1 #20

TIM0_CC2 #19

TIM0_CDTI0 #18

TIM0_CDTI1 #17

TIM0_CDTI2 #16

TIM1_CC0 #21

TIM1_CC1 #20

TIM1_CC2 #19

TIM1_CC3 #18 LE-

TIM0_OUT0 #21

LETIM0_OUT1 #20

PCNT0_S0IN #21

PCNT0_S1IN #20

US0_TX #21

US0_RX #20

US0_CLK #19

US0_CS #18

US0_CTS #17

US0_RTS #16

US1_TX #21

US1_RX #20

US1_CLK #19

US1_CS #18

US1_CTS #17

US1_RTS #16

LEU0_TX #21

LEU0_RX #20

I2C0_SDA #21

I2C0_SCL #20

FRC_DCLK #21

FRC_DOUT #20

FRC_DFRAME #19

MODEM_DCLK

#21 MODEM_DIN

#20 MO-

DEM_DOUT #19

MODEM_ANT0

#18 MO-

DEM_ANT1 #17

PRS_CH3 #12

PRS_CH4 #4

PRS_CH5 #3

PRS_CH6 #15

ACMP0_O #21

ACMP1_O #21

12 PD14

BUSCX [ADC0:

APORT3XCH6

ACMP0:

APORT3XCH6

ACMP1:

APORT3XCH6

IDAC0:

APORT1XCH6]

BUSDY [ADC0:

APORT4YCH6

ACMP0:

APORT4YCH6

ACMP1:

APORT4YCH6]

TIM0_CC0 #22

TIM0_CC1 #21

TIM0_CC2 #20

TIM0_CDTI0 #19

TIM0_CDTI1 #18

TIM0_CDTI2 #17

TIM1_CC0 #22

TIM1_CC1 #21

TIM1_CC2 #20

TIM1_CC3 #19 LE-

TIM0_OUT0 #22

LETIM0_OUT1 #21

PCNT0_S0IN #22

PCNT0_S1IN #21

US0_TX #22

US0_RX #21

US0_CLK #20

US0_CS #19

US0_CTS #18

US0_RTS #17

US1_TX #22

US1_RX #21

US1_CLK #20

US1_CS #19

US1_CTS #18

US1_RTS #17

LEU0_TX #22

LEU0_RX #21

I2C0_SDA #22

I2C0_SCL #21

FRC_DCLK #22

FRC_DOUT #21

FRC_DFRAME #20

MODEM_DCLK

#22 MODEM_DIN

#21 MO-

DEM_DOUT #20

MODEM_ANT0

#19 MO-

DEM_ANT1 #18

CMU_CLK0 #5

PRS_CH3 #13

PRS_CH4 #5

PRS_CH5 #4

PRS_CH6 #16

ACMP0_O #22

ACMP1_O #22

GPIO_EM4WU4

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 50

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

13 PD15

BUSCY [ADC0:

APORT3YCH7

ACMP0:

APORT3YCH7

ACMP1:

APORT3YCH7

IDAC0:

APORT1YCH7]

BUSDX [ADC0:

APORT4XCH7

ACMP0:

APORT4XCH7

ACMP1:

APORT4XCH7]

TIM0_CC0 #23

TIM0_CC1 #22

TIM0_CC2 #21

TIM0_CDTI0 #20

TIM0_CDTI1 #19

TIM0_CDTI2 #18

TIM1_CC0 #23

TIM1_CC1 #22

TIM1_CC2 #21

TIM1_CC3 #20 LE-

TIM0_OUT0 #23

LETIM0_OUT1 #22

PCNT0_S0IN #23

PCNT0_S1IN #22

US0_TX #23

US0_RX #22

US0_CLK #21

US0_CS #20

US0_CTS #19

US0_RTS #18

US1_TX #23

US1_RX #22

US1_CLK #21

US1_CS #20

US1_CTS #19

US1_RTS #18

LEU0_TX #23

LEU0_RX #22

I2C0_SDA #23

I2C0_SCL #22

FRC_DCLK #23

FRC_DOUT #22

FRC_DFRAME #21

MODEM_DCLK

#23 MODEM_DIN

#22 MO-

DEM_DOUT #21

MODEM_ANT0

#20 MO-

DEM_ANT1 #19

CMU_CLK1 #5

PRS_CH3 #14

PRS_CH4 #6

PRS_CH5 #5

PRS_CH6 #17

ACMP0_O #23

ACMP1_O #23

DBG_SWO #2

14 PA0

ADC0_EXTN

BUSCX [ADC0:

APORT3XCH8

ACMP0:

APORT3XCH8

ACMP1:

APORT3XCH8

IDAC0:

APORT1XCH8]

BUSDY [ADC0:

APORT4YCH8

ACMP0:

APORT4YCH8

ACMP1:

APORT4YCH8]

TIM0_CC0 #0

TIM0_CC1 #31

TIM0_CC2 #30

TIM0_CDTI0 #29

TIM0_CDTI1 #28

TIM0_CDTI2 #27

TIM1_CC0 #0

TIM1_CC1 #31

TIM1_CC2 #30

TIM1_CC3 #29 LE-

TIM0_OUT0 #0 LE-

TIM0_OUT1 #31

PCNT0_S0IN #0

PCNT0_S1IN #31

US0_TX #0

US0_RX #31

US0_CLK #30

US0_CS #29

US0_CTS #28

US0_RTS #27

US1_TX #0

US1_RX #31

US1_CLK #30

US1_CS #29

US1_CTS #28

US1_RTS #27

LEU0_TX #0

LEU0_RX #31

I2C0_SDA #0

I2C0_SCL #31

FRC_DCLK #0

FRC_DOUT #31

FRC_DFRAME #30

MODEM_DCLK #0

MODEM_DIN #31

MODEM_DOUT

#30 MO-

DEM_ANT0 #29

MODEM_ANT1

#28

CMU_CLK1 #0

PRS_CH6 #0

PRS_CH7 #10

PRS_CH8 #9

PRS_CH9 #8

ACMP0_O #0

ACMP1_O #0

15 PA1

ADC0_EXTP

BUSCY [ADC0:

APORT3YCH9

ACMP0:

APORT3YCH9

ACMP1:

APORT3YCH9

IDAC0:

APORT1YCH9]

BUSDX [ADC0:

APORT4XCH9

ACMP0:

APORT4XCH9

ACMP1:

APORT4XCH9]

TIM0_CC0 #1

TIM0_CC1 #0

TIM0_CC2 #31

TIM0_CDTI0 #30

TIM0_CDTI1 #29

TIM0_CDTI2 #28

TIM1_CC0 #1

TIM1_CC1 #0

TIM1_CC2 #31

TIM1_CC3 #30 LE-

TIM0_OUT0 #1 LE-

TIM0_OUT1 #0

PCNT0_S0IN #1

PCNT0_S1IN #0

US0_TX #1

US0_RX #0

US0_CLK #31

US0_CS #30

US0_CTS #29

US0_RTS #28

US1_TX #1

US1_RX #0

US1_CLK #31

US1_CS #30

US1_CTS #29

US1_RTS #28

LEU0_TX #1

LEU0_RX #0

I2C0_SDA #1

I2C0_SCL #0

FRC_DCLK #1

FRC_DOUT #0

FRC_DFRAME #31

MODEM_DCLK #1

MODEM_DIN #0

MODEM_DOUT

#31 MO-

DEM_ANT0 #30

MODEM_ANT1

#29

CMU_CLK0 #0

PRS_CH6 #1

PRS_CH7 #0

PRS_CH8 #10

PRS_CH9 #9

ACMP0_O #1

ACMP1_O #1

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 51

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

16 PA2

BUSCX [ADC0:

APORT3XCH10

ACMP0:

APORT3XCH10

ACMP1:

APORT3XCH10

IDAC0:

APORT1XCH10]

BUSDY [ADC0:

APORT4YCH10

ACMP0:

APORT4YCH10

ACMP1:

APORT4YCH10]

TIM0_CC0 #2

TIM0_CC1 #1

TIM0_CC2 #0

TIM0_CDTI0 #31

TIM0_CDTI1 #30

TIM0_CDTI2 #29

TIM1_CC0 #2

TIM1_CC1 #1

TIM1_CC2 #0

TIM1_CC3 #31 LE-

TIM0_OUT0 #2 LE-

TIM0_OUT1 #1

PCNT0_S0IN #2

PCNT0_S1IN #1

US0_TX #2

US0_RX #1

US0_CLK #0

US0_CS #31

US0_CTS #30

US0_RTS #29

US1_TX #2

US1_RX #1

US1_CLK #0

US1_CS #31

US1_CTS #30

US1_RTS #29

LEU0_TX #2

LEU0_RX #1

I2C0_SDA #2

I2C0_SCL #1

FRC_DCLK #2

FRC_DOUT #1

FRC_DFRAME #0

MODEM_DCLK #2

MODEM_DIN #1

MODEM_DOUT #0

MODEM_ANT0

#31 MO-

DEM_ANT1 #30

PRS_CH6 #2

PRS_CH7 #1

PRS_CH8 #0

PRS_CH9 #10

ACMP0_O #2

ACMP1_O #2

17 PA3

BUSCY [ADC0:

APORT3YCH11

ACMP0:

APORT3YCH11

ACMP1:

APORT3YCH11

IDAC0:

APORT1YCH11]

BUSDX [ADC0:

APORT4XCH11

ACMP0:

APORT4XCH11

ACMP1:

APORT4XCH11]

TIM0_CC0 #3

TIM0_CC1 #2

TIM0_CC2 #1

TIM0_CDTI0 #0

TIM0_CDTI1 #31

TIM0_CDTI2 #30

TIM1_CC0 #3

TIM1_CC1 #2

TIM1_CC2 #1

TIM1_CC3 #0 LE-

TIM0_OUT0 #3 LE-

TIM0_OUT1 #2

PCNT0_S0IN #3

PCNT0_S1IN #2

US0_TX #3

US0_RX #2

US0_CLK #1

US0_CS #0

US0_CTS #31

US0_RTS #30

US1_TX #3

US1_RX #2

US1_CLK #1

US1_CS #0

US1_CTS #31

US1_RTS #30

LEU0_TX #3

LEU0_RX #2

I2C0_SDA #3

I2C0_SCL #2

FRC_DCLK #3

FRC_DOUT #2

FRC_DFRAME #1

MODEM_DCLK #3

MODEM_DIN #2

MODEM_DOUT #1

MODEM_ANT0 #0

MODEM_ANT1

#31

PRS_CH6 #3

PRS_CH7 #2

PRS_CH8 #1

PRS_CH9 #0

ACMP0_O #3

ACMP1_O #3

GPIO_EM4WU8

18 PA4

BUSCX [ADC0:

APORT3XCH12

ACMP0:

APORT3XCH12

ACMP1:

APORT3XCH12

IDAC0:

APORT1XCH12]

BUSDY [ADC0:

APORT4YCH12

ACMP0:

APORT4YCH12

ACMP1:

APORT4YCH12]

TIM0_CC0 #4

TIM0_CC1 #3

TIM0_CC2 #2

TIM0_CDTI0 #1

TIM0_CDTI1 #0

TIM0_CDTI2 #31

TIM1_CC0 #4

TIM1_CC1 #3

TIM1_CC2 #2

TIM1_CC3 #1 LE-

TIM0_OUT0 #4 LE-

TIM0_OUT1 #3

PCNT0_S0IN #4

PCNT0_S1IN #3

US0_TX #4

US0_RX #3

US0_CLK #2

US0_CS #1

US0_CTS #0

US0_RTS #31

US1_TX #4

US1_RX #3

US1_CLK #2

US1_CS #1

US1_CTS #0

US1_RTS #31

LEU0_TX #4

LEU0_RX #3

I2C0_SDA #4

I2C0_SCL #3

FRC_DCLK #4

FRC_DOUT #3

FRC_DFRAME #2

MODEM_DCLK #4

MODEM_DIN #3

MODEM_DOUT #2

MODEM_ANT0 #1

MODEM_ANT1 #0

PRS_CH6 #4

PRS_CH7 #3

PRS_CH8 #2

PRS_CH9 #1

ACMP0_O #4

ACMP1_O #4

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 52

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

19 PA5

BUSCY [ADC0:

APORT3YCH13

ACMP0:

APORT3YCH13

ACMP1:

APORT3YCH13

IDAC0:

APORT1YCH13]

BUSDX [ADC0:

APORT4XCH13

ACMP0:

APORT4XCH13

ACMP1:

APORT4XCH13]

TIM0_CC0 #5

TIM0_CC1 #4

TIM0_CC2 #3

TIM0_CDTI0 #2

TIM0_CDTI1 #1

TIM0_CDTI2 #0

TIM1_CC0 #5

TIM1_CC1 #4

TIM1_CC2 #3

TIM1_CC3 #2 LE-

TIM0_OUT0 #5 LE-

TIM0_OUT1 #4

PCNT0_S0IN #5

PCNT0_S1IN #4

US0_TX #5

US0_RX #4

US0_CLK #3

US0_CS #2

US0_CTS #1

US0_RTS #0

US1_TX #5

US1_RX #4

US1_CLK #3

US1_CS #2

US1_CTS #1

US1_RTS #0

LEU0_TX #5

LEU0_RX #4

I2C0_SDA #5

I2C0_SCL #4

FRC_DCLK #5

FRC_DOUT #4

FRC_DFRAME #3

MODEM_DCLK #5

MODEM_DIN #4

MODEM_DOUT #3

MODEM_ANT0 #2

MODEM_ANT1 #1

PRS_CH6 #5

PRS_CH7 #4

PRS_CH8 #3

PRS_CH9 #2

ACMP0_O #5

ACMP1_O #5

20 PB11

BUSCY [ADC0:

APORT3YCH27

ACMP0:

APORT3YCH27

ACMP1:

APORT3YCH27

IDAC0:

APORT1YCH27]

BUSDX [ADC0:

APORT4XCH27

ACMP0:

APORT4XCH27

ACMP1:

APORT4XCH27]

TIM0_CC0 #6

TIM0_CC1 #5

TIM0_CC2 #4

TIM0_CDTI0 #3

TIM0_CDTI1 #2

TIM0_CDTI2 #1

TIM1_CC0 #6

TIM1_CC1 #5

TIM1_CC2 #4

TIM1_CC3 #3 LE-

TIM0_OUT0 #6 LE-

TIM0_OUT1 #5

PCNT0_S0IN #6

PCNT0_S1IN #5

US0_TX #6

US0_RX #5

US0_CLK #4

US0_CS #3

US0_CTS #2

US0_RTS #1

US1_TX #6

US1_RX #5

US1_CLK #4

US1_CS #3

US1_CTS #2

US1_RTS #1

LEU0_TX #6

LEU0_RX #5

I2C0_SDA #6

I2C0_SCL #5

FRC_DCLK #6

FRC_DOUT #5

FRC_DFRAME #4

MODEM_DCLK #6

MODEM_DIN #5

MODEM_DOUT #4

MODEM_ANT0 #3

MODEM_ANT1 #2

PRS_CH6 #6

PRS_CH7 #5

PRS_CH8 #4

PRS_CH9 #3

ACMP0_O #6

ACMP1_O #6

21 PB12

BUSCX [ADC0:

APORT3XCH28

ACMP0:

APORT3XCH28

ACMP1:

APORT3XCH28

IDAC0:

APORT1XCH28]

BUSDY [ADC0:

APORT4YCH28

ACMP0:

APORT4YCH28

ACMP1:

APORT4YCH28]

TIM0_CC0 #7

TIM0_CC1 #6

TIM0_CC2 #5

TIM0_CDTI0 #4

TIM0_CDTI1 #3

TIM0_CDTI2 #2

TIM1_CC0 #7

TIM1_CC1 #6

TIM1_CC2 #5

TIM1_CC3 #4 LE-

TIM0_OUT0 #7 LE-

TIM0_OUT1 #6

PCNT0_S0IN #7

PCNT0_S1IN #6

US0_TX #7

US0_RX #6

US0_CLK #5

US0_CS #4

US0_CTS #3

US0_RTS #2

US1_TX #7

US1_RX #6

US1_CLK #5

US1_CS #4

US1_CTS #3

US1_RTS #2

LEU0_TX #7

LEU0_RX #6

I2C0_SDA #7

I2C0_SCL #6

FRC_DCLK #7

FRC_DOUT #6

FRC_DFRAME #5

MODEM_DCLK #7

MODEM_DIN #6

MODEM_DOUT #5

MODEM_ANT0 #4

MODEM_ANT1 #3

PRS_CH6 #7

PRS_CH7 #6

PRS_CH8 #5

PRS_CH9 #4

ACMP0_O #7

ACMP1_O #7

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 53

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

22 PB13

BUSCY [ADC0:

APORT3YCH29

ACMP0:

APORT3YCH29

ACMP1:

APORT3YCH29

IDAC0:

APORT1YCH29]

BUSDX [ADC0:

APORT4XCH29

ACMP0:

APORT4XCH29

ACMP1:

APORT4XCH29]

TIM0_CC0 #8

TIM0_CC1 #7

TIM0_CC2 #6

TIM0_CDTI0 #5

TIM0_CDTI1 #4

TIM0_CDTI2 #3

TIM1_CC0 #8

TIM1_CC1 #7

TIM1_CC2 #6

TIM1_CC3 #5 LE-

TIM0_OUT0 #8 LE-

TIM0_OUT1 #7

PCNT0_S0IN #8

PCNT0_S1IN #7

US0_TX #8

US0_RX #7

US0_CLK #6

US0_CS #5

US0_CTS #4

US0_RTS #3

US1_TX #8

US1_RX #7

US1_CLK #6

US1_CS #5

US1_CTS #4

US1_RTS #3

LEU0_TX #8

LEU0_RX #7

I2C0_SDA #8

I2C0_SCL #7

FRC_DCLK #8

FRC_DOUT #7

FRC_DFRAME #6

MODEM_DCLK #8

MODEM_DIN #7

MODEM_DOUT #6

MODEM_ANT0 #5

MODEM_ANT1 #4

PRS_CH6 #8

PRS_CH7 #7

PRS_CH8 #6

PRS_CH9 #5

ACMP0_O #8

ACMP1_O #8

DBG_SWO #1

GPIO_EM4WU9

33 PC6

BUSAX [ADC0:

APORT1XCH6

ACMP0:

APORT1XCH6

ACMP1:

APORT1XCH6]

BUSBY [ADC0:

APORT2YCH6

ACMP0:

APORT2YCH6

ACMP1:

APORT2YCH6]

TIM0_CC0 #11

TIM0_CC1 #10

TIM0_CC2 #9

TIM0_CDTI0 #8

TIM0_CDTI1 #7

TIM0_CDTI2 #6

TIM1_CC0 #11

TIM1_CC1 #10

TIM1_CC2 #9

TIM1_CC3 #8 LE-

TIM0_OUT0 #11

LETIM0_OUT1 #10

PCNT0_S0IN #11

PCNT0_S1IN #10

US0_TX #11

US0_RX #10

US0_CLK #9

US0_CS #8

US0_CTS #7

US0_RTS #6

US1_TX #11

US1_RX #10

US1_CLK #9

US1_CS #8

US1_CTS #7

US1_RTS #6

LEU0_TX #11

LEU0_RX #10

I2C0_SDA #11

I2C0_SCL #10

FRC_DCLK #11

FRC_DOUT #10

FRC_DFRAME #9

MODEM_DCLK

#11 MODEM_DIN

#10 MO-

DEM_DOUT #9

MODEM_ANT0 #8

MODEM_ANT1 #7

CMU_CLK0 #2

PRS_CH0 #8

PRS_CH9 #11

PRS_CH10 #0

PRS_CH11 #5

ACMP0_O #11

ACMP1_O #11

34 PC7

BUSAY [ADC0:

APORT1YCH7

ACMP0:

APORT1YCH7

ACMP1:

APORT1YCH7]

BUSBX [ADC0:

APORT2XCH7

ACMP0:

APORT2XCH7

ACMP1:

APORT2XCH7]

TIM0_CC0 #12

TIM0_CC1 #11

TIM0_CC2 #10

TIM0_CDTI0 #9

TIM0_CDTI1 #8

TIM0_CDTI2 #7

TIM1_CC0 #12

TIM1_CC1 #11

TIM1_CC2 #10

TIM1_CC3 #9 LE-

TIM0_OUT0 #12

LETIM0_OUT1 #11

PCNT0_S0IN #12

PCNT0_S1IN #11

US0_TX #12

US0_RX #11

US0_CLK #10

US0_CS #9

US0_CTS #8

US0_RTS #7

US1_TX #12

US1_RX #11

US1_CLK #10

US1_CS #9

US1_CTS #8

US1_RTS #7

LEU0_TX #12

LEU0_RX #11

I2C0_SDA #12

I2C0_SCL #11

FRC_DCLK #12

FRC_DOUT #11

FRC_DFRAME #10

MODEM_DCLK

#12 MODEM_DIN

#11 MO-

DEM_DOUT #10

MODEM_ANT0 #9

MODEM_ANT1 #8

CMU_CLK1 #2

PRS_CH0 #9

PRS_CH9 #12

PRS_CH10 #1

PRS_CH11 #0

ACMP0_O #12

ACMP1_O #12

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 54

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

35 PC8

BUSAX [ADC0:

APORT1XCH8

ACMP0:

APORT1XCH8

ACMP1:

APORT1XCH8]

BUSBY [ADC0:

APORT2YCH8

ACMP0:

APORT2YCH8

ACMP1:

APORT2YCH8]

TIM0_CC0 #13

TIM0_CC1 #12

TIM0_CC2 #11

TIM0_CDTI0 #10

TIM0_CDTI1 #9

TIM0_CDTI2 #8

TIM1_CC0 #13

TIM1_CC1 #12

TIM1_CC2 #11

TIM1_CC3 #10 LE-

TIM0_OUT0 #13

LETIM0_OUT1 #12

PCNT0_S0IN #13

PCNT0_S1IN #12

US0_TX #13

US0_RX #12

US0_CLK #11

US0_CS #10

US0_CTS #9

US0_RTS #8

US1_TX #13

US1_RX #12

US1_CLK #11

US1_CS #10

US1_CTS #9

US1_RTS #8

LEU0_TX #13

LEU0_RX #12

I2C0_SDA #13

I2C0_SCL #12

FRC_DCLK #13

FRC_DOUT #12

FRC_DFRAME #11

MODEM_DCLK

#13 MODEM_DIN

#12 MO-

DEM_DOUT #11

MODEM_ANT0

#10 MO-

DEM_ANT1 #9

PRS_CH0 #10

PRS_CH9 #13

PRS_CH10 #2

PRS_CH11 #1

ACMP0_O #13

ACMP1_O #13

36 PC9

BUSAY [ADC0:

APORT1YCH9

ACMP0:

APORT1YCH9

ACMP1:

APORT1YCH9]

BUSBX [ADC0:

APORT2XCH9

ACMP0:

APORT2XCH9

ACMP1:

APORT2XCH9]

TIM0_CC0 #14

TIM0_CC1 #13

TIM0_CC2 #12

TIM0_CDTI0 #11

TIM0_CDTI1 #10

TIM0_CDTI2 #9

TIM1_CC0 #14

TIM1_CC1 #13

TIM1_CC2 #12

TIM1_CC3 #11 LE-

TIM0_OUT0 #14

LETIM0_OUT1 #13

PCNT0_S0IN #14

PCNT0_S1IN #13

US0_TX #14

US0_RX #13

US0_CLK #12

US0_CS #11

US0_CTS #10

US0_RTS #9

US1_TX #14

US1_RX #13

US1_CLK #12

US1_CS #11

US1_CTS #10

US1_RTS #9

LEU0_TX #14

LEU0_RX #13

I2C0_SDA #14

I2C0_SCL #13

FRC_DCLK #14

FRC_DOUT #13

FRC_DFRAME #12

MODEM_DCLK

#14 MODEM_DIN

#13 MO-

DEM_DOUT #12

MODEM_ANT0

#11 MO-

DEM_ANT1 #10

PRS_CH0 #11

PRS_CH9 #14

PRS_CH10 #3

PRS_CH11 #2

ACMP0_O #14

ACMP1_O #14

37 PC10

BUSAX [ADC0:

APORT1XCH10

ACMP0:

APORT1XCH10

ACMP1:

APORT1XCH10]

BUSBY [ADC0:

APORT2YCH10

ACMP0:

APORT2YCH10

ACMP1:

APORT2YCH10]

TIM0_CC0 #15

TIM0_CC1 #14

TIM0_CC2 #13

TIM0_CDTI0 #12

TIM0_CDTI1 #11

TIM0_CDTI2 #10

TIM1_CC0 #15

TIM1_CC1 #14

TIM1_CC2 #13

TIM1_CC3 #12 LE-

TIM0_OUT0 #15

LETIM0_OUT1 #14

PCNT0_S0IN #15

PCNT0_S1IN #14

US0_TX #15

US0_RX #14

US0_CLK #13

US0_CS #12

US0_CTS #11

US0_RTS #10

US1_TX #15

US1_RX #14

US1_CLK #13

US1_CS #12

US1_CTS #11

US1_RTS #10

LEU0_TX #15

LEU0_RX #14

I2C0_SDA #15

I2C0_SCL #14

FRC_DCLK #15

FRC_DOUT #14

FRC_DFRAME #13

MODEM_DCLK

#15 MODEM_DIN

#14 MO-

DEM_DOUT #13

MODEM_ANT0

#12 MO-

DEM_ANT1 #11

CMU_CLK1 #3

PRS_CH0 #12

PRS_CH9 #15

PRS_CH10 #4

PRS_CH11 #3

ACMP0_O #15

ACMP1_O #15

GPIO_EM4WU12

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 55

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

38 PC11

BUSAY [ADC0:

APORT1YCH11

ACMP0:

APORT1YCH11

ACMP1:

APORT1YCH11]

BUSBX [ADC0:

APORT2XCH11

ACMP0:

APORT2XCH11

ACMP1:

APORT2XCH11]

TIM0_CC0 #16

TIM0_CC1 #15

TIM0_CC2 #14

TIM0_CDTI0 #13

TIM0_CDTI1 #12

TIM0_CDTI2 #11

TIM1_CC0 #16

TIM1_CC1 #15

TIM1_CC2 #14

TIM1_CC3 #13 LE-

TIM0_OUT0 #16

LETIM0_OUT1 #15

PCNT0_S0IN #16

PCNT0_S1IN #15

US0_TX #16

US0_RX #15

US0_CLK #14

US0_CS #13

US0_CTS #12

US0_RTS #11

US1_TX #16

US1_RX #15

US1_CLK #14

US1_CS #13

US1_CTS #12

US1_RTS #11

LEU0_TX #16

LEU0_RX #15

I2C0_SDA #16

I2C0_SCL #15

FRC_DCLK #16

FRC_DOUT #15

FRC_DFRAME #14

MODEM_DCLK

#16 MODEM_DIN

#15 MO-

DEM_DOUT #14

MODEM_ANT0

#13 MO-

DEM_ANT1 #12

CMU_CLK0 #3

PRS_CH0 #13

PRS_CH9 #16

PRS_CH10 #5

PRS_CH11 #4

ACMP0_O #16

ACMP1_O #16

DBG_SWO #3

39 PF0

BUSAX [ADC0:

APORT1XCH16

ACMP0:

APORT1XCH16

ACMP1:

APORT1XCH16]

BUSBY [ADC0:

APORT2YCH16

ACMP0:

APORT2YCH16

ACMP1:

APORT2YCH16]

TIM0_CC0 #24

TIM0_CC1 #23

TIM0_CC2 #22

TIM0_CDTI0 #21

TIM0_CDTI1 #20

TIM0_CDTI2 #19

TIM1_CC0 #24

TIM1_CC1 #23

TIM1_CC2 #22

TIM1_CC3 #21 LE-

TIM0_OUT0 #24

LETIM0_OUT1 #23

PCNT0_S0IN #24

PCNT0_S1IN #23

US0_TX #24

US0_RX #23

US0_CLK #22

US0_CS #21

US0_CTS #20

US0_RTS #19

US1_TX #24

US1_RX #23

US1_CLK #22

US1_CS #21

US1_CTS #20

US1_RTS #19

LEU0_TX #24

LEU0_RX #23

I2C0_SDA #24

I2C0_SCL #23

FRC_DCLK #24

FRC_DOUT #23

FRC_DFRAME #22

MODEM_DCLK

#24 MODEM_DIN

#23 MO-

DEM_DOUT #22

MODEM_ANT0

#21 MO-

DEM_ANT1 #20

PRS_CH0 #0

PRS_CH1 #7

PRS_CH2 #6

PRS_CH3 #5

ACMP0_O #24

ACMP1_O #24

DBG_SWCLKTCK

40 PF1

BUSAY [ADC0:

APORT1YCH17

ACMP0:

APORT1YCH17

ACMP1:

APORT1YCH17]

BUSBX [ADC0:

APORT2XCH17

ACMP0:

APORT2XCH17

ACMP1:

APORT2XCH17]

TIM0_CC0 #25

TIM0_CC1 #24

TIM0_CC2 #23

TIM0_CDTI0 #22

TIM0_CDTI1 #21

TIM0_CDTI2 #20

TIM1_CC0 #25

TIM1_CC1 #24

TIM1_CC2 #23

TIM1_CC3 #22 LE-

TIM0_OUT0 #25

LETIM0_OUT1 #24

PCNT0_S0IN #25

PCNT0_S1IN #24

US0_TX #25

US0_RX #24

US0_CLK #23

US0_CS #22

US0_CTS #21

US0_RTS #20

US1_TX #25

US1_RX #24

US1_CLK #23

US1_CS #22

US1_CTS #21

US1_RTS #20

LEU0_TX #25

LEU0_RX #24

I2C0_SDA #25

I2C0_SCL #24

FRC_DCLK #25

FRC_DOUT #24

FRC_DFRAME #23

MODEM_DCLK

#25 MODEM_DIN

#24 MO-

DEM_DOUT #23

MODEM_ANT0

#22 MO-

DEM_ANT1 #21

PRS_CH0 #1

PRS_CH1 #0

PRS_CH2 #7

PRS_CH3 #6

ACMP0_O #25

ACMP1_O #25

DBG_SWDIOTMS

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 56

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

41 PF2

BUSAX [ADC0:

APORT1XCH18

ACMP0:

APORT1XCH18

ACMP1:

APORT1XCH18]

BUSBY [ADC0:

APORT2YCH18

ACMP0:

APORT2YCH18

ACMP1:

APORT2YCH18]

TIM0_CC0 #26

TIM0_CC1 #25

TIM0_CC2 #24

TIM0_CDTI0 #23

TIM0_CDTI1 #22

TIM0_CDTI2 #21

TIM1_CC0 #26

TIM1_CC1 #25

TIM1_CC2 #24

TIM1_CC3 #23 LE-

TIM0_OUT0 #26

LETIM0_OUT1 #25

PCNT0_S0IN #26

PCNT0_S1IN #25

US0_TX #26

US0_RX #25

US0_CLK #24

US0_CS #23

US0_CTS #22

US0_RTS #21

US1_TX #26

US1_RX #25

US1_CLK #24

US1_CS #23

US1_CTS #22

US1_RTS #21

LEU0_TX #26

LEU0_RX #25

I2C0_SDA #26

I2C0_SCL #25

FRC_DCLK #26

FRC_DOUT #25

FRC_DFRAME #24

MODEM_DCLK

#26 MODEM_DIN

#25 MO-

DEM_DOUT #24

MODEM_ANT0

#23 MO-

DEM_ANT1 #22

CMU_CLK0 #6

PRS_CH0 #2

PRS_CH1 #1

PRS_CH2 #0

PRS_CH3 #7

ACMP0_O #26

ACMP1_O #26

DBG_TDO #0

DBG_SWO #0

GPIO_EM4WU0

42 PF3

BUSAY [ADC0:

APORT1YCH19

ACMP0:

APORT1YCH19

ACMP1:

APORT1YCH19]

BUSBX [ADC0:

APORT2XCH19

ACMP0:

APORT2XCH19

ACMP1:

APORT2XCH19]

TIM0_CC0 #27

TIM0_CC1 #26

TIM0_CC2 #25

TIM0_CDTI0 #24

TIM0_CDTI1 #23

TIM0_CDTI2 #22

TIM1_CC0 #27

TIM1_CC1 #26

TIM1_CC2 #25

TIM1_CC3 #24 LE-

TIM0_OUT0 #27

LETIM0_OUT1 #26

PCNT0_S0IN #27

PCNT0_S1IN #26

US0_TX #27

US0_RX #26

US0_CLK #25

US0_CS #24

US0_CTS #23

US0_RTS #22

US1_TX #27

US1_RX #26

US1_CLK #25

US1_CS #24

US1_CTS #23

US1_RTS #22

LEU0_TX #27

LEU0_RX #26

I2C0_SDA #27

I2C0_SCL #26

FRC_DCLK #27

FRC_DOUT #26

FRC_DFRAME #25

MODEM_DCLK

#27 MODEM_DIN

#26 MO-

DEM_DOUT #25

MODEM_ANT0

#24 MO-

DEM_ANT1 #23

CMU_CLK1 #6

PRS_CH0 #3

PRS_CH1 #2

PRS_CH2 #1

PRS_CH3 #0

ACMP0_O #27

ACMP1_O #27

DBG_TDI #0

43 PF4

BUSAX [ADC0:

APORT1XCH20

ACMP0:

APORT1XCH20

ACMP1:

APORT1XCH20]

BUSBY [ADC0:

APORT2YCH20

ACMP0:

APORT2YCH20

ACMP1:

APORT2YCH20]

TIM0_CC0 #28

TIM0_CC1 #27

TIM0_CC2 #26

TIM0_CDTI0 #25

TIM0_CDTI1 #24

TIM0_CDTI2 #23

TIM1_CC0 #28

TIM1_CC1 #27

TIM1_CC2 #26

TIM1_CC3 #25 LE-

TIM0_OUT0 #28

LETIM0_OUT1 #27

PCNT0_S0IN #28

PCNT0_S1IN #27

US0_TX #28

US0_RX #27

US0_CLK #26

US0_CS #25

US0_CTS #24

US0_RTS #23

US1_TX #28

US1_RX #27

US1_CLK #26

US1_CS #25

US1_CTS #24

US1_RTS #23

LEU0_TX #28

LEU0_RX #27

I2C0_SDA #28

I2C0_SCL #27

FRC_DCLK #28

FRC_DOUT #27

FRC_DFRAME #26

MODEM_DCLK

#28 MODEM_DIN

#27 MO-

DEM_DOUT #26

MODEM_ANT0

#25 MO-

DEM_ANT1 #24

PRS_CH0 #4

PRS_CH1 #3

PRS_CH2 #2

PRS_CH3 #1

ACMP0_O #28

ACMP1_O #28

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 57

Pin Alternate Functionality / Description

Pin # Pin Name Analog Timers Communication Radio Other

44 PF5

BUSAY [ADC0:

APORT1YCH21

ACMP0:

APORT1YCH21

ACMP1:

APORT1YCH21]

BUSBX [ADC0:

APORT2XCH21

ACMP0:

APORT2XCH21

ACMP1:

APORT2XCH21]

TIM0_CC0 #29

TIM0_CC1 #28

TIM0_CC2 #27

TIM0_CDTI0 #26

TIM0_CDTI1 #25

TIM0_CDTI2 #24

TIM1_CC0 #29

TIM1_CC1 #28

TIM1_CC2 #27

TIM1_CC3 #26 LE-

TIM0_OUT0 #29

LETIM0_OUT1 #28

PCNT0_S0IN #29

PCNT0_S1IN #28

US0_TX #29

US0_RX #28

US0_CLK #27

US0_CS #26

US0_CTS #25

US0_RTS #24

US1_TX #29

US1_RX #28

US1_CLK #27

US1_CS #26

US1_CTS #25

US1_RTS #24

LEU0_TX #29

LEU0_RX #28

I2C0_SDA #29

I2C0_SCL #28

FRC_DCLK #29

FRC_DOUT #28

FRC_DFRAME #27

MODEM_DCLK

#29 MODEM_DIN

#28 MO-

DEM_DOUT #27

MODEM_ANT0

#26 MO-

DEM_ANT1 #25

PRS_CH0 #5

PRS_CH1 #4

PRS_CH2 #3

PRS_CH3 #2

ACMP0_O #29

ACMP1_O #29

45 PF6

BUSAX [ADC0:

APORT1XCH22

ACMP0:

APORT1XCH22

ACMP1:

APORT1XCH22]

BUSBY [ADC0:

APORT2YCH22

ACMP0:

APORT2YCH22

ACMP1:

APORT2YCH22]

TIM0_CC0 #30

TIM0_CC1 #29

TIM0_CC2 #28

TIM0_CDTI0 #27

TIM0_CDTI1 #26

TIM0_CDTI2 #25

TIM1_CC0 #30

TIM1_CC1 #29

TIM1_CC2 #28

TIM1_CC3 #27 LE-

TIM0_OUT0 #30

LETIM0_OUT1 #29

PCNT0_S0IN #30

PCNT0_S1IN #29

US0_TX #30

US0_RX #29

US0_CLK #28

US0_CS #27

US0_CTS #26

US0_RTS #25

US1_TX #30

US1_RX #29

US1_CLK #28

US1_CS #27

US1_CTS #26

US1_RTS #25

LEU0_TX #30

LEU0_RX #29

I2C0_SDA #30

I2C0_SCL #29

FRC_DCLK #30

FRC_DOUT #29

FRC_DFRAME #28

MODEM_DCLK

#30 MODEM_DIN

#29 MO-

DEM_DOUT #28

MODEM_ANT0

#27 MO-

DEM_ANT1 #26

CMU_CLK1 #7

PRS_CH0 #6

PRS_CH1 #5

PRS_CH2 #4

PRS_CH3 #3

ACMP0_O #30

ACMP1_O #30

46 PF7

BUSAY [ADC0:

APORT1YCH23

ACMP0:

APORT1YCH23

ACMP1:

APORT1YCH23]

BUSBX [ADC0:

APORT2XCH23

ACMP0:

APORT2XCH23

ACMP1:

APORT2XCH23]

TIM0_CC0 #31

TIM0_CC1 #30

TIM0_CC2 #29

TIM0_CDTI0 #28

TIM0_CDTI1 #27

TIM0_CDTI2 #26

TIM1_CC0 #31

TIM1_CC1 #30

TIM1_CC2 #29

TIM1_CC3 #28 LE-

TIM0_OUT0 #31

LETIM0_OUT1 #30

PCNT0_S0IN #31

PCNT0_S1IN #30

US0_TX #31

US0_RX #30

US0_CLK #29

US0_CS #28

US0_CTS #27

US0_RTS #26

US1_TX #31

US1_RX #30

US1_CLK #29

US1_CS #28

US1_CTS #27

US1_RTS #26

LEU0_TX #31

LEU0_RX #30

I2C0_SDA #31

I2C0_SCL #30

FRC_DCLK #31

FRC_DOUT #30

FRC_DFRAME #29

MODEM_DCLK

#31 MODEM_DIN

#30 MO-

DEM_DOUT #29

MODEM_ANT0

#28 MO-

DEM_ANT1 #27

CMU_CLK0 #7

PRS_CH0 #7

PRS_CH1 #6

PRS_CH2 #5

PRS_CH3 #4

ACMP0_O #31

ACMP1_O #31

GPIO_EM4WU1

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 58

7.1.1 GPIO Overview

The GPIO pins are organized as 16-bit ports indicated by letters A through F, and the individual pins on each port are indicated by a

number from 15 down to 0.

Table 7.2. GPIO Pinout

Port Pin

Port A - - - - - - - - - - PA5

(5V)

PA4

(5V)

PA3

(5V)

PA2

(5V) PA1 PA0

Port B PB13

2 (5V)

PB12

2(5V)

PB11

2 (5V) -----------

Port C - - - - PC11

(5V)

PC10

(5V)

PC9

(5V)

PC8

(5V)

PC7

(5V)

PC6

(5V) ------

Port D PD15

2 (5V)

PD14

2 (5V)

PD13

2 (5V)

PD12

(5V)

PD11

(5V)

PD10

(5V)

PD9

(5V) ---------

Port F - - - - - - - - PF7

(5V)

PF6

(5V)

PF5

(5V)

PF4

(5V)

PF3

(5V)

PF2

(5V)

PF1

(5V)

PF0

(5V)

Note:

1. GPIO with 5V compatibility are indicated by (5V)

2. Pins PA2, PA3, PA4, PB11, PB12, PD13, PD14 and PD15 will not be 5V compatible on all future devices.

In order to preserve upgrade options with full hardware compatibility, do not use the pins listed in Note 2 with 5V domains.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 59

7.2 Alternate Functionality Pinout

A wide selection of alternate functionality is available for multiplexing to various pins. The following table shows the name of the alter-

nate functionality in the first column, followed by columns showing the possible LOCATION bitfield settings.

Note: Some functionality, such as analog interfaces, do not have alternate settings or a LOCATION bitfield. In these cases, the pinout

is shown in the column corresponding to LOCATION 0.

Table 7.3. Alternate functionality overview

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

ACMP0_O

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Analog comparator

ACMP0, digital out-

put.

ACMP1_O

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Analog comparator

ACMP1, digital out-

put.

ADC0_EXTN 0: PA0

Analog to digital

converter ADC0 ex-

ternal reference in-

put negative pin

ADC0_EXTP 0: PA1

Analog to digital

converter ADC0 ex-

ternal reference in-

put positive pin

CMU_CLK0

0: PA1

2: PC6

3: PC11

4: PD9

5: PD14

6: PF2

7: PF7

Clock Management

Unit, clock output

number 0.

CMU_CLK1

0: PA0

2: PC7

3: PC10

4: PD10

5: PD15

6: PF3

7: PF6

Clock Management

Unit, clock output

number 1.

DBG_SWCLKTCK 0: PF0

Debug-interface

Serial Wire clock

input and JTAG

Test Clock.

Note that this func-

tion is enabled to

the pin out of reset,

and has a built-in

pull down.

DBG_SWDIOTMS 0: PF1

Debug-interface

Serial Wire data in-

put / output and

JTAG Test Mode

Select.

Note that this func-

tion is enabled to

the pin out of reset,

and has a built-in

pull up.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 60

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

DBG_SWO

0: PF2

1: PB13

2: PD15

3: PC11

Debug-interface

Serial Wire viewer

Output.

Note that this func-

tion is not enabled

after reset, and

must be enabled by

software to be

used.

DBG_TDI 0: PF3

Debug-interface

JTAG Test Data In.

Note that this func-

tion is enabled to

pin out of reset,

and has a built-in

pull up.

DBG_TDO 0: PF2

Debug-interface

JTAG Test Data

Out.

Note that this func-

tion is enabled to

pin out of reset.

FRC_DCLK

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Frame Controller,

Data Sniffer Clock.

FRC_DFRAME

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

Frame Controller,

Data Sniffer Frame

active

FRC_DOUT

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

17: PD10

18: PD11

19:PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

Frame Controller,

Data Sniffer Out-

put.

GPIO_EM4WU0 0: PF2

Pin can be used to

wake the system

up from EM4

GPIO_EM4WU1 0: PF7

Pin can be used to

wake the system

up from EM4

GPIO_EM4WU4 0: PD14

Pin can be used to

wake the system

up from EM4

GPIO_EM4WU8 0: PA3

Pin can be used to

wake the system

up from EM4

GPIO_EM4WU9 0: PB13

Pin can be used to

wake the system

up from EM4

GPIO_EM4WU12 0: PC10

Pin can be used to

wake the system

up from EM4

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 61

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

I2C0_SCL

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

I2C0 Serial Clock

Line input / output.

I2C0_SDA

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

I2C0 Serial Data in-

put / output.

LETIM0_OUT0

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC8

13: PC9

14: PC10

15: PC11

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Low Energy Timer

LETIM0, output

channel 0.

LETIM0_OUT1

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

Low Energy Timer

LETIM0, output

channel 1.

LEU0_RX

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

LEUART0 Receive

input.

LEU0_TX

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

LEUART0 Transmit

output. Also used

as receive input in

half duplex commu-

nication.

LFXTAL_N

Connected internal-

ly to a Low Fre-

quency Crystal

(32.768 kHz).

Leave unconnected

externally.

LFXTAL_P

Connected internal-

ly to a Low Fre-

quency Crystal

(32.768 kHz).

Leave unconnected

externally.

MODEM_ANT0

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11

15: PD10

16: PD11

17: PD12

18: PD13

19: PD14

20: PD15

21: PF0

22: PF1

23: PF2

24: PF3

25: PF4

26: PF5

27: PF6

28: PF7

29: PA0

30: PA1

31: PA2

MODEM antenna

control output 0,

used for antenna

diversity.

MODEM_ANT1

0: PA4

1: PA5

2: PB11

3: PB12

4: PB13

7: PC6

8: PC7

9: PC8

10: PC9

11: PC11

12: PC11

14: PD10

15: PD11

16: PD12

17: PD13

18: PD14

19: PD15

20: PF0

21: PF1

22: PF2

23: PF3

24: PF4

25: PF5

26: PF6

27: PF7

28: PA0

29: PA1

30: PA2

31: PA3

MODEM antenna

control output 1,

used for antenna

diversity.

MODEM_DCLK

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

MODEM data clock

out.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 62

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

MODEM_DIN

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

MODEM data in.

MODEM_DOUT

0: PA2

1: PA3

2: PA4

3:PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

MODEM data out.

PCNT0_S0IN

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Pulse Counter

PCNT0 input num-

ber 0.

PCNT0_S1IN

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

Pulse Counter

PCNT0 input num-

ber 1.

PRS_CH0

0: PF0

1: PF1

2: PF2

3: PF3

4: PF4

5: PF5

6: PF6

7: PF7

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11 Peripheral Reflex

System PRS, chan-

nel 0.

PRS_CH1

0: PF1

1: PF2

2: PF3

3: PF4

4: PF5

5: PF6

6: PF7

7: PF0

Peripheral Reflex

System PRS, chan-

nel 1.

PRS_CH2

0: PF2

1: PF3

2: PF4

3: PF5

4: PF6

5: PF7

6: PF0

7: PF1

Peripheral Reflex

System PRS, chan-

nel 2.

PRS_CH3

0: PF3

1: PF4

2: PF5

3: PF6

4: PF7

5: PF0

6: PF1

7: PF2

8: PD9

9: PD10

10: PD11

11: PD12

12: PD13

13: PD14

14: PD15

Peripheral Reflex

System PRS, chan-

nel 3.

PRS_CH4

0: PD9

1: PD10

2: PD11

3: PD12

4: PD13

5: PD14

6: PD15

Peripheral Reflex

System PRS, chan-

nel 4.

PRS_CH5

0: PD10

1: PD11

2: PD12

3: PD13

4: PD14

5: PD15

6: PD9

Peripheral Reflex

System PRS, chan-

nel 5.

PRS_CH6

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5. PA5

6: PB11

7: PB12

8: PB13

11: PD9

12: PD10

13: PD11

14: PD12

15: PD13

16: PD14

17: PD15 Peripheral Reflex

System PRS, chan-

nel 6.

PRS_CH7

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PA0

Peripheral Reflex

System PRS, chan-

nel 7.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 63

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

PRS_CH8

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PA0

10: PA1

Peripheral Reflex

System PRS, chan-

nel 8.

PRS_CH9

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PA0

9: PA1

10: PA2

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11 Peripheral Reflex

System PRS, chan-

nel 9.

PRS_CH10

0: PC6

1: PC7

2: PC8

3: PC9

4: PC10

5: PC11

Peripheral Reflex

System PRS, chan-

nel 10.

PRS_CH11

0: PC7

1: PC8

2: PC9

3: PC10

4: PC11

5: PC6

Peripheral Reflex

System PRS, chan-

nel 11.

TIM0_CC0

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Timer 0 Capture

Compare input /

output channel 0.

TIM0_CC1

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF12

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

Timer 0 Capture

Compare input /

output channel 1.

TIM0_CC2

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

15: PD9

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

Timer 0 Capture

Compare input /

output channel 2.

TIM0_CDTI0

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11

14: PD9

15: PD10

16: PD11

17: PD12

18: PD13

19: PD14

20: PD15

21: PF0

22: PF1

23: PF2

24: PF3

25: PF4

26: PF5

27: PF6

28: PF7

29: PA0

30: PA1

31: PA2

Timer 0 Compli-

mentary Dead Time

Insertion channel 0.

TIM0_CDTI1

0: PA4

1: PA5

2: PB11

3: PB12

4: PB13

7: PC6

8: PC7

9: PC8

10: PC9

11: PC10

12: PC11

13: PD9

14: PD10

15: PD11

16: PD12

17: PD13

18: PD14

19: PD15

20: PF0

21: PF1

22: PF2

23: PF3

24: PF4

25: PF5

26: PF6

27: PF7

28: PA0

29: PA1

30: PA2

31: PA3

Timer 0 Compli-

mentary Dead Time

Insertion channel 1.

TIM0_CDTI2

0: PA5

1: PB11

2: PB12

3: PB13

6: PC6

7: PC7

8: PC8

9: PC9

10: PC10

11: PC11

12: PD9

13: PD10

14: PD11

15: PD12

16: PD13

17: PD14

18: PD15

19: PF0

20: PF1

21: PF2

22: PF3

23: PF4

24: PF5

25: PF6

26: PF7

27: PA0

28: PA1

29: PA2

30: PA3

31: PA4

Timer 0 Compli-

mentary Dead Time

Insertion channel 2.

TIM1_CC0

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

Timer 1 Capture

Compare input /

output channel 0.

TIM1_CC1

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

225: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

Timer 1 Capture

Compare input /

output channel 1.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 64

Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

TIM1_CC2

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

15: PD9

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

Timer 1 Capture

Compare input /

output channel 2.

TIM1_CC3

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11

14: PD9

15: PD10

16: PD11

17: PD12

18: PD13

19: PD14

20: PD15

21: PF0

22: PF1

23: PF2

24: PF3

25: PF4

26: PF5

27: PF6

28: PF7

29: PA0

30: PA1

31: PA2

Timer 1 Capture

Compare input /

output channel 3.

US0_CLK

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

15: PD9

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

USART0 clock in-

put / output.

US0_CS

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11

14: PD9

15: PD10

16: PD11

17: PD12

18: PD13

19: PD14

20: PD15

21: PF0

22: PF1

23: PF2

24: PF3

25: PF4

26: PF5

27: PF6

28: PF7

29: PA0

30: PA1

31: PA2

USART0 chip se-

lect input / output.

US0_CTS

0: PA4

1: PA5

2: PB11

3: PB12

4: PB13

7: PC6

8: PC7

9: PC8

10: PC9

11: PC10

12: PC11

13: PD9

14: PD10

15: PD11

16: PD12

17: PD13

18: PD14

19: PD15

20: PF0

21: PF1

22: PF2

23: PF3

24: PF4

25: PF5

26: PF6

27: PF7

28: PA0

29: PA1

30: PA2

31: PA3

USART0 Clear To

Send hardware

flow control input.

US0_RTS

0: PA5

1: PB11

2: PB12

3: PB13

6: PC6

7: PC7

8: PC8

9: PC9

10: PC10

11: PC11

12: PD9

13: PD10

14: PD11

15: PD12

16: PD13

17: PD14

18: PD15

19: PF0

20: PF1

21: PF2

22: PF3

23: PF4

24: PF5

25: PF6

26: PF7

27: PA0

28: PA1

29: PA2

30: PA3

31: PA4

USART0 Request

To Send hardware

flow control output.

US0_RX

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

USART0 Asynchro-

nous Receive.

USART0 Synchro-

nous mode Master

Input / Slave Out-

put (MISO).

US0_TX

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

USART0 Asynchro-

nous Transmit. Al-

so used as receive

input in half duplex

communication.

USART0 Synchro-

nous mode Master

Output / Slave In-

put (MOSI).

US1_CLK

0: PA2

1: PA3

2: PA4

3: PA5

4: PB11

5: PB12

6: PB13

9: PC6

10: PC7

11: PC8

12: PC9

13: PC10

14: PC11

15: PD9

16: PD10

17: PD11

18: PD12

19: PD13

20: PD14

21: PD15

22: PF0

23: PF1

24: PF2

25: PF3

26: PF4

27: PF5

28: PF6

29: PF7

30: PA0

31: PA1

USART1 clock in-

put / output.

US1_CS

0: PA3

1: PA4

2: PA5

3: PB11

4: PB12

5: PB13

8: PC6

9: PC7

10: PC8

11: PC9

12: PC10

13: PC11

14: PD9

15: PD10

16: PD11

17: PD12

18: PD13

19: PD14

20: PD15

21: PF0

22: PF1

23: PF2

24: PF3

25: PF4

26: PF5

27: PF6

28: PF7

29: PA0

30: PA1

31: PA2

USART1 chip se-

lect input / output.

US1_CTS

0: PA4

1: PA5

2: PB11

3: PB12

4: PB13

7: PC6

8: PC7

9: PC8

10: PC9

11: PC10

12: PC11

13: PD9

14: PD10

15: PD11

16: PD12

17: PD13

18: PD14

19: PD15

20: PF0

21: PF1

22: PF2

23: PF3

24: PF4

25: PF5

26: PF6

27: PF7

28: PA0

29: PA1

30: PA2

31: PA3

USART1 Clear To

Send hardware

flow control input.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Alternate LOCATION

Functionality 0 - 3 4 - 7 8 - 11 12 - 15 16 - 19 20 - 23 24 - 27 28 - 31 Description

US1_RTS

0: PA5

1: PB11

2: PB12

3: PB13

6: PC6

7: PC7

8: PC8

9: PC9

10: PC10

11: PC11

12: PD9

13: PD10

14: PD11

15: PD12

16: PD13

17: PD14

18: PD15

19: PF0

20: PF1

21: PF2

22: PF3

23: PF4

24: PF5

25: PF6

26: PF7

27: PA0

28: PA1

29: PA2

30: PA3

31: PA4

USART1 Request

To Send hardware

flow control output.

US1_RX

0: PA1

1: PA2

2: PA3

3: PA4

4: PA5

5: PB11

6: PB12

7: PB13

10: PC6

11: PC7

12: PC8

13: PC9

14: PC10

15: PC11

16: PD9

17: PD10

18: PD11

19: PD12

20: PD13

21: PD14

22: PD15

23: PF0

24: PF1

25: PF2

26: PF3

27: PF4

28: PF5

29: PF6

30: PF7

31: PA0

USART1 Asynchro-

nous Receive.

USART1 Synchro-

nous mode Master

Input / Slave Out-

put (MISO).

US1_TX

0: PA0

1: PA1

2: PA2

3: PA3

4: PA4

5: PA5

6: PB11

7: PB12

8: PB13

11: PC6

12: PC7

13: PC8

14: PC9

15: PC10

16: PC11

17: PD9

18: PD10

19: PD11

20: PD12

21: PD13

22: PD14

23: PD15

24: PF0

25: PF1

26: PF2

27: PF3

28: PF4

29: PF5

30: PF6

31: PF7

USART1 Asynchro-

nous Transmit. Al-

so used as receive

input in half duplex

communication.

USART1 Synchro-

nous mode Master

Output / Slave In-

put (MOSI).

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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7.3 Analog Port (APORT)

The Analog Port (APORT) is an infrastructure used to connect chip pins with on-chip analog clients such as analog comparators, ADCs,

and DACs. The APORT consists of wires, switches, and control needed to configurably implement the routes. Please see the device

Reference Manual for a complete description.

PC6 BUSAX

PC8

PC10

PF0

PF2

PF4

PF6

BUSBY

PC7 BUSAY

PC9

PC11

PF1

PF3

PF5

PF7

BUSBX

PD10 BUSCX

PD12

PD14

PA0

PA2

PA4

PB12

BUSDY

PD11 BUSCY

PD13

PD15

PA1

PA3

PA5

PB11

PB13

BUSDX

ACMP0

1X1Y2X2Y3X3Y4X4Y

ACMP1

1X1Y2X2Y3X3Y4X4Y

ADC0

1X1Y2X 2Y3X3Y4X4Y

IDAC0

1X1Y

Figure 7.2. BGM121/BGM123 APORT

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Table 7.4. APORT Client Map

Analog Module Analog Module Channel Shared Bus Pin

ACMP0 APORT1XCH6 BUSAX PC6

APORT1XCH8 PC8

APORT1XCH10 PC10

APORT1XCH16 PF0

APORT1XCH18 PF2

APORT1XCH20 PF4

APORT1XCH22 PF6

ACMP0 APORT1YCH7 BUSAY PC7

APORT1YCH9 PC9

APORT1YCH11 PC11

APORT1YCH17 PF1

APORT1YCH19 PF3

APORT1YCH21 PF5

APORT1YCH23 PF7

ACMP0 APORT2XCH7 BUSBX PC7

APORT2XCH9 PC9

APORT2XCH11 PC11

APORT2XCH17 PF1

APORT2XCH19 PF3

APORT2XCH21 PF5

APORT2XCH23 PF7

ACMP0 APORT2YCH6 BUSBY PC6

APORT2YCH8 PC8

APORT2YCH10 PC10

APORT2YCH16 PF0

APORT2YCH18 PF2

APORT2YCH20 PF4

APORT2YCH22 PF6

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Analog Module Analog Module Channel Shared Bus Pin

ACMP0 APORT3XCH2 BUSCX

APORT3XCH4

APORT3XCH6 PD14

APORT3XCH8 PA0

APORT3XCH10 PA2

APORT3XCH12 PA4

APORT3XCH28

APORT3XCH30

ACMP0 APORT3YCH3 BUSCY

APORT3YCH5 PD13

APORT3YCH7 PD15

APORT3YCH9 PA1

APORT3YCH11 PA3

APORT3YCH13 PA5

APORT3YCH27 PB11

APORT3YCH29 PB13

APORT3YCH31

ACMP0 APORT4XCH3 BUSDX

APORT4XCH5 PD13

APORT4XCH7 PD15

APORT4XCH9 PA1

APORT4XCH11 PA3

APORT4XCH13 PA5

APORT4XCH27 PB11

APORT4XCH29 PB13

APORT4XCH31

ACMP0 APORT4YCH2 BUSDY

APORT4YCH4

APORT4YCH6 PD14

APORT4YCH8 PA0

APORT4YCH10 PA2

APORT4YCH12 PA4

APORT4YCH28

APORT4YCH30

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Analog Module Analog Module Channel Shared Bus Pin

ACMP1 APORT1XCH6 BUSAX PC6

APORT1XCH8 PC8

APORT1XCH10 PC10

APORT1XCH16 PF0

APORT1XCH18 PF2

APORT1XCH20 PF4

APORT1XCH22 PF6

ACMP1 APORT1YCH7 BUSAY PC7

APORT1YCH9 PC9

APORT1YCH11 PC11

APORT1YCH17 PF1

APORT1YCH19 PF3

APORT1YCH21 PF5

APORT1YCH23 PF7

ACMP1 APORT2XCH7 BUSBX PC7

APORT2XCH9 PC9

APORT2XCH11 PC11

APORT2XCH17 PF1

APORT2XCH19 PF3

APORT2XCH21 PF5

APORT2XCH23 PF7

ACMP1 APORT2YCH6 BUSBY PC6

APORT2YCH8 PC8

APORT2YCH10 PC10

APORT2YCH16 PF0

APORT2YCH18 PF2

APORT2YCH20 PF4

APORT2YCH22 PF6

ACMP1 APORT3XCH2 BUSCX

APORT3XCH4

APORT3XCH6 PD14

APORT3XCH8 PA0

APORT3XCH10 PA2

APORT3XCH12 PA4

APORT3XCH28

APORT3XCH30

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Analog Module Analog Module Channel Shared Bus Pin

ACMP1 APORT3YCH3 BUSCY

APORT3YCH5 PD13

APORT3YCH7 PD15

APORT3YCH9 PA1

APORT3YCH11 PA3

APORT3YCH13 PA5

APORT3YCH27 PB11

APORT3YCH29 PB13

APORT3YCH31

ACMP1 APORT4XCH3 BUSDX

APORT4XCH5 PD13

APORT4XCH7 PD15

APORT4XCH9 PA1

APORT4XCH11 PA3

APORT4XCH13 PA5

APORT4XCH27 PB11

APORT4XCH29 PB13

APORT4XCH31

ACMP1 APORT4YCH2 BUSDY

APORT4YCH4

APORT4YCH6 PD14

APORT4YCH8 PA0

APORT4YCH10 PA2

APORT4YCH12 PA4

APORT4YCH28

APORT4YCH30

ADC0 APORT1XCH6 BUSAX PC6

APORT1XCH8 PC8

APORT1XCH10 PC10

APORT1XCH16 PF0

APORT1XCH18 PF2

APORT1XCH20 PF4

APORT1XCH22 PF6

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 71

Analog Module Analog Module Channel Shared Bus Pin

ADC0 APORT1YCH7 BUSAY PC7

APORT1YCH9 PC9

APORT1YCH11 PC11

APORT1YCH17 PF1

APORT1YCH19 PF3

APORT1YCH21 PF5

APORT1YCH23 PF7

ADC0 APORT2XCH7 BUSBX PC7

APORT2XCH9 PC9

APORT2XCH11 PC11

APORT2XCH17 PF1

APORT2XCH19 PF3

APORT2XCH21 PF5

APORT2XCH23 PF7

ADC0 APORT2YCH6 BUSBY PC6

APORT2YCH8 PC8

APORT2YCH10 PC10

APORT2YCH16 PF0

APORT2YCH18 PF2

APORT2YCH20 PF4

APORT2YCH22 PF6

ADC0 APORT3XCH2 BUSCX

APORT3XCH4

APORT3XCH6 PD14

APORT3XCH8 PA0

APORT3XCH10 PA2

APORT3XCH12 PA4

APORT3XCH28

APORT3XCH30

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Analog Module Analog Module Channel Shared Bus Pin

ADC0 APORT3YCH3 BUSCY

APORT3YCH5 PD13

APORT3YCH7 PD15

APORT3YCH9 PA1

APORT3YCH11 PA3

APORT3YCH13 PA5

APORT3YCH27 PB11

APORT3YCH29 PB13

APORT3YCH31

ADC0 APORT4XCH3 BUSDX

APORT4XCH5 PD13

APORT4XCH7 PD15

APORT4XCH9 PA1

APORT4XCH11 PA3

APORT4XCH13 PA5

APORT4XCH27 PB11

APORT4XCH29 PB13

APORT4XCH31

ADC0 APORT4YCH2 BUSDY

APORT4YCH4

APORT4YCH6 PD14

APORT4YCH8 PA0

APORT4YCH10 PA2

APORT4YCH12 PA4

APORT4YCH28

APORT4YCH30

IDAC0 APORT1XCH2 BUSCX

APORT1XCH4

APORT1XCH6 PD14

APORT1XCH8 PA0

APORT1XCH10 PA2

APORT1XCH12 PA4

APORT1XCH28

APORT1XCH30

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

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Analog Module Analog Module Channel Shared Bus Pin

IDAC0 APORT1YCH3 BUSCY

APORT1YCH5 PD13

APORT1YCH7 PD15

APORT1YCH9 PA1

APORT1YCH11 PA3

APORT1YCH13 PA5

APORT1YCH27 PB11

APORT1YCH29 PB13

APORT1YCH31

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Pin Definitions

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 74

8. Package Specifications

8.1 BGM121/BGM123 Dimensions

Figure 8.1. BGM121/BGM123 Package Dimensions

8.2 BGM121/BGM123 Module Dimensions and Footprint

The figure below shows the Module dimensions and footprint.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Package Specifications

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 75

Figure 8.2. BGM121/BGM123 Dimensions and Footprint

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Package Specifications

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8.3 BGM121/BGM123 Land Pattern

The figure below shows the recommended land pattern.

Figure 8.3. BGM121/BGM123 Land Pattern

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Package Specifications

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8.4 BGM121/BGM123 Package Marking

The figure below shows the Module markings printed on the RF-shield.

Figure 8.4. BGM121/BGM123 Package Marking

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Package Specifications

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9. Tape and Reel Specifications

9.1 Tape and Reel Packaging

This section contains information regarding the tape and reel packaging for the BGM121/BGM123 Blue Gecko Module.

9.2 Reel and Tape Specifications

• Reel material: Polystyrene (PS)

• Reel diameter: 13 inches (330 mm)

• Number of modules per reel: 1000 pcs

• Disk deformation, folding whitening and mold imperfections: Not allowed

• Disk set: consists of two 13 inch (330 mm) rotary round disks and one central axis (100 mm)

• Antistatic treatment: Required

•Surface resistivity: 104 - 109 Ω/sq.

Figure 9.1. Reel Dimensions - Side View

Symbol Dimensions [mm]

W0 32.5 ± 0.3

W1 37.1 ± 1.0

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Tape and Reel Specifications

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Figure 9.2. Cover tape information

Symbol Dimensions [mm]

Thickness (T) 0.061

Width (W) 25.5 + 0.2

Figure 9.3. Tape information

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Tape and Reel Specifications

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9.3 Orientation and Tape Feed

The user direction of feed, start and end of tape on reel and orientation of the Modules on the tape are shown in the figures below.

Figure 9.4. Module Orientation and Feed Direction

9.4 Tape and Reel Box Dimensions

Figure 9.5. Tape and Reel Box Dimensions

Symbol Dimensions [mm]

W2368

W3338

W472

9.5 Moisture Sensitivity Level

Reels are delivered in packing which conforms to MSL3 (Moisture Sensitivity Level 3) requirements.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Tape and Reel Specifications

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10. Soldering Recommendations

10.1 Soldering Recommendations

This section describes the soldering recommendations regarding BGM121/BGM123 Module.

BGM121/BGM123 is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the

thermal mass of the entire populated PCB, heat transfer efficiency of the oven, and particular type of solder paste used.

• Refer to technical documentations of particular solder paste for profile configurations.

• Avoid usining more than two reflow cycles.

• Aperture size of the stencil should be 1:1 with the pad size.

• A no-clean, type-3 solder paste is recommended.

• For further recommendation, please refer to the JEDEC/IPC J-STD-020, IPC-SM-782 and IPC 7351 guidelines.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Soldering Recommendations

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11. Certifications

11.1 Bluetooth

The BGM121/BGM123 Bluetooth qualification is pending.

11.2 CE

The BGM121/BGM123 CE certification is pending.

11.3 FCC

The BGM121/BGM123 FCC certification is pending.

11.4 IC

The BGM121/BGM123 IC certification is pending.

11.5 Japan

The BGM121/BGM123 Japan certification is pending.

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Certifications

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12. Revision History

12.1 Revision 0.83

• Minor updates

12.2 Revision 0.82

• Updated electrical characteristics

• Updated package dimensions

• Updated footprint

12.3 Revision 0.81

• Layout guidelines updated

• Reference schematics added

• Tape and Reel specifications added

12.4 Revision 0.80

• Soldering recommendatoions added

• EM4 shutoff maximum current updated

• Radion patterns added

• Package marking added

12.5 Revision 0.79

• Electrical characterisitics updated

12.6 Revision 0.78

• Name of datasheet changed from "BGM12 Datasheet" to "BGM121/BGM123 Datasheet"

• Port D9 / Pin 7 marked as "Reserved".

• Number of GPIO pins reduced from 32 to 29.

• Number of pins connected to Analog Port reduced from 32 to 29.

• Ordering info for full production part numbers included.

12.7 Revision 0.77

• Power, Ground, Debug, Host UART, SPI, I2C Connections figure updated.

12.8 Revision 0.76

• GPIO pin data updated

• Module pinout corrected (V_1V8 and V_BATT exchanged)

• PB14 and PB15 marked DNC (Do Not Connect)

12.9 Revision 0.75

• OPN table updated

• Max TX power updated

12.10 Revision 0.74

• Land pattern added

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Revision History

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 84

12.11 Revision 0.73

• Updated pin definitions

• Updated pinout

12.12 Revision 0.72

• Updated pin definitions

• Updated package specifications

• Added SPI reference schematic

• Updated layout guidelines

12.13 Revision 0.71

• Updated electrical characteristics

12.14 Revision 0.70

• Initial draft

BGM121/BGM123 Blue Gecko Bluetooth ® SiP Module Data Sheet

Revision History

silabs.com | Smart. Connected. Energy-friendly. Rev. 0.83 | 85

Table of Contents

1. Feature List ................................1

2. Ordering Information ............................2

3. System Overview ..............................3

3.1 Introduction...............................3

3.2 Radio.................................3

3.2.1 Antenna Interface ............................3

3.2.2 Wake on Radio .............................4

3.2.3 RFSENSE ..............................4

3.2.4 Packet and State Trace ..........................4

3.2.5 Random Number Generator ........................4

3.3 Power ................................5

3.3.1 Energy Management Unit (EMU) .......................5

3.3.2 DC-DC Converter ............................5

3.4 General Purpose Input/Output (GPIO)......................5

3.5 Clocking ................................6

3.5.1 Clock Management Unit (CMU) .......................6

3.5.2 Internal Oscillators............................6

3.6 Counters/Timers and PWM .........................6

3.6.1 Timer/Counter (TIMER) ..........................6

3.6.2 Real Time Counter and Calendar (RTCC) ....................6

3.6.3 Low Energy Timer (LETIMER)........................6

3.6.4 Ultra Low Power Wake-up Timer (CRYOTIMER) .................6

3.6.5 Pulse Counter (PCNT) ..........................7

3.6.6 Watchdog Timer (WDOG) .........................7

3.7 Communications and Other Digital Peripherals ...................7

3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) ..........7

3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) ..........7

3.7.3 Inter-Integrated Circuit Interface (I2C) .....................7

3.7.4 Peripheral Reflex System (PRS) .......................7

3.8 Security Features.............................7

3.8.1 GPCRC (General Purpose Cyclic Redundancy Check) ...............7

3.8.2 Crypto Accelerator (CRYPTO)........................8

3.9 Analog ................................8

3.9.1 Analog Port (APORT) ..........................8

3.9.2 Analog Comparator (ACMP) ........................8

3.9.3 Analog to Digital Converter (ADC) ......................8

3.9.4 Digital to Analog Current Converter (IDAC) ...................8

3.10 Reset Management Unit (RMU) .......................8

3.11 Core and Memory ............................8

3.11.1 Processor Core ............................8

3.11.2 Memory System Controller (MSC) ......................9

3.11.3 Linked Direct Memory Access Controller (LDMA) .................9

Table of Contents 86

3.12 Memory Map ..............................10

3.13 Configuration Summary ..........................11

4. Electrical Specifications .......................... 12

4.1 Electrical Characteristics ..........................12

4.1.1 Absolute Maximum Ratings ........................12

4.1.2 Operating Conditions ...........................13

4.1.2.1 General Operating Conditions .......................13

4.1.3 DC-DC Converter ............................14

4.1.4 Current Consumption...........................16

4.1.4.1 Current Consumption 3.3 V (DC-DC in Bypass Mode) ...............16

4.1.4.2 Current Consumption 3.3 V using DC-DC Converter ...............17

4.1.4.3 Current Consumption 1.85 V (DC-DC in Bypass Mode) ..............18

4.1.4.4 Current Consumption Using Radio .....................19

4.1.5 Wake up times .............................19

4.1.6 Brown Out Detector ...........................20

4.1.7 Frequency Synthesizer Characteristics .....................20

4.1.8 2.4 GHz RF Transceiver Characteristics ....................21

4.1.8.1 RF Transmitter General Characteristics for the 2.4 GHz Band ............21

4.1.8.2 RF Receiver General Characteristics for the 2.4 GHz Band .............22

4.1.8.3 RF Receiver Characteristics for Bluetooth Smart in the 2.4 GHz Band..........23

4.1.9 Oscillators ..............................24

4.1.9.1 LFXO ...............................24

4.1.9.2 HFXO ...............................24

4.1.9.3 LFRCO ...............................24

4.1.9.4 HFRCO and AUXHFRCO ........................25

4.1.9.5 ULFRCO ..............................25

4.1.10 Flash Memory Characteristics .......................26

4.1.11 GPIO................................27

4.1.12 VMON ...............................28

4.1.13 ADC ................................29

4.1.14 IDAC ................................32

4.1.15 Analog Comparator (ACMP) ........................34

4.1.16 I2C ................................36

4.1.17 USART SPI .............................38

5. Typical Connection Diagrams ........................ 40

5.1 Power, Ground, Debug and Host UART .....................40

5.2 SPI Peripheral Connection .........................40

5.3 I2C Peripheral Connection..........................42

6. Layout Guidelines ............................ 43

6.1 Recommended Placement on the Application PCB .................43

6.2 Effect of Plastic and Metal Materials ......................44

6.3 Locating the Module Close to Human Body ....................44

6.4 2D Radiation Pattern Plots .........................45

7. Pin Definitions .............................. 47

7.1 Pin Definitions ..............................47

Table of Contents 87

7.1.1 GPIO Overview.............................59

7.2 Alternate Functionality Pinout ........................60

7.3 Analog Port (APORT) ...........................67

8. Package Specifications .......................... 75

8.1 BGM121/BGM123 Dimensions ........................75

8.2 BGM121/BGM123 Module Dimensions and Footprint ................75

8.3 BGM121/BGM123 Land Pattern .......................77

8.4 BGM121/BGM123 Package Marking ......................78

9. Tape and Reel Specifications ........................ 79

9.1 Tape and Reel Packaging ..........................79

9.2 Reel and Tape Specifications ........................79

9.3 Orientation and Tape Feed .........................81

9.4 Tape and Reel Box Dimensions ........................81

9.5 Moisture Sensitivity Level ..........................81

10. Soldering Recommendations ........................ 82

10.1 Soldering Recommendations ........................82

11. Certifications .............................. 83

11.1 Bluetooth ...............................83

11.2 CE .................................83

11.3 FCC.................................83

11.4 IC .................................83

11.5 Japan ................................83

12. Revision History............................. 84

12.1 Revision 0.83 .............................84

12.2 Revision 0.82 .............................84

12.3 Revision 0.81 .............................84

12.4 Revision 0.80 .............................84

12.5 Revision 0.79 .............................84

12.6 Revision 0.78 .............................84

12.7 Revision 0.77 .............................84

12.8 Revision 0.76 .............................84

12.9 Revision 0.75 .............................84

12.10 Revision 0.74 .............................84

12.11 Revision 0.73 .............................85

12.12 Revision 0.72 .............................85

12.13 Revision 0.71 .............................85

12.14 Revision 0.70 .............................85

Table of Contents 88

Table of Contents .............................. 86

Table of Contents 89

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