DATA SH EET
Product specification
File under Integrated Circuits, IC06 December 1990
INTEGRATED CIRCUITS
74HC/HCT157
Quad 2-input multiplexer
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
FEATURES
Non-inverting data path
Output capability: standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT157 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT157 are quad 2-input multiplexers which
select 4 bits of data from two sources under the control of
a common data select input (S). The four outputs present
the selected data in the true (non-inverted) form. The
enable input (E) is active LOW. When E is HIGH, all of the
outputs (1Y to 4Y) are forced LOW regardless of all other
input conditions.
Moving the data from two groups of registers to four
common output buses is a common use of the “157”. The
state of the common data select input (S) determines the
particular register from which the data comes. It can also
be used as function generator.
The device is useful for implementing highly irregular logic
by generating any four of the 16 different functions of two
variables with one variable common.
The “157” is the logic implementation of a 4-pole,
2-position switch, where the position of the switch is
determined by the logic levels applied to S.
The logic equations are:
1Y = E.(1l1.S + 1l0.S)
2Y = E.(2l1.S + 2l0.S)
3Y = E.(3l1.S + 3l0.S)
4Y = E.(4l1.S + 4l0.S)
The “157” is identical to the “158” but has non-inverting
(true) outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr= tf= 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW):
PD= CPD ×VCC2×fi+(CL×VCC2×fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
(CL×VCC2×fo) = sum of outputs
CL= output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC HCT
tPHL/ tPLH propagation delay CL= 15 pF; VCC = 5 V
nI0, nI1to nY 11 13 ns
E to nY 11 12 ns
S to nY 12 19 ns
CIinput capacitance 3.5 3.5 pF
CPD power dissipation capacitance per multiplexer notes 1 and 2 70 70 pF
December 1990 3
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1 S common data select input
2, 5, 11, 14 1I0to 4I0data inputs from source 0
3, 6, 10, 13 1I1to 4I1data inputs from source 1
4, 7, 9, 12 1Y to 4Y multiplexer outputs
8 GND ground (0 V)
15 E enable input (active LOW)
16 VCC positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 4
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
Fig.4 Functional diagram.
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
INPUTS OUTPUT
ESnI
0nI1nY
HXXX L
L
L
L
L
L
L
H
H
L
H
X
X
X
X
L
H
L
H
L
H
Fig.5 Logic diagram.
December 1990 5
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr= tf= 6 ns; CL= 50 pF
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC VCC
(V) WAVEFORMS
+25 40 to +85 40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nI0to nY;
nI1to nY
36
13
10
125
25
21
155
31
26
190
38
32
ns 2.0
4.5
6.0
Fig.7
tPHL/ tPLH propagation delay
E to nY 39
14
11
115
23
20
145
29
25
175
35
30
ns 2.0
4.5
6.0
Fig.6
tPHL/ tPLH propagation delay
S to nY 41
15
12
125
25
21
155
31
26
190
38
32
ns 2.0
4.5
6.0
Fig.7
tTHL/ tTLH output transition
time 19
7
6
75
15
13
95
19
16
110
22
19
ns 2.0
4.5
6.0
Fig.6 and Fig.7
December 1990 6
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications.
To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr= tf= 6 ns; CL= 50 pF
INPUT UNIT LOAD COEFFICIENT
nI0
nI1
E
S
1.00
1.00
0.60
1.00
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT VCC
(V) WAVEFORMS
+25 40 to +85 40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nI0to nY;
nI1to nY
16 27 34 41 ns 4.5 Fig.7
tPHL/ tPLH propagation delay
E to nY 15 26 33 39 ns 4.5 Fig.6
tPHL/ tPLH propagation delay
S to nY 22 37 46 56 ns 4.5 Fig.7
tTHL/ tTLH output transition
time 7 15 19 22 ns 4.5 Fig.6 and Fig.7
December 1990 7
Philips Semiconductors Product specification
Quad 2-input multiplexer 74HC/HCT157
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.6 Waveforms showing the enable input (E) to output (nY) propagation delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.7 Waveforms showing the data inputs (nIn) and common data select input (S) to output (nY) propagation
delays.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Philips Semiconductors - PIP - 74HC/HCT157; Quad 2-input multiplexer
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Quad 2-input
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General description
The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a
common data select input (S). The four outputs present the selected data in the true (non-inverted) form. The enable
input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other
input conditions.
Moving the data from two groups of registers to four common output buses is a common use of the '157'. The state
of the common data select input (S) determines the particular register from which the data comes. It can also be used
as function generator.
The device is useful for implementing highly irregular logic by generating any four of the 16 different functions of
two variables with one variable common.
The '157' is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined
by the logic levels applied to S.
The logic equations are:
1Y = E.(1l1.S + 1l0.S)
2Y = E.(2l1.S + 2l00.S)
3Y = E.(3l1.S + 3l0.S)
4Y = E.(4l1.S + 4l0.S)
The '157' is identical to the '158' but has non-inverting (true) outputs.
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Features
Non-inverting data path
Output capability: standard
ICC category: MSI
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Philips Semiconductors - PIP - 74HC/HCT157; Quad 2-input multiplexer
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Applications
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PDF
File
AN99055_1: TDA8798HL - DUAL 8-BIT A/D CONVERTER WITH DPGA DEMONSTRATION BOARD
(date 01-Oct-99)
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Datasheet
Type number Title Publication
release date Datasheet status Page
count File
size
(kB)
Datasheet
74HC/HCT157 Quad 2-input
multiplexer 12/1/1990 Product
specification 7 43
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PDF
File
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Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The
"Logic Package Information" document is required to determine in which package(s) this device is available.
Document Description
1
Download
PDF
File
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic
Family Specifications
2
Download
PDF
File
HCT_PACKAGE_INFO HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
3
Download
PDF
File
HCT_PACKAGE_OUTLINES HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic
Package Outlines
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Parametrics
Type number Package Description Propagation
Delay(ns) Voltage No.
of
Pins
Power
Dissipation
Considerations
Logic
Switching
Levels
Output
Drive
Capability
74HC157D SOT109
(SO16)
Quad 2-
Input
Multiplexer 15 5 Volts
+16 Low Power or
Battery
Applications CMOS Low
74HC157DB SOT338-1
(SSOP16)
Quad 2-
Input
Multiplexer 15 5 Volts
+16 Low Power or
Battery
Applications CMOS Low
74HC157N SOT38-1
(DIP16)
Quad 2-
Input
Multiplexer 15 5 Volts
+16 Low Power or
Battery
Applications CMOS Low
74HC157PW SOT403-1
(TSSOP16)
Quad 2-
Input
Multiplexer 15 5 Volts
+16 Low Power or
Battery
Applications CMOS Low
74HCT157D SOT109
(SO16)
Quad 2-
Input
Multiplexer;
TTL
Enabled
15 5 Volts
+16 Low Power or
Battery
Applications TTL Low
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Philips Semiconductors - PIP - 74HC/HCT157; Quad 2-input multiplexer
74HCT157DB SOT338-1
(SSOP16)
Quad 2-
Input
Multiplexer;
TTL
Enabled
15 5 Volts
+16 Low Power or
Battery
Applications TTL Low
74HCT157N SOT38-1
(DIP16)
Quad 2-
Input
Multiplexer;
TTL
Enabled
15 5 Volts
+16 Low Power or
Battery
Applications TTL Low
74HCT157PW SOT403-1
(TSSOP16)
Quad 2-
Input
Multiplexer;
TTL
Enabled
15 5 Volts
+16 Low Power or
Battery
Applications TTL Low
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Products, packages, availability and ordering
Type number North
American type
number
Ordering code
(12NC) Marking/Packing
Download
PDF
File
Discretes
packing info
Package Device status Buy online
74HC157D 74HC157D 9337 137 40652 Standard Marking
* Bulk Pack,
CECC
SOT109
(SO16) Full production
-
74HC157D-T 9337 137 40653 Standard Marking
* Reel Pack,
SMD, 13", CECC
SOT109
(SO16) Full production
-
74HC157DB 74HC157DB 9351 868 70112 Standard Marking
* Bulk Pack SOT338-1
(SSOP16) Full production
-
74HC157DB-
T 9351 868 70118 Standard Marking
* Reel Pack,
SMD, 13"
SOT338-1
(SSOP16) Full production
-
74HC157N 74HC157N 9336 693 40652 Standard Marking
* Bulk Pack,
CECC
SOT38-1
(DIP16) Full production
-
74HC157PW 74HC157PW 9351 868 80112 Standard Marking
* Bulk Pack
SOT403-1
(TSSOP16)
Full production
-
74HC157PW-
T 9351 868 80118 Standard Marking
* Reel Pack,
SMD, 13"
SOT403-1
(TSSOP16)
Full production
-
74HCT157D 74HCT157D 9337 137 50652 Standard Marking
* Bulk Pack,
CECC
SOT109
(SO16) Full production
-
74HCT157D-
T 9337 137 50653 Standard Marking
* Reel Pack,
SMD, 13", CECC
SOT109
(SO16) Full production
-
74HCT157DB 74HCT157DB 9351 885 60112 Standard Marking
* Bulk Pack SOT338-1
(SSOP16) Full production
-
74HCT157DB-
T 9351 885 60118 Standard Marking
* Reel Pack,
SMD, 13"
SOT338-1
(SSOP16) Full production
-
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Philips Semiconductors - PIP - 74HC/HCT157; Quad 2-input multiplexer
74HCT157N 74HCT157N 9336 699 70652 Standard Marking
* Bulk Pack,
CECC
SOT38-1
(DIP16) Full production
-
74HCT157PW 74HCT157PW 9351 885 40112 Standard Marking
* Bulk Pack
SOT403-1
(TSSOP16)
Full production
-
74HCT157PW-
T 9351 885 40118 Standard Marking
* Reel Pack,
SMD, 13"
SOT403-1
(TSSOP16)
Full production
-
74HCT157U 9338 249 50029 Uncased
die Full production -
Products in the above table are all in production. Some variants are discontinued; click here for information on these
variants.
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to
74HC/HCT157
74HC/HCT157 links to the similar products page containing an overview of products that are similar in
function or related to the type number(s) as listed on this page. The similar products page includes products from the
same catalog tree(s), relevant selection guides and products from the same functional category.
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Support & tools
Download
PDF
File
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98)
Download
PDF
File
HC/T User Guide(date 01-Nov-97)
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