Data Sheet 1 of 10 Rev. 02, 2008-08-27
All published data at TCASE = 25°C unless otherwise indicated
ESD: Electrostatic discharge sensitive device—observe handling precautions!
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Description
The PTFA091201GL and PTFA091201HL are 120-watt LDMOS FETs
designed for ultra-linear GSM/EDGE power amplifier applications in
the 920 to 960 MHz band. Features include input and output matching,
and thermally-enhanced plastic open-cavity packages with copper
flanges. Manufactured with Infineon's advanced LDMOS process,
these devices provide excellent thermal performance and superior
reliability.
Thermally-Enhanced High Power RF LDMOS FETs
120 W, 920 – 960 MHz
EDGE Modulation Spectrum Performance
VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
36 38 40 42 44 46 48 50
Output Power, avg. (dBm)
Modulation Spectrum (dB)
10
15
20
25
30
35
40
45
50
55
Drain Efficiency (%)
Efficiency
400 KHz
600 KHz
RF Characteristics
EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture)
VDD = 28 V, IDQ = 750 mA, POUT = 50 W (AVG), ƒ = 959.8 MHz
Characteristic Symbol Min Typ Max Unit
Error Vector Magnitude EVM (RMS) —2.5 —%
Modulation Spectrum @ 400 kHz ACPR —–60 —dBc
Modulation Spectrum @ 600 kHz ACPR —–74 —dBc
Gain Gps —18.5 —dB
Drain Efficiency ηD—44 —%
Features
•Thermally-enhanced plastic open-cavity (EPOC™)
packages with copper flanges, Pb-free and RoHS
compliant
•Broadband internal matching
•Typical EDGE performance
- Average output power = 50 W
- Gain = 18.5 dB
- Efficiency = 44%
•Typical CW performance
- Output power at P–1dB = 135 W
- Gain = 17 dB
- Efficiency = 64%
•Integrated ESD protection: Human Body Model,
Class 2 (minimum)
•Excellent thermal stability, low HCI drift
•Capable of handling 10:1 VSWR @ 28 V,
120 W (CW) output power
*See Infineon distributor for future availability.
PTFA091201GL
Package PG-63248-2
PTFA091201HL
Package PG-64248-2
Data Sheet 2 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
RF Characteristics (cont.)
Two–tone Measurements (tested in Infineon test fixture)
VDD = 28 V, IDQ = 750 mA, POUT = 110 W PEP, ƒ = 960 MHz, tone spacing = 1 MHz
Characteristic Symbol Min Typ Max Unit
Gain Gps 18.0 18.5 —dB
Drain Efficiency ηD45 48 —%
Intermodulation Distortion IMD —–28 –26 dBc
DC Characteristics
Characteristic Conditions Symbol Min Typ Max Unit
Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V
Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA
VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA
On-State Resistance VGS = 10 V, VDS = 0.1 V RDS(on) —0.07 —Ω
Operating Gate Voltage VDS = 28 V, IDQ = 750 mA VGS 2.0 2.5 3.0 V
Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA
Maximum Ratings
Parameter Symbol Value Unit
Drain-Source Voltage VDSS 65 V
Gate-Source Voltage VGS –0.5 to +12 V
Junction Temperature TJ200 °C
Total Device Dissipation PD625 W
Above 25°C derate by 3.57 W/°C
Storage Temperature Range TSTG –40 to +150 °C
Thermal Resistance (TCASE = 70°C, 120 W CW, soldered) RθJC 0.28 °C/W
Ordering Information
Type and Version Package Package Description Shipping Marking
PTFA091201GL V1 PG-63248-2 Thermally-enhanced slotted flange, Tray PTFA091201GL
single-ended
PTFA091201HL V1 PG-64248-2 Thermally-enhanced earless flange, Tray PTFA091201HL
single-ended
*See Infineon distributor for future availability.
Data Sheet 3 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Broadband Performance
VDD = 28 V, IDQ = 750 mA, POUT = 120 W
16
17
18
19
20
900 910 920 930 940 950 960
Frequency (MHz)
Gain (dB)
45
50
55
60
65
Return Loss (dB), Efficiency (%)
Gain
Return Loss
Efficiency
-10
-15
-20
-25
Intermodulation Distortion vs. Output Power
VDD = 28 V, IDQ = .750 mA, ƒ1 = 959 MHz, ƒ2 = 960 MHz
-70
-60
-50
-40
-30
-20
-10
36 37 38 39 40 41 42 43 44 45 46 47 48 49
Output Power, Avg (dBm)
IMD (dBc)
3rd Order
7th
5th
Typical Performance (data taken in a production test fixture)
IM3 vs. Output Power at Selected Biases
VDD = 28 V, ƒ1 = 959 MHz, ƒ2 = 960 MHz
series show Idq
-65
-60
-55
-50
-45
-40
-35
-30
-25
-20
37 39 41 43 45 47 49
Output Power, Avg (dBm)
IMD (dBc)
525 mA
940 mA
750 mA
Gain vs. Output Power
VDD = 28 V, ƒ = 960 MHz
16.0
16.5
17.0
17.5
18.0
18.5
19.0
19.5
20.0
38 40 42 44 46 48 50 52 54
Output Power (dBm)
Power Gain (dB)
IDQ
= 750 mA
IDQ = 1125 mA
IDQ = 375 mA
Data Sheet 4 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
EDGE Performance
VDD = 28 V, IDQ = 750 mA, ƒ = 959.8 MHz
0
1
2
3
4
5
6
7
8
9
36 38 40 42 44 46 48 50
Output Power, Avg. (dBm)
RMS EVM (Average %)
.
10
15
20
25
30
35
40
45
50
55
Drain Efficiency (%)
Efficiency
EVM
TCASE = –25°C
TCASE = 25°C
TCASE = 90°C
Output Power (P–1dB) vs. Supply Voltage
IDQ = 750 mA, ƒ = 960 MHz
49.5
50.0
50.5
51.0
51.5
52.0
52.5
24 26 28 30
Supply Voltage (V)
Output Power (dBm)
IS-95 CDMA Performance
VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz
5
10
15
20
25
30
35
40
32 34 36 38 40 42 44 46
Output Power (dBm), Avg.
Drain Efficiency (%)
-80
-70
-60
-50
-40
-30
-20
-10
Adj. Ch. Power Ratio (dBc)
Adj 750 kHz
Efficiency
Alt1 1.98 MHz
Gain & Efficiency vs. Output Power
VDD = 28 V, IDQ = 750 mA, ƒ = 960 MHz
14
15
16
17
18
19
20
40 42 44 46 48 50 52
Output Power (dBm)
Gain (dB)
10
20
30
40
50
60
70
Drain Efficiency (%)
Efficiency
Gain
Typical Performance (cont.)
Data Sheet 5 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Typical Performance (cont.)
0.1
0.3
0.5
0.2
0.4
0.1
0.1
-
W
AV
E
LE
N
GT
H
S T
O
W
A
R
AV
E
LE
N
G
TH
S
T
O
W
AR
D
L
OA
D
-
0
.0
920 MHz
960 MHz
920 MHz
Z Load Z Source
960 MHz
Z0 = 50 Ω
Z Source Z Load
G
S
D
Frequency Z Source ΩZ Load Ω
MHz RjX RjX
920 5.86 –0.32 2.20 0.69
930 5.84 –0.27 2.17 0.69
940 5.85 –0.02 2.16 0.85
950 5.82 0.10 2.15 0.92
960 5.79 0.27 2.13 1.02
Broadband Circuit Impedance
Bias Voltage vs. Temperature
Voltage normalized to typical gate voltage,
series show current
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
-20 0 20 40 60 80 100
Case Temperature (°C)
Normalized Bias Voltage (V)
0.4 A
1.2 A
3.0 A
6.0 A
9.0 A
12.0 A
16.0 A
Data Sheet 6 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
a091201ef_sch
VDD
R3
2KV
C3
0.001µF
C2
0.001µF
Q1
BCP56
R2
1.3KV
QQ1
LM7805
C1
0.001µF
VDD
R5
5.1K V
R4
2KV
R1
1.2KV
l1
R8
10 V
DUT
RF_IN
l5
C7
0.1µF
C5
0.1µF
C4
10µF
35V
C8
0.01µF
C9
33pF
C10
33pF
R6
10 V
C12
7.5pF
C11
1.2pF
C13
0.7pF
l2l3l4l8
l6
l7
C19
33pF
R7
5.1K V
C6
33pF
C24
1.0pF
C25
1.0pF
C27
33pF
L1
C14
33pF
C15
1µF
C16
10µF
50V
C18
10µF
50V
C26
2.4pF
C28
0.5pF
C17
0.1µF
L2
l9l10 l11 l12 l13
C20
1µF
C21
10µF
50V
C22
0.1µF
C23
10µF
50V
RF_OUT
Reference Circuit
Reference circuit schematic for ƒ = 960 MHz
Circuit Assembly Information
DUT PTFA091201GL or PTFA091201HL LDMOS Transistor
PCB 0.76 mm [.030"] thick, εr = 4.5 Rogers TMM4 2 oz. copper
Microstrip Electrical Characteristics at 960 MHz1Dimensions: L x W ( mm) Dimensions: L x W (in.)
l10.072 λ, 50.0 Ω12.27 x 1.40 0.483 x 0.055
l20.115 λ, 50.0 Ω19.53 x 1.40 0.769 x 0.055
l30.029 λ, 50.0 Ω5.08 x 1.40 0.200 x 0.055
l40.062 λ, 7.5 Ω9.53 x 16.15 0.375 x 0.636
l50.149 λ, 70.0 Ω26.31 x 0.71 1.036 x 0.028
l6, l70.122 λ, 55.0 Ω20.96 x 1.17 0.825 x 0.046
l80.027 λ, 7.9 Ω4.06 x 15.24 0.160 x 0.600
l90.103 λ, 7.9 Ω15.75 x 15.24 0.620 x 0.600
l10 0.072 λ, 7.9 Ω11.02 x 15.24 0.434 x 0.600
l11 0.155 λ, 38.0 Ω25.78 x 2.13 1.015 x 0.084
l12 0.013 λ, 50.0 Ω2.24 x 1.40 0.088 x 0.055
l13 0.015 λ, 50.0 Ω2.59 x 1.40 0.102 x 0.055
1Electrical characteristics are rounded.
Data Sheet 7 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Component Description Suggested Manufacturer P/N or Comment
C1, C2, C3 Capacitor, 0.001 µF Digi-Key PCC1772CT-ND
C4 Tantalum capacitor, 10 µF, 35 V Digi-Key 399-1655-2-ND
C5, C7 C17, C22 Capacitor, 0.1 µF Digi-Key PCC104BCT-ND
C6, C9, C10, C14, Ceramic capacitor, 33 pF ATC 100B 330
C19, C27
C8 Capacitor, 0.01 µF ATC 200B 103
C11 Ceramic capacitor, 1.2 pF ATC 100B 1R2
C12 Ceramic capacitor, 7.5 pF ATC 100B 7R5
C13 Ceramic capacitor, 0.7 pF ATC 100B 0R7
C15, C20 Capacitor, 1.0 µF ATC 920C105
C16, C18, C21, C23 Tantalum capacitor, 10 µF, 50 VGarrett Electronics TPSE106K050R0400
C24, C25 Ceramic capacitor, 1.0 pF ATC 100B 1R0
C26 Ceramic capacitor, 2.4 pF ATC 100B 2R4
C28 Ceramic capacitor, 0.5 pF ATC 100B 0R5
L1, L2 Ferrite, 8.9 mm Elna Magnetics BDS 4.6/3/8.9-4S2
Q1 Transistor Infineon Technologies BCP56
QQ1 Voltage regulator National Semiconductor LM7805
R1 Chip Resistor 1.2 k-ohms Digi-Key P1.2KGCT-ND
R2 Chip Resistor 1.3 k-ohms Digi-Key P1.3KGCT-ND
R3 Chip Resistor 2 k-ohms Digi-Key P2KECT-ND
R4 Potentiometer 2 k-ohms Digi-Key 3224W-202ETR-ND
R5, R7 Chip Resistor 5.1 k-ohms Digi-Key P5.1KECT-ND
R6, R8 Chip Resistor 10 ohms Digi-Key P10ECT-ND
A091201in_01 A091201out_01
QQ1
C3
C1
R2
C2
R1
R5
R3
C5
R6 R7
C9
C6
C8
C7
C11
C10
C12
C13
C14
C24
C25 C26
C19
C21 C22
C16
C17
C23
C18
C27
C28
R8
C15
C20
a091201ef_assy
RF_IN RF_OUT
LM L1
R4
Q1
C4
L2
VDD
VDD
VDD
Reference Circuit (cont.)
Reference circuit assembly diagram (not to scale)*
*Gerber files for this circuit available on request
Data Sheet 8 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
C
L
0.064 (.0025) –A–
C
L
4.83±0.51
[.190±.020] C
L
PG-63248-2(G)_po_8-28-08
20.27
[.798]
34.04 ± 0.08
[1.340 ± .003]
3X R0.51+1.14
–0.25
[R.020 ]
+.045
–.010
45° X 2.72
[45° X .107]
45° X 1.78
[45° X .070]
6.
2X R1.63
[R.064]
9.78 ± 0.08
[.385 ± .003]
3.63+0.25
–0.13
[.143 ]
+.010
–.005
Package Outline Specifications
Package PG-63248-2
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. Pins: D = drain, S = source, G = gate.
4. Lead thickness: 0.10 + 0.051/–0.025 mm [.004 +0.002/–0.001 inch].
5. Gold plating thickness: < 0.254 micron [< 10 microinch]
6. Tabs may protrude 0.13 [.005] max from body.
7. All tolerances ± 0.25 [.01] / ± 0.127 [.005] unless specified otherwise.
Data Sheet 9 of 10 Rev. 02, 2008-08-27
PTFA091201GL
PTFA091201HL
Confidential, Limited Internal Distribution
Package Outline Specifications (cont.)
Package PG-64248-2
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. Pins: D = drain, S = source, G = gate.
4. Lead thickness: 0.10 + 0.051/–0.025 mm [.004 +0.002/–0.001 inch].
5. Gold plating thickness: < 0.254 micron [< 10 microinch]
6. Tabs may protrude 0.13 [.005] max from body.
7. All tolerances ± 0.25 [.01] / ± 0.127 [.005] unless specified otherwise.
pg-64248-2(h)_po_8-28-08
9.78 ± 0.08
[.385 ± .003]
20.57 ± 0.08
[.810 ± .003]
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet 10 of 10 Rev. 02, 2008-08-27
PTFA091201GL/HL-V1
Confidential, Limited Internal Distribution
Revision History: 2008-08-27 Data Sheet
Previous Version: 2008-06-16, Preliminary Data Sheet
Page Subjects (major changes since last revision)
all Remove Preliminary designation
8, 9 Revise package diagrams and notes
GOLDMOS® is a registered trademark of Infineon Technologies AG.
Edition 2008-08-27
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of
any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of
that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices
or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect
human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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