DESCRIPTION
Demonstration circuit 1298 is an evaluation board featur-
ing Linear Technology Corporation’s LTM9002 14-bit
Dual Receiver Subsystem. DC1298 demonstrates good
circuit layout techniques and recommended external cir-
cuitry for optimal system performance.
DC1298 comes with Linear Technology’s 14-bit
LTM9002 amplifier/ADC subsystem installed. The board
includes a wideband input transformer (for evaluation
with a single-ended RF signal generator) and output
CMOS buffers.
DC1298 plugs into the DC890 Data Ac-
quisition demo board and the output can be easily ana-
lyzed with Linear Technology’s PScope data processing
software, which is available for no charge on our website
at http://www.linear.com.
Design files for this circuit board are available. Call
the LTC factory.
L
, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered
trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy
Drive, FilterCAD, Hot Swap, LinearView, µModule, Micropower SwitcherCAD, Multimode
Dimming, No Latency ∆Σ, No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelPro-
tect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT,
UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names
may be trademarks of the companies that manufacture the products.
QUICK START PROCEDURE
Validating the performance of the LTM9002 is simple
with DC1298, and requires only two input sources, a
clock source, a computer, and a lab power supply. Refer
to Figure 1 for proper board evaluation equipment setup
and follow the procedure below:
1.
Connect the power supply as shown in Figure 1.
There is an on-board low-noise voltage regulator
that provide the four supply voltages for the
DC1298. The entire board and all components
share a common ground. The power supply should
be a low-noise lab power supply capable of supply-
ing at least 1 Amp.
2.
Provide an encode clock to the ADC via SMA con-
nector J1. Use a low-phase-noise clock source
such as a filtered RF signal generator or a high-
quality clock oscillator. Obtain DC1216 for a low-
phase-noise ADC clock source that can plug di-
rectly into DC1298.
NOTE.
Similar to having a noisy input, a high-jitter (phase noise) encode
clock will degrade the signal-to-noise ratio (SNR) of the system.
Table 1: DC1298 Connectors and Jumpers
REFERENCE FUNCTION
J1 (+INA) Board IF Signal Input, channel A single-ended.
Impedance-matched to 50
Ω
for use with lab
signal generators.
J2 (-INA) Board IF Signal Input, channel A. Normally not
used, but can be configured as the negative
side of a differential input.
J3 (+INB) Board IF Signal Input, channel B. Normally not
used, but can be configured as the negative
side of a differential input.
J4 (-INB) Board IF Signal Input, channel B single-ended.
Impedance-matched to 50
Ω
for use with lab
signal generators.
J6 (CLKIN) Board Clock Input. Impedance-matched to
50
Ω.
Drive with a low-phase-noise clock oscil-
lator or filtered sine wave signal source.
E1 (EXT REF A) Reference input to adjust the full-scale range of
the FT107, channel A. Connects to the SENSE
pin; by default, tied to VDD for internal refer-
ence.
E2 (EXT REF B) Reference input to adjust the full-scale range of
the FT107, channel B. Connects to the SENSE
pin; by default, tied to VDD for internal refer-
ence.
JP1 (DAC I/O) DAC serial interface.
JP2 (SENSE) ADC sense voltages, default is VDD.
LTM9002 14 bit Dual Channel
IF/Baseband Re