LTC4354
1
4354fc
Typical applicaTion
FeaTures DescripTion
Negative Voltage
Diode-OR Controller
and Monitor
The LT C
®
4354 is a negative voltage diode-OR controller
that drives two external N-channel MOSFETs. It replaces
two Schottky diodes and the associated heat sink, saving
power and area. The power dissipation is greatly reduced
by using N-channel MOSFETs as the pass transistors.
Power sources can easily be ORed together to increase
total system power and reliability.
When first powered up, the MOSFET body diode conducts
the load current until the pass transistor is turned on.
The LTC4354 servos the voltage drop across the pass
transistors to ensure smooth transfer of current from one
transistor to the other without oscillation.
The MOSFETs are turned off in less thans whenever
the corresponding power source fails or is shorted. Fast
turn-off prevents the reverse current from reaching a level
that could damage the pass transistors.
A fault detection circuit with an open-drain output capable
of driving an LED or opto-coupler indicates either MOSFET
short, MOSFET open or supply failed.
–48V Diode-OR Power Dissipation vs Load Current
applicaTions
n Controls N-Channel MOSFETs
n Replaces Power Schottky Diodes
n Less Than 1µs Turn-off Time Limits Peak
Fault Current
n 80V Operation
n Smooth Switchover without Oscillation
n No Reverse DC Current
n Fault Output
n Selectable Fault Thresholds
n Available in 8-Lead (3mm × 2mm) DFN and
8-Lead SO Packages
n AdvancedTCA
Systems
n –48V Distributed Power Systems
n Computer Systems/Servers
n Telecom Infrastructure
n Optical Networks
L, LT , LT C , LT M , Linear Technology and the Linear logo are registered trademarks and
Hot Swap, PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
LTC4354 LOAD
DB GADA GB VSS
VB = –48V
VA = –48V
–48V_RTN
FAULT
IRF3710
IRF3710 4354 TA01
VCC
33k
12k
2k2k
LED
F
CURRENT (A)
0
0
POWER DISSIPATION (W)
1
2
3
4
6
5
24 6
4354 TA01b
8 10
DIODE (MBR10100)
FET (IRF3710)
POWER
SAVED
LTC4354
2
4354fc
Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4354CDDB#TRMPBF LTC4354CDDB#TRPBF LBBK 8-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C
LTC4354IDDB#TRMPBF LTC4354IDDB#TRPBF LBMB 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
absoluTe MaxiMuM raTings
ICC (100µs duration) ...............................................50mA
Output Voltages
GA, GB .........................................0.3V to VCC + 0.3V
FAULT ...................................................... 0.3V to 7V
Input Voltages
DA, DB ................................................... 0.3V to 80V
Input Current
DA, DB Current ................................... –1mA to 20mA
(Note 1)
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4354CS8#PBF LTC4354CS8#TRPBF 4354 8-Lead Plastic SO 0°C to 70°C
LTC4354IS8#PBF LTC4354IS8#TRPBF 4354I 8-Lead Plastic SO –40°C to 85°C
Consult LT C Marketing for parts specified with wider operating temperature ranges.
Consult LT C Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
TOP VIEW
9
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
5
6
7
8
4
3
2
1DA
VSS
VCC
GA
DB
FAULT
GB
VSS
TJMAX = 125°C, θJA = 76°C/W
EXPOSED PAD (PIN 9) IS VSS, CONNECTION TO PCB OPTIONAL
1
2
3
4
8
7
6
5
TOP VIEW
DB
FAULT
GB
VSS
DA
VSS
VCC
GA
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 150°C/W
Operating Temperature Range
LTC4354C ................................................ C to 70°C
LTC4354I .............................................40°C to 85°C
Storage Temperature Range .................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................... 300°C
pin conFiguraTion
LTC4354
3
4354fc
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. ICC = 5mA, VSS = 0V, unless otherwise noted.
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: ICC is defined as the current level where the VCC voltage is lower
by 100mV from the value with 2mA of current.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VZInternal Shunt Regulator Voltage ICC = 5mA l10.25 11 11.75 V
∆VZInternal Shunt Regulator Load Regulation ICC = 2mA to 10mA 200 300 mV
VCC Operating Voltage Range l4.5 VZV
ICC VCC Supply Current VCC = (VZ – 0.1V), Note 2
VCC = 5V
l
l
0.5
1.2
0.8
2
1.1
mA
mA
VGATE GATE Pins Output High Voltage VCC = 10.25V
VCC = 5V
10
4.75
10.25 V
V
IGATE GATE Pins Pull-Up Current VSD = 60mV; VGATE = 5.5V
VSD = 0V; VGATE = 5.5V
–15
15
–30
30
–60
60
µA
µA
∆VSD Source Drain Sense Threshold Voltage (VSS – VDX)l10 30 55 mV
∆VSD(F LT )Source Drain Fault Detection Threshold (VSS – VDX); VCC = 7V to VZl200 260 320 mV
tOFF Gate Turn-Off Time in Fault Condition CGATE = 3300pF; VGATE ≤ 2V; VSD = –0.4V 0.7 1.2 µs
VFAULT FAULT Pin Output Low IFAULT = 5mA l200 400 mV
IFAULT FAULT Pin Leakage Current VFAULT = 5V l±1 µA
IDDrain Pin Input Current VDX = 0V
VDX = 80V
–3.5
1.1
–2.5
1.5
–1.5
1.9
µA
mA
Note 3: An internal shunt regulator limits the VCC pin to less than 12V
above VSS. Driving this pin to voltages beyond the clamp may damage
the part.
Note 4: All currents into pins are positive; all voltages are referenced to
VSS unless otherwise specified.
LTC4354
4
4354fc
Specifications are at TA = 25°C, ICC = 5mA, VSS = 0V,
unless otherwise noted.
Typical perForMance characTerisTics
Source Drain Sense Voltage
vs Temperature IGATE(UP) vs ∆VSD Gate Turn-Off Time vs Temperature
Fault Threshold Voltage
vs Temperature Drain Pin Current vs Temperature Drain Pin Current vs Voltage
Shunt Regulator Voltage
vs Input Current
Shunt Regulator Voltage
vs Input Current at Temperature
Source Drain Sense Voltage
vs Supply Voltage
ICC (mA)
0
VZ (V)
11.0
20
4354 G01
10.0
11.5
10.5
10
515
12.0
TEMPERATURE (°C)
50
VZ (V)
11.4
11.0
10.6
11.2
10.8
25 0 25
4354 G02
50 75 100 125
ICC = 10mA
ICC = 5mA
ICC = 2mA
VCC (V)
5
20
VSD (mV)
30
25
35
7 9 11 12
4354 G03
40
6 8 10
TEMPERATURE (°C)
50
VSD (mV)
40
30
20
35
25
25 0 25
4354 G04
50 75 100 125
VSD (mV)
30
IGATE(UP) (µA)
100
40
60
0
80
20
40 50 60
4354 G05
70 80 90
TEMPERATURE (°C)
50
tOFF (ns)
740
700
660
720
680
25 0 25
4354 G05
50 75 100 125
TEMPERATURE (°C)
50
VSD(FLT) (mV)
290
250
210
270
230
25 0 25
4354 G06
50 75 100 125
TEMPERATURE (°C)
50
ID (µA)
–3.2
–2.8
–2.4
–3.0
–2.6
25 0 25
4354 G08
50 75 100 125
VDX = 0V
VDX (V)
0.3
ID (mA)
–1
–0.5
–0.75
–0.25
0
0.4 0.5 0.6
4354 G09
0.7 0.8 0.9 1
90°C
25°C
–45°C
LTC4354
5
4354fc
pin FuncTions
DA, DB (Pins 1, 8): Drain Voltage Sense Inputs. These
pins sense source drain voltage drop across the N-channel
MOSFETs. An external resistor is recommended to pro-
tect these pins from transient voltages exceeding 80V in
extreme fault conditions. For Kelvin sensing, connect
these pins as close to the drains as possible. Connect to
VSS if unused.
VCC (Pin 3): Positive Supply Voltage Input. Connect this
pin to the positive side of the supply through a resistor.
An internal shunt regulator that can sink up to 20mA
typically clamps VCC at 11V. Bypass this pin with aF
capacitor to VSS.
GA, GB (Pins 4, 6): Gate Drive Outputs. Gate pins pull high
to 10V minimum, fully enhancing the N-channel MOSFET,
when the load current creates more than 30mV of drop
across the MOSFET. When the load current is small,
the gates are actively servoed to maintain a 30mV drop
across the MOSFET. If reverse current develops more than
–140mV of voltage drop across the MOSFET, the pins pull
low to VSS in less thans. Quickly turning off the pass
transistors prevents excessive reverse currents. Leave the
pins open if unused.
VSS (Pins 2, 5): Negative Supply Voltage Input. This is the
device negative supply input and connects to the common
source connection of the N-channel MOSFETs. It also
connects to the source voltage sense input of the servo
amplifiers. For Kelvin sensing, connect Pin 5 as close to
the common source terminal of the MOSFETs as possible.
FAULT (Pin 7): Fault Output. Open-drain output that
normally pulls the FAULT pin to VSS and shunts current
to turn off an external LED or opto-coupler. In the fault
condition, where the pass transistor is fully on and the
voltage drop across it is higher than the fault threshold,
the FAULT pin goes high impedance, turning on the LED or
opto-coupler. This indicates that one or both of the pass
transistors have failed open or failed short creating a cross
conduction current in between the two power supplies.
Connect to VSS if unused.
EXPOSED PAD (Pin 9): Exposed pad is common to VSS
and may be left open or connected to Pins 2 and 5.
FuncTional DiagraM
DB
GB
DA
GA
30mV
BV = 11V
30mV
VSS
VCC
VSS
VSS
55k
4354 FD
VSS
FAULT
+
+
+
+
FAULT DETECTION
AMP B
AMP A
5
4
1
6
8
2
7
3
VSS
55k
LTC4354
6
4354fc
TiMing DiagraM
High availability systems often employ parallel-connected
power supplies or battery feeds to achieve redundancy
and enhance system reliability. ORing diodes have been
a popular means of connecting these supplies at the
point-of-load. The disadvantage of this approach is the
significant forward-voltage drop and resulting efficiency
loss. This drop reduces the available supply voltage and
dissipates significant power. A desirable circuit would
behave like diodes but without the voltage drop and the
resulting power dissipation.
The LTC4354 is a negative voltage diode-OR controller that
drives two external N-channel MOSFETs as pass transis-
tors to replace ORing diodes. The MOSFETs are connected
together at the source pins. The common source node is
connected to the VSS pin which is the negative supply of
the device. It is also connected to the positive inputs of
the amplifiers that control the gates to regulate the volt-
age drop across the pass transistors. Using N-channel
MOSFETs to replace Schottky diodes reduces the power
dissipation and eliminates the need for costly heat sinks
or large thermal layouts in high power applications.
At power-up, the initial load current flows through the
body diode of the MOSFET and returns to the supply with
the lower terminal voltage. The associated gate pin will
immediately start ramping up and turn on the MOSFET.
The amplifier tries to regulate the voltage drop between
the source and drain connections to 30mV. If the load
current causes more than 30mV of drop, the gate rises
to further enhance the MOSFET. Eventually the MOSFET
4354 TD01
VSS – VDX
VGATE
tOFF
100mV
2V
–400mV
operaTion
gate is driven fully on and the voltage drop is equal to the
RDS(ON)ILOAD.
When the power supply voltages are nearly equal, this
regulation technique ensures that the load current is
smoothly shared between them without oscillation. The
current level flowing through each pass transistor depends
on the RDS(ON) of the MOSFET and the output impedance
of the supplies.
In the case of supply failure, such as if the supply that
is conducting most or all of the current is shorted to the
return side, a large reverse current starts flowing through
the MOSFET that is on, from any load capacitance and
through the body diode of the other MOSFET, to the sec-
ond supply. The LTC4354 detects this failure condition as
soon as it appears and turns off the MOSFET in less than
1µs. This fast turn-off prevents the reverse current from
ramping up to a damaging level.
In the case where the pass transistor is fully on but the
voltage drop across it exceeds the fault threshold, the
FAULT pin goes high impedance. This allows an LED or
opto-coupler to turn on indicating that one or both of the
pass transistors have failed.
The LTC4354 is powered from system ground through a
current limiting resistor. An internal shunt regulator that
can sink up to 20mA clamps the VCC pin to 11V above VSS.
AF bypass capacitor across VCC and VSS pins filters
supply transients and supplies AC current to the device.
LTC4354
7
4354fc
Input Power Supply
The power supply for the device is derived from –48_RTN
through an external current limiting resistor (RIN). An
internal shunt regulator clamps the voltage at VCC pin to
11V. AF decoupling capacitor to VSS is recommended.
It also provides a soft-start to the part.
RIN should be chosen to accommodate the maximum
supply current requirement of 2mA at the expected input
operating voltage.
RIN
(V
IN(MIN)
V
Z(MAX)
)
ICC(MAX)
The power dissipation of the resistor is calculated at the
maximum DC input voltage:
P=(V
IN(MAX) VCC(MIN))2
RIN
If the power dissipation is too high for a single resistor,
use multiple low power resistors in series instead of a
single high power component.
MOSFET SELECTION
The LTC4354 drives N-channel MOSFETs to conduct the
load current. The important features of the MOSFETs are
on-resistance RDS(ON), the maximum drain-source voltage
VDSS, and the threshold voltage.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 12V. This allows the use of standard
threshold voltage N-channel MOSFETs. An external zener
diode can be used to clamp the potential at the VCC pin
to as low as 4.5V if the gate to source rated breakdown
voltage is less than 12V.
The maximum allowable drain-source voltage, V(BR)DSS,
must be higher than the supply voltages. If the inputs are
shorted, the full supply voltage will appear across the
MOSFETs.
applicaTions inForMaTion
Figure 1. Method of Protecting the DA and DB Pins from
Negative Inputs. One Channel Shown
The LTC4354 tries to servo the voltage drop across the
MOSFET to 30mV in the forward direction by controlling
the gate voltage and sends out a fault signal when the
voltage drop exceeds the 260mV fault threshold. The
RDS(ON) should be small enough to conduct the maximum
load current while not triggering a fault, and to stay within
the MOSFET’s power rating at the maximum load current
(I2RDS(ON)).
Fault Conditions
LTC4354 monitors fault conditions and turns on an LED
or opto-coupler to indicate a fault. When the voltage drop
across the pass transistor is higher than the 260mV fault
threshold, the internal pull-down at the FAULT pin turns off
and allows the current to flow through the LED or opto-
coupler. Conditions that cause high voltage across the pass
transistor include: short in the load circuitry, excessive
load current, FET open while conducting current, and FET
short on the channel with the higher supply voltage. The
fault threshold is internally set to 260mV.
In the event of FET open on the channel with the more
negative supply voltage, if the voltage difference is high
enough, the substrate diode on the DA or DB pins will
forward bias. The current flowing out of the pins must
be limited to a safe level (<1mA) to prevent device latch
up. Schottky diodes can be used to clamp the voltage at
the DA and DB pins, as shown in Figure 1.
4354 F01
DA GA
LTC4354
VSS
MMBD2836LT1
1k
1k
LTC4354
8
4354fc
LTC4354
TO
MODULE
INPUT
DB GADA GB VSS
VB
VA
–48V_RTN
FAULT
M2
IRF3710S
M1
IRF3710S
4354 F02
VCC
R3
33k
RIN
12k
0.5W
D1
LED
1 8 4
3
6 2, 5
7
R1
2k
R2
2k
CIN
F
applicaTions inForMaTion
System Power Supply Failure
LTC4354 automatically supplies load current from the
system supply with the more negative input potential. If
this supply is shorted to the return side, a large reverse
current flows from its pass transistor. When this reverse
current creates –140mV of voltage drop across the drain
and source pins of the pass transistor, the LTC4354 drives
the gate low fast and turns it off.
The remaining system power supply will deliver the load
current through the body diode of its pass transistor until
the channel turns on. The LTC4354 ramps the gate up and
turns on the N-channel MOSFET to reduce the voltage drop
across it, a process that takes less than 1ms depending
on the gate charge of the MOSFET.
Drain Resistor
Tw o resistors are required to protect the DA and DB pins
from transient voltages higher than 80V. In the case
when the supply with the lower potential is shorted to the
return side due to supply failure, a reverse current flows
briefly through the pass transistor to the other supply to
discharge the output capacitor. This current stores energy
in the stray inductance along the current path. Once the
pass transistor is turned off, this energy forces the drain
terminal of the FET high until it reaches the breakdown
voltage. If this voltage is higher than 80V, the internal
ESD devices at the DA and DB pins might break down
and become damaged. The external drain resistors limit
the current into the pins and protect the ESD devices. A
2k resistor is recommended for 48V applications. Larger
resistor values increase the source drain sense threshold
voltage due to the input current at the drain pins.
Loop Stability
The servo loop is compensated by the parasitic capacitance
of the power N-channel MOSFET. No further compensation
components are normally required. In the case when a
MOSFET with very small parasitic capacitance is chosen,
a 1000pF compensation capacitor connected across the
gate and source pins might be required.
Design Example
The following demonstrates the calculations involved for
selecting components in a –36V to –72V system with 5A
maximum load current, see Figure 2.
First, select the input dropping resistor. The resistor should
allow 2mA of current with the supply at –36V.
RIN (36V 11.5V)
2mA
=12.25k
The nearest lower 5% value is 12k.
Figure 2. –36V to –72V/5A Design Example
LTC4354
9
4354fc
applicaTions inForMaTion
Typical applicaTions
–5.2V Diode-Or Controller Positive Low Voltage Diode-OR Combines
Multiple Switching Converters
The worst-case power dissipation in RIN:
P=(72V 10.5V)2
12k
=0.315W
Choose a 12k 0.5W resistor or use two 5.6k 0.25W resis-
tors in series.
Next, choose the N-channel MOSFET. The 100V, IRF3710S
in DD-Pak package with RDS(ON) = 23mΩ (max) offers a
good solution. The maximum voltage drop across it is:
V = (5A)(23mΩ) = 115mV
The maximum power dissipation in the MOSFET is a mere:
P = (5A)(115mV) = 0.6W
R1 and R2 are chosen to be 2k to protect DA and DB pins
from being damaged by high voltage spikes that can occur
during an input supply fault.
The LED, D1, requires at least 1mA of current to fully turn
on, therefore R3 is set to 33k to accommodate lowest
input supply voltage of –36V.
Layout Considerations
The following advice should be considered when laying
out a printed circuit board for the LTC4354.
The bypass capacitor provides AC current to the device
so place it as close to the VCC and VSS pins as possible.
The inputs to the servo amplifiers, DA, DB and VSS pins,
should be connected directly to the MOSFETs’ terminals
using Kelvin connections for good accuracy.
Keep the traces to the MOSFETs wide and short. The PCB
traces associated with the power path through the MOSFETs
should have low resistance.
LTC4354 LOAD
DB GADA GB VSS
VB = –5.2V
VA = –5.2V
GND
FAULT
M2
Si4466DY
M1
Si4466DY
4354 TA02
VCC
R3
2k
D1
LED
CIN
1µF
2, 561 48
3
7
12V
470Ω
240Ω*
1.2V, 200A
OUTPUT BUS
4354 TA03
*OPTIONAL PRELOAD
HAT2165 ×6
HAT2165 ×6
1.2V
100A
INPUT
F
VEE GA,GB
VCC
LTC4354
DA,DB
12V
470Ω
240Ω*
1.2V
100A
INPUT
F
VEE GA,GB
VCC
LTC4354
DA,DB
LTC4354
10
4354fc
–36V to –72V/20A High Current with Parallel FETs
–12V Diode-OR Controller
Typical applicaTions
3
LTC4354
DB GADA GB VSS
VB = –48V
FAULT
M4
IRF3710
M3
IRF3710
4354 TA04
VCC
3
R6
30k
RIN2
10k
R5
2k
R4
2k
D2
LED
CIN2
1µF
LTC4354
DB GADA GB VSS
VA = –48V –48V OUT
–48V_RTN RTN
RTN
FAULT
M2
IRF3710
M1
IRF3710
VCC
R3
30k
RIN1
10k
R2
2k
R1
2k
D1
LED
CIN1
1µF
2, 561 48
7
2, 561 48
7
LTC4354 LOAD
DB GADA GB VSS
2, 561 48
VB = –12V
VA = –12V
GND
FAULT
M2
Si4862DY
3
7
M1
Si4862DY
4354 TA05
VCC
R3
10k
RIN
2k IN754
BV = 6.8V
CIN
1µF
D1
LED
DZ
LTC4354
11
4354fc
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ±0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.15 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
14
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB8) DFN 0905 REV B
0.25 ±0.05
0.50 BSC
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
0.25 ±0.05
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.50 BSC
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
LTC4354
12
4354fc
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
LTC4354
13
4354fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
C 04/12 Updated package/Order Information format 2
Changed Figure 2 8
Updated DDB package drawing 11
(Revision history begins at Rev C)
LTC4354
14
4354fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2004
LT 0412 REV C • PRINTED IN USA
relaTeD parTs
Typical applicaTion
PART NUMBER DESCRIPTION COMMENTS
LT
®
1640AH/LT1640AL Negative High Voltage Hot Swap™ Controllers in SO-8 Negative High Voltage Supplies from –10V to –80V
LT4250 –48V Hot Swap Controller Active Current Limiting, Supplies from –20V to –80V
LTC4251/LTC4251-1/
LTC4251-1
–48V Hot Swap Controllers in SOT-23 Fast Active Current Limiting, Supplies from –15V
LTC4252-1/LTC4252-2/
LTC4252-1A/LTC4252-2A
–48V Hot Swap Controllers in MS8/MS10 Fast Active Current Limiting, Supplies from –15V,
Drain Accelerated Response
LTC4253 –48V Hot Swap Controller with Sequencer Fast Active Current Limiting, Supplies from –15V,
Drain Accelerated Response, Sequenced Power Good Outputs
LT4351 MOSFET Diode-OR Controller N-Channel MOSFET, 1.2V to 18V, Fast Switching for High Current
LTC4412 Low Loss PowerPath™ Controller in ThinSOT P-Channel MOSFET, 3V to 28V Range
LTC4354 LOAD
DB GADA GB VSS
VB = –48V
VA = –48V
–48V_RTN
FAULT
IRF540NS
IRF540NS 4354 TA06
VCC
33k
12k
0.5W
1k
1k
1k
1k
LED
1µF
MMBD2836LT1
MMBD2836LT1
–48V Diode-OR Controller with Fuse Monitoring