Wetting Current (WET)
The MAX13036 features adjustable wetting current to
any closed switch to clean switch contacts that are
exposed to adverse conditions. The wetting current is
set by connecting a 30kΩto 330kΩresistor from WET
to ground. A 30kΩresistor corresponds to a wetting
current of 40mA (typ) and a 330kΩresistor corre-
sponds to a 7.5mA (typ) wetting current. See the
Typical Operating Characteristics
section for the rela-
tionship between the wetting current and RWET.
The WEN and WEND bits in the command register
enable and disable the wetting currents and the WTOFF
bit allows the wetting current to be activated for a dura-
tion of 20ms (typ) (see the
Command Register
section).
Disabling wetting currents, or limiting the active wetting
current time reduces power consumption. The default
state upon power-up is all wetting currents disabled.
Wetting current is activated on closed switches just
after the debounce time. The wetting current pulse
starts after the debounce time. A wetting current pulse
is provided to all closed switches when a valid input
change is detected. Wetting current rise and fall times
are controlled to enhance EMC performance. There is
one wetting current timer for all switch inputs.
Therefore, it is possible to observe wetting pulses
longer than expected whenever two switches turn on in
sequence and are spaced out less than tWET. In scan
mode, the wetting current is enabled during the polling
pulse only.
When using wetting currents, special care must be taken
to avoid exceeding the maximum power dissipation of the
MAX13036 (see the
Applications Information
section).
Switch Outputs (DO0, DO1)
DO0 and DO1 are direct level-shifted outputs of the
switch inputs IN0 and IN1 when the WEND bit of the
command register is cleared and when operating in
normal mode. When configured as direct inputs, the
wetting currents and sensing resistors are disabled on
IN0 and IN1. DO0 and DO1 are tri-stated when the
WEND bit is set or when operating in scan mode.
When programmed as direct inputs, the status of IN0
and IN1 are not reflected in the status register and
interrupts are not allowed on these inputs.
Interrupt Output (
INT
)
INT is an active-low, open-drain output that asserts
when any of the switch inputs changes state, as long
as the particular input is enabled for interrupts (set by
clearing P7–P0 in the command register). A pullup
resistor to VLis needed on INT. INT is cleared when CS
is driven low for a read/write operation.
The INT output will still assert when VLis absent provid-
ed that it is pulled up to a different supply voltage.
Thermal Protection (
OT
)
The MAX13036 features thermal protection that pre-
vents the device from being damaged by overheating.
When the internal temperature of the device exceeds
the thermal warning threshold of +170°C (typ), all wet-
ting currents are disabled. The MAX13036 returns to
normal operation after the internal temperature
decreases below +155°C (typ). The thermal shutdown
does not activate below +150°C. The thermal protec-
tion feature is disabled when WEN = 0 or when all
inputs are open.
An open-drain, active-low output (OT) asserts low when
the internal temperature of the device rises above the
thermal warning threshold. OT is immediately cleared
when the CS input is driven low for write/read opera-
tions, regardless of whether the temperature is above
the threshold or not. The overtemperature status of the
MAX13036 can also be monitored by reading the OT bit
in the status register. The OT bit is set when the internal
temperature rises above the temperature threshold and
it is cleared when the temperature falls below the tem-
perature hysteresis level. This allows a microprocessor
(µP) to monitor the overtemperature status, even if the
OT output has been cleared. See Figure 4 for an exam-
ple timing diagram of the overtemperature alerts.
If desired, the OT and INT outputs can be connected to
the same µP GPIO in a wired-OR configuration to save a
µP pin. The OT output still asserts when VLis absent
provided that it is pulled up to a different supply voltage.
Serial Peripheral Interface
(
CS
, SD0, SDI, CLK)
The MAX13036 operates as a Serial Peripheral Interface
(SPI) slave device. An SPI master accesses the
MAX13036 by reading from a status register and writing
to a command register. Both registers are 16 bits long
and are accessed most significant bit (MSB) first.
MAX13036
Automotive Contact Monitor
and Level Shifter
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