AOT1100L/AOB1100L
100V N-Channel Rugged Planar MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 130A
R
DS(ON)
(at V
GS
=10V) < 12mΩ
100% UIS Tested
100% R
g
Tested
Symbol
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
100V
The AOT1100L/AOB1100L uses a robust technology that
is designed to provide efficient and reliable power
conversion even in the most demanding applications,
including motor control. With low R
DS(ON)
and excellent
thermal capability this device is appropriate for high
current switching and can endure adverse operating
conditions.This device is ideal for boost converters and
synchronous rectifiers for consumer, telecom, industrial
power supplies and LED backlighting.
G
D
S
TO220
Top View Bottom View
GG
SD
DS
DD
AOT1100
TO-263
D2PAK
Top View Bottom View
D
D
S
G
G
S
AOB1100
V
DS
V
GS
I
DM
I
AS
E
AS
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJC
T
C
=100°C
15
208Pulsed Drain Current
C
Continuous Drain
Current
G
Parameter Typ Max
T
C
=25°C
2.1
250
Maximum Junction-to-Ambient
A
Avalanche Current
C
6
Continuous Drain
Current 8
Units
Junction and Storage Temperature Range -55 to 175 °C
Thermal Characteristics
°C/W
R
θJA
12
48
Avalanche energy L=0.1mH
C
mJ744
P
D
W
500
Power Dissipation
A
P
DSM
W
T
A
=70°C 1.3
T
A
=25°C
VDrain-Source Voltage 100
±20Gate-Source Voltage T
C
=25°C
T
C
=100°C
A
T
A
=70°C
I
D
130
92
Maximum Junction-to-Case °C/W
°C/W
Maximum Junction-to-Ambient
A D
0.22 60
0.3
Power Dissipation
B
A122
A
T
A
=25°C I
DSM
V
Rev0: Dec 2011
www.aosmd.com Page 1 of 6
AOT1100L/AOB1100L
Symbol Min Typ Max Units
BV
DSS
100 V
V
DS
=100V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 2.6 3.2 3.8 V
I
D(ON)
208 A
10 12
T
J
=125°C 19 22
9.7 11.7 mΩ
g
FS
53 S
V
SD
0.69 1 V
I
S
130 A
C
iss
4833 pF
C
oss
721 pF
C
rss
35 pF
R
g
0.5 1.1 1.7 Ω
Q
g
(10V) 82 100 nC
Q
gs
23 nC
Q
gd
19 nC
t
D(on)
21 ns
t
22
ns
Maximum Body-Diode Continuous Current
G
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
V
=10V, V
=50V, R
=2.5
Ω
,
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge V
GS
=10V, V
DS
=50V, I
D
=20A
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
Reverse Transfer Capacitance
µA
V
DS
=V
GS
, I
D
=250µΑ
V
DS
=0V, V
GS
= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
R
DS(ON)
Static Drain-Source On-Resistance
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
Drain-Source Breakdown Voltage
V
GS
=0V, V
DS
=25V, f=1MHz
SWITCHING PARAMETERS
I
DSS
On state drain current
Gate Source Charge
Gate Drain Charge
mΩ
TO220
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=20A
V
GS
=10V, I
D
=20A
TO263
Forward Transconductance
Diode Forward Voltage
t
r
22
ns
t
D(off)
50 ns
t
f
4.5 ns
t
rr
64 ns
Q
rr
880 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=500A/µs
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=10V, V
DS
=50V, R
L
=2.5
Ω
,
R
GEN
=3Ω
Turn-Off Fall Time I
F
=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PDis based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C. Maximum UIS current limited by test equipment.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current limited by package.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev0: Dec 2011 www.aosmd.com Page 2 of 6
AOT1100L/AOB1100L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
20
40
60
80
100
0123456
ID (A)
VGS (Volts)
Figure 2: Transfer Characteristics (Note E)
6
8
10
12
14
0 8 16 24 32 40
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1.2
1.6
2.0
2.4
2.8
0 25 50 75 100 125 150 175 200
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=10V
I
D
=20A
25°C
125°C
V
DS
=5V
VGS=10V
0
20
40
60
80
100
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=4.5V
6V
10V
5V
40
Voltage (Note E)
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00
1E+01
1E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
4
8
12
16
20
24
2.0 4.0 6.0 8.0 10.0
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=20A
25°C
125°C
Rev0: Dec 2011 www.aosmd.com Page 3 of 6
AOT1100L/AOB1100L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0 15 30 45 60 75 90
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
1
10
100
1000
10000
100000
0 10 20 30 40
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=50V
ID=20A
TJ(Max)=175°C
TC=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100 1000
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe Operating
Area (Note F)
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=175°C
T
C
=25°C
100
µ
s
0
1500
3000
4500
6000
7500
9000
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
40
0.01
0.1
1
10
1E-05 0.0001 0.001 0.01 0.1 1 10
Zθ
θ
θ
θJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
T
on
T
PD
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Area (Note F)
RθJC=0.3°C/W
Case (Note F)
Rev0: Dec 2011 www.aosmd.com Page 4 of 6
AOT1100L/AOB1100L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
100
200
300
400
500
600
0 25 50 75 100 125 150 175
Power Dissipation (W)
TCASE (°
°°
°C)
Figure 13: Power De-rating (Note F)
0
30
60
90
120
150
0 25 50 75 100 125 150 175
Current rating ID(A)
TCASE (°
°°
°C)
Figure 14: Current De
-
rating (Note F)
1
10
100
1000
10000
0.0001 0.01 1 100 10000
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction
-
to
-
TA=25°C
0
40
80
120
160
1 10 100 1000 10000
IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
TA=25°C
TA=150°CT
A
=100°C
TA=125°C
40
0.001
0.01
0.1
1
10
0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
PD
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Figure 14: Current De
-
rating (Note F)
Figure 15: Single Pulse Power Rating Junction
-
to
-
Ambient (Note H)
RθJA=60°C/W
Rev0: Dec 2011 www.aosmd.com Page 5 of 6
AOT1100L/AOB1100L
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev0: Dec 2011 www.aosmd.com Page 6 of 6
