IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-TO-10 CLOCK DRIVER DESCRIPTION: FEATURES: * * * * * * * * * * * * IDT74FCT807BT/CT The FCT807T clock driver is built using advanced dual metal CMOS technology. This low skew clock driver features 1:10 fanout, providing minimal loading on the preceding drivers. The FCT807T offers low capacitance inputs with hysteresis for improved noise margins. TTL level outputs and multiple power and grounds reduce noise. The device also features -32/48mA drive capability for driving low impedance traces. 0.5 MICRON CMOS Technology Guaranteed low skew < 250ps (max.) Very low duty cycle distortion < 350ps (max.) High speed: propagation delay < 2.5ns (max.) 100MHz operation TTL compatible inputs and outputs TTL level output voltage swings 1:10 fanout Output rise and fall time < 1.5ns (max) Low input capacitance: 4.5pF typical High drive: -32mA IOH, +48mA IOL Available in QSOP, SSOP, and SOIC packages NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION O1 O2 O3 IN 1 20 VCC GND 2 19 O10 O1 3 18 O9 4 17 O2 5 16 O8 GND 6 15 VCC O3 7 14 O7 VCC 8 13 GND O4 9 12 O6 10 11 VCC O4 O5 IN O6 GND GND O5 O7 QSOP/ SOIC/ SSOP TOP VIEW O8 O9 O 10 The IDT logo is a registered trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES DECEMBER 2009 1 c 2006 Integrated Device Technology, Inc. DSC-4242/4 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES CAPACITANCE (TA = +25OC, f = 1.0MHz) ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max Parameter(1) Unit Symbol Conditions Typ. Max. Unit Input Capacitance VIN = 0V 4.5 6 pF Output Capacitance VOUT = 0V 5.5 8 pF VTERM Terminal Voltage with Respect to GND -0.5 to +7 V CIN TSTG Storage Temperature -65 to +150 C C OUT IOUT DC Output Current -60 to +120 mA NOTE: 1. This parameter is measured at characterization but not tested. NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PIN DESCRIPTION Pin Names Description IN Inputs Ox Outputs DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, Industrial: TA = -40C to +85C, VCC = 5V 5% Parameter Test Conditions(1) VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level IIH Input HIGH Current (Input pins) VCC = Max. VI = 2.7V Symbol Min. Typ.(2) Max. Unit 2 -- -- V -- -- 0.8 V -- -- 1 A IIL Input LOW Current (Input pins) VCC = Max. VI = 0.5V -- -- 1 A IOZH High Impedance Output Current VCC = Max. VO = 2.7V -- -- 1 A IOZL (3-State Output pins) VO = 0.5V -- -- 1 II Input HIGH Current VCC = Max., VI = VCC (Max.) -- -- 1 A VIK Clamp Diode Voltage VCC = Min., IIN = -18mA -- -0.7 -1.2 V IOS Short Circuit Current(4) VCC = Max., VO = -60 -120 -225 mA VOH Output HIGH Voltage VCC = Min. IOH = -15mA 2.4 3.3 -- V VIN = VIH or VIL IOH = -32mA 2 3 -- VCC = Min. IOL = 48mA -- 0.3 0.55 VOL Output LOW Voltage GND(3) V VIN = VIH or VIL Input/Output Power Off Leakage VCC = 0V, VIN or VO 4.5V -- -- 1 A VH Input Hysteresis for all inputs -- -- 150 -- mV ICCL ICCH ICCZ Quiescent Power Supply Current VCC = Max., VIN = GND or VCC -- 5 500 A I OFF NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition should not exceed one second. 2 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Test Conditions(1) Parameter Quiescent Power Supply Current VCC = Max. TTL Inputs HIGH VIN = 3.4V Dynamic Power Supply Current(3) VCC = Max. VIN = VCC Input Toggling VIN = GND Min. Typ.(2) Max. Unit -- 0.5 2 mA -- 0.4 0.6 mA/MHz -- 20 30.5(4) mA -- 20.3 31.3(4) 50% Duty Cycle Outputs Open IC Total Power Supply Current(5) VCC = Max. VIN = VCC Input Toggling VIN = GND 50% Duty Cycle Outputs Open VIN = 3.4V fI = 50MHz VIN = GND NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 5V, +25C ambient. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz. 3 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4) Symbol Parameter tPLH tPHL Propagation Delay tR tF Output Rise Time Output Fall Time tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) tSK(T) Package skew: skew between outputs of different Conditions(1) 50 to VCC/2, CL = 10pF (See figure 1) or 50 ac termination, CL = 10pF (See figure 2) f 100MHz Outputs connected in groups of two FCT807BT Min.(2) Max. FCT807CT Min.(2) Max. Unit 1.3 2.7 1.3 2.5 ns -- -- 1.5 1.5 -- -- 1.5 1.5 ns ns -- 0.5 -- 0.25 ns -- 0.5 -- 0.35 ns -- 0.9 -- 0.65 ns packages at same power supply voltage, temperature, package type and speed grade Parameter Conditions(1) tPLH tPHL Propagation Delay tR tF Output Rise Time Output Fall Time CL = 30pF f 67MHz (See figure 3) Symbol FCT807BT Min.(2) Max. FCT807CT Min.(2) Max. Unit 1.5 3.8 1.5 3.5 ns -- -- 1.5 1.5 -- -- 1.5 1.5 ns ns tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) -- 0.5 -- 0.25 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) -- 0.5 -- 0.35 ns tSK(T) Package skew: skew between outputs of different packages at same power supply voltage, -- 0.9 -- 0.75 ns Min.(2) 1.5 Max. 3.8 Min.(2) 1.5 Max. 3.5 Unit ns -- 1.5 -- 1.5 ns temperature, package type and speed grade FCT807BT Conditions(1) FCT807CT Symbol tPLH Parameter Propagation Delay tPHL tR Output Rise Time tF tSK(O) Output Fall Time Output skew: skew between outputs of all banks of -- -- 1.5 0.5 -- -- 1.5 0.35 ns ns tSK(P) same package (inputs tied together) Pulse skew: skew between opposite transitions -- 0.6 -- 0.45 ns -- 1 -- 0.75 ns CL = 30pF f 40MHz (See figure 4) of same output (|tPHL -- tPLH|) tSK(T) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 4 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4) FCT807BT Symbol tPLH Parameter Propagation Delay tPHL tR Output Rise Time tF tSK(O) Output Fall Time Output skew: skew between outputs of all banks of tSK(P) same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) tSK(T) Package skew: skew between outputs of different Conditions(1) 50 to VCC/2, CL = 10pF (See figure 1) or 50 ac termination, CL = 10pF (See figure 2) f 100MHz Outputs connected in groups of two FCT807CT Min.(2) 1.3 Max. 2.9 Min.(2) 1.3 Max. 2.7 Unit ns -- 1.5 -- 1.5 ns -- -- 1.5 0.6 -- -- 1.5 0.35 ns ns -- 0.6 -- 0.45 ns -- 0.9 -- 0.65 ns packages at same power supply voltage, temperature, package type and speed grade Parameter Conditions(1) tPLH tPHL Propagation Delay tR tF Output Rise Time Output Fall Time CL = 30pF f 67MHz (See figure 3) Symbol FCT807BT Min.(2) Max. FCT807CT Min.(2) Max. Unit 1.5 4 1.5 3.7 ns -- -- 1.5 1.5 -- -- 1.5 1.5 ns ns tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) -- 0.6 -- 0.35 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) -- 0.6 -- 0.45 ns tSK(T) Package skew: skew between outputs of different -- 0.9 -- 0.75 ns packages at same power supply voltage, temperature, package type and speed grade Parameter Conditions(1) tPLH tPHL Propagation Delay tR tF Output Rise Time Output Fall Time CL = 30pF f 40MHz (See figure 4) Symbol FCT807BT Min.(2) Max. FCT807CT Min.(2) Max. Unit 1.5 4 1.5 3.7 ns -- -- 1.5 1.5 -- -- 1.5 1.5 ns ns tSK(O) Output skew: skew between outputs of all banks of same package (inputs tied together) -- 0.6 -- 0.45 ns tSK(P) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) -- 0.7 -- 0.55 ns tSK(T) Package skew: skew between outputs of different -- 1 -- 0.75 ns packages at same power supply voltage, temperature, package type and speed grade NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES TEST CIRCUITS V CC V CC V CC 100 V IN V IN V OUT Pulse Generator V OUT Pulse Generator D.U.T. 100 RT D.U.T. 50 10pF 10pF RT 220pF Fig. 1: 50 to VCC/2, CL = 10pF Fig. 2: 50 AC Termination, CL = 10pF The capacitor value for AC termination is determined by the operating frequency. For very low frequencies a higher capacitor value should be selected. V CC V CC V OUT V IN Pulse Generator V OUT V IN Pulse Generator D.U.T. D.U.T. 30pF RT 50pF RT CL Fig. 4: CL = 50pF Circuit Fig. 3: CL = 30pF Circuit V CC SWITCH POSITION 7.0V 500 V OUT V IN Pulse Generator D.U.T. 50pF RT CL 500 CL Test Switch Disable LOW Enable LOW 6V Disable HIGH Enable HIGH GND DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Fig. 5: Enable and Disable Time Circuit 6 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES TEST WAVEFORMS 3V 1.5V INPUT INPUT tPLH1 0V tPLH 3V 1.5V 0V tPHL1 VOH 1.5V VOL tPHL VOH 2.0V 0.8V OUTPUT OUTPUT 1 tSK(o) tSK(o) 1.5V VOH 1.5V VOL VOL OUTPUT 2 tPLH2 tF tR tPHL2 tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| Package Delay Output Skew - tSK(O) 3V 1.5V 0V INPUT tPHL tPLH INPUT VOH 1.5V VOL OUTPUT tPHL1 tPLH1 PACKAGE 1 OUTPUT tSK(t) tSK(p) = |tPHL tPLH| PACKAGE 2 OUTPUT Pulse Skew - tSK(P) tPLH2 tSK(t) tPHL2 NOTE: 1. Package 1 and Package 2 are same device type and speed grade. DISABLE 3V CONTROL INPUT 1.5V 0V t PLZ t PZL OUTPUT NORMALLY SWITCH LOW CLOSED OUTPUT NORMALLY HIGH SWITCH OPEN 3.5V 3.5V 1.5V 0.3V VOL 0.3V VOH t PHZ t PZH VOH 1.5V VOL VOH 1.5V VOL tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| Part-to-Part Skew - tSK(T) ENABLE 3V 1.5V 0V 1.5V 0V 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns 7 IDT74FCT807BT/CT FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ORDERING INFORMATION IDT74FCT XXXX Device Type X X Package Temp. Range Blank I Commercial (0C to +70C) Industrial (-40C to +85C) SO SOG PY PYG Q QG Small Outline IC SOIC - Green Shrink Small Outline IC SSOP - Green Quarter-size Small Outline IC QSOP - Green 807BT 807CT 1-to-10 Clock Driver NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 8 for Tech Support: clockhelp@idt.com