
AAT4900
Buffered Power Half-BridgeFastSwitchTM
PRODUCT DATASHEET
8 4900.2009.10.1.4
www.analogictech.com
High Side Switch RMS Current
Eq. 3:
2
2
12
O
I
I
⎛⎞
Δ
= + · D
⎝⎠
IRMS(HS)
Low Side Switch RMS Current
The low side RMS current is estimated by the following
equation.
Eq. 4:
2
2
12
O
I
I
⎛⎞
Δ
= + · (1 - D)
⎝⎠
IRMS(LS)
Total Losses
A simplified form of the above results (where the above
descriptions of IRMS has been approximated with Io) is
given by:
Eq. 5: PLOSS
+ (tsw • FS • IO + IQ) • VIN
IO2 • (RDS(ON)H • VO + RDS(ON)L • (VIN -VO))
VIN
=
Substitution of the IRMS equations with IO results in very
little error when the inductor ripple current is 20% to
40% of the full load current. The equation also includes
switching and quiescent current losses where tSW is
approximated at 18 nsec and IQ is the no load quiescent
current of the AAT4900. Quiescent current losses are
associated with the gate drive of the output stage and
biasing. Since the gate drive current varies with fre-
quency and voltage, the bias current must be checked at
the frequency, voltage, and temperature of operation
with no load attached to the LX node. Once the above
losses have been determined, the maximum junction
temperature can be calculated.
Eq. 6: TJ(MAX) = PLOSS • ΘJC = TAM
Using the above equations, the graph below shows the
current capability for some typical applications with
maximum junction temperatures of 150°C and 120°C.
The increase in RDS(ON) vs. temperature is estimated at
3.75mΩ for a 10°C increase in junction temperature.
Step-Down Converter Limits
(FS = 1MHz)
0.5
0.75
1
1.25
1.5
1.75
25 35 45 55 65 75 85
TJMAX = 150
C
VIN = 4.2V, VO = 2.5V
VIN = 5.0V, VO = 3.3V
VIN = 4.2V, VO = 2.5V
VIN = 5.0V, VO = 3.3V
TJMAX = 120
C
DC / DC
Controller
EN
CLK
GND
IN
LXAAT4900
V
IN
= 2.0 to 5.5V
V
OUT
= 0 to V
IN
I
OUT
= 0 to 1A
+
-
GND
Figure 1: AAT4900 DC/DC Converter Power Stage.