Document Number: MC33901
Rev. 3.0, 6/2015
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2013-2015. All rights reserved.
High-speed CAN Transceiver
The MC33901/34901 are SMARTMOS high-speed (up to 1.0 Mbits/s) CAN
transceivers providing the physical interface between the CAN protocol
controller of an MCU and the physical dual wires CAN bus. They are packaged
in an 8-pin SOIC with market standard pinout, and offer excellent EMC and ESD
performance without the need for external filter components.
Four devices variations are available:
- Versions with and without CAN bus wake-up.
- Versions with and without TXD dominant protection.
Features
• Very low-current consumption in standby mode
• Compatible with 3.3 V or 5.0 V MCU interface
• Standby mode with remote CAN wake-up on some versions.
• Pin and function compatible with market standard
Cost efficient robustness:
• High system level ESD performance
• Very high electromagnetic Immunity and low electromagnetic emission
without common mode choke or other external components.
Fail-safe behaviors:
• TXD Dominant timeout, on the 33901 version.
• Ideal passive when unpowered, CAN bus leakage current <10 A.
•V
DD and VIO monitoring
Figure 1. Simplified Application Diagram for MC3x901xEF
HIGH-SPEED CAN TRANSCEIVER
33901
34901
.
Industrial Applications (MC34901)
• Transportation
• Backplanes
• Lift/elevators
• Factory automation
• Industrial process control
Automotive Applications (MC33901)
• Supports automotive CAN high-speed applications
• Body electronics
• Power train
• Chassis and safety
• Infotainment
• Diagnostic equipment
• Accessories
EF SUFFIX (PB-FREE)
98ASA42564B
8-PIN SOICN
VDD
VIO
TXD
RXD
CAN H
CAN L
TX
MCU
33901
I/O
RX
V
PWR
CAN
controller
protocol
VCC
VREG
5.0 V
3.3 V
GND
3.3 V
5.0 V
120
CAN BUS
STB
34901
Analog Integrated Circuit Device Data
2Freescale Semiconductor
33901
Figure 2. Simplified Application Diagram for MC3x901xNEF
VDD
TXD
RXD
CAN H
CAN L
TX
MCU
33901
I/O
RX
V
PWR
CAN
controller
protocol
VCC
VREG
5.0 V
GND
5.0 V
120
CAN BUS
STB
34901
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
33901
Table of Contents
1 Orderable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.5 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 General IC Functional Description and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Pin Function and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4 Fail-safe Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5 Device Operation Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1 Application Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.1 Package Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Analog Integrated Circuit Device Data
4Freescale Semiconductor
33901
1 Orderable Parts
This section describes the part numbers available to be purchased along with their differences.
Valid orderable part numbers are provided on the web. To determine the orderable part numbers for this device, go to http://
www.freescale.com and perform a part number search.
Table 1. Orderable Part Variations
Part Number (1) Temperature (TA)Package VIO Wake-up Function TXD dominant protection
MC33901WEF
-40 to 125 °C SOIC 8 pins
Yes Available
Available
MC33901WNEF No
MC33901SEF Yes Not Available
MC33901SNEF No
MC34901WEF Yes Available
Not Available
MC34901WNEF No
MC34901SEF Yes Not Available
MC34901SNEF No
Notes
1. To order parts in Tape & Reel, add the R2 suffix to the part number.
Analog Integrated Circuit Device Data
Freescale Semiconductor 5
33901
2 Internal Block Diagram
Figure 3. Internal Block Diagram for MC3x901xEF
Figure 4. Internal Block Diagram for MC3x901xNEF (Version N)
VDD
GND
R
IN
R
IN
2.5V
Mode
Control
Differential
Receiver
Wake-up
Receiver (*)
Pre-
driver
TXD CAN H
CAN L
V
IO
RXD
STB
VIO
Over
-
Timeout
temperature
Bus Biasing
and
V
IO
Monitor
V
IO
V
IO
V
DD
Monitor
V
IO
V
IO
V
DD
V
DD
V
DD
(*) MC3x901WEF only
High
Impedance
Pre-
driver
50 k
Buffer
Input
MC33xx only
Bus Biasing
Mode
and
Control
Differential
Receiver
VIO Monitor
V
IO
VDD Monitor
V
DD
In
p
ut Timeout
MC33xx only
Pre-
drive
r
2.5V
V
IO
V
DD
50 k
R
IN
R
IN
Buffer
High
Impedance
V
IO
Pre-
drive
r
V
DD
V
IO
Over-
temperature
VIO
Wake-up
Receiver (*)
(*) MC3x901WNEF only
V
DD
VDD
TXD
CAN H
RXD
STB
CAN L
NC
GND
Analog Integrated Circuit Device Data
6Freescale Semiconductor
33901
3 Pin Connections
3.1 Pinout
Figure 5. 8-Pin SOIC Pinout
3.2 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 9.
Table 2. 33901 Pin Definitions
Pin Number MC3x901xEF
Pin Name
Mc3x901xNEF
Pin Name Pin Function Definition
1TXD TXD Input CAN bus transmit data input pin
2GND GND Ground Ground
3VDD VDD Input 5.0 V input supply for CAN driver and receiver
4RXD RXD Output CAN bus receive data output pin
5VIO NC Input
or
Not connected
Input supply for the digital input output pins (MC3x901WEF and MC3x901SEF)
or
Not connected pin (MC3x901WNEF and MC3x901SNEF)
6CAN L CAN L Input/Output CAN bus low pin
7CAN H CAN H Input/Output CAN bus high pin
8STB STB Input Standby input for device mode selection
4
2
3
8
5
7
6
1
CANH
CANL
VIO
TXD
GND
VDD
RXD
STB
4
2
3
8
5
7
6
1
CANH
CANL
NC
TXD
GND
VDD
RXD
STB
MC3x901xEF MC3x901xNEF
Analog Integrated Circuit Device Data
Freescale Semiconductor 7
33901
3.3 Maximum Ratings
3.4 Thermal Characteristics
Table 3. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage
to the device.
Symbol Description (Rating) Min. Max. Unit Notes
ELECTRICAL RATINGS
VDD VDD Logic Supply Voltage -0.3 7.0 V
VIO Input/Output Logic Voltage -0.3 7.0 V
VSTB Standby pin Input Voltage -0.3 7.0 V
VTXD TXD maximum voltage range -0.3 7.0 V
VRXD RXD maximum voltage range -0.3 7.0 V
VCANH CANH Bus pin maximum range -27 40 V
VCANL CANL Bus pin maximum range -27 40 V
VESD
ESD Voltage
• Human Body Model (HBM) (all pins except CANH and CANL pins)
• Human Body Model (HBM) (CANH, CANL pins)
• Machine Model (MM)
• Charge Device Model (CDM)(/corners pins)
• System level ESD
• 330 /150 pF Unpowered According to IEC61000-4-2:
• 330 /150 pF Unpowered According to OEM LIN, CAN, Flexray
Conformance
• 2.0 k/150 pF Unpowered According to ISO10605.2008
• 2.0 k/330 pF Powered According to ISO10605.2008
±2000
±8000
±200
±500(/±750)
8.0
6.0
8.0
6.0
V
kV
(2)
Notes
2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), the Machine Model (MM)
(CZAP = 200 pF, RZAP = 0 ), and the Charge Device Model.
Table 4. Thermal Ratings
Symbol Description (Rating) Min. Max. Unit Notes
THERMAL RATINGS
TA
TJ
Operating Temperature
• Ambient
• Junction
-40
-40
125
150
°C
TSTG Storage Temperature -55 150 °C
TPPRT Peak Package Reflow Temperature During Reflow – – °C
THERMAL RESISTANCE AND PACKAGE DISSIPATION RATINGS
RJA Junction-to-Ambient, Natural Convection, Single-Layer Board –140 °C/W
TSD Thermal Shutdown 150 –°C
TSDH Thermal Shutdown Hysteresis –15 °C
Analog Integrated Circuit Device Data
8Freescale Semiconductor
33901
3.5 Operating Conditions
This section describes the operating conditions of the device. Conditions apply to all the following data, unless otherwise noted.
Figure 6. Supply Voltage Operating Range
Table 5. Operating Conditions
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage
to the device.
Symbol Ratings Min Max Unit Notes
VDD_F Functional operating VDD voltage VDD_UV 7.0 V
VDD_OP Parametric operating VDD voltage 4.5 5.5 V
VIO_F Functional operating VIO voltage VIO_UV 7.0 V
VIO_OP Parametric operating VIO voltage 2.8 5.5 V
7.0 V
5.5 V
5.0 V
4.5 V
VDD operating range
Device in Standby mode
Device functional
Max rating exceeded 7.0 V
5.5 V
5.0 V
2.8 V
VIO operating range
Device functional
Max rating exceeded
3.3 V
0V
0V
CAN bus recessive state
V
DD
UV
Device functional or
CAN bus recessive state
Device functional or
Device in Unpowered mode
V
IO
UV
VDD VIO
Analog Integrated Circuit Device Data
Freescale Semiconductor 9
33901
4 General IC Functional Description and Application
Information
4.1 Introduction
The 33901/34901 are high speed CAN transceivers providing the physical interface between the CAN protocol controller of an MCU and
the physical dual wires CAN bus. They are packaged in an 8-pin SOIC with market standard pinout, and offer excellent EMC and ESD
performance without the need for external filter components. They meet the ISO 11898-2 and ISO11898-5 standards, and have low
leakage on CAN bus while unpowered.
The devices are supplied from VDD and VIO, to allow automatic operation with 5.0 V and 3.3 V microcontrollers. They are offered in four
versions: with and without CAN bus wake-up, and with and without TXD dominant timeout.
• MC3x901xEF devices are supplied from VDD and VIO, to allow automatic operation with 5.0 V and 3.3 V microcontrollers.
• MC3x901xNEF devices are supplied from VDD, to allow operation with 5.0 V microcontrollers.
They are offered in eight versions: with and without CAN bus wake-up, with and without TXD dominant time out, and with or without
external VIO.
4.2 Pin Function and Description
4.2.1 VDD Power Supply
This is the supply for the CANH and CANL bus drivers, the bus differential receiver and the bus biasing voltage circuitry. VDD is monitored
for under voltage conditions. See Fail-safe Mechanisms. When the device is in standby mode, the consumption on VDD is extremely low
(Refer to IVDD).
4.2.2 VIO Digital I/O Power Supply
This is the supply for the TXD, RXD, and STB digital input outputs pins. VIO also supplies the low-power differential wake-up receivers
and filter circuitry. This allows detecting and reporting bus wake-up events with device supplied only from VIO. VIO is monitored for
undervoltage conditions. See Fail-safe Mechanisms. When the device is in Standby mode, the consumption on VIO is extremely low
(Refer to IVIO). VIO is internally connected to VDD for the MC3x901xNEF.
4.2.3 STB
STB is the input pin to control the device mode. When STB is high or floating, the device is in Standby mode. When STB is low, the device
is set in Normal mode. STB has an internal pull-up to VIO, so if STB is left open, the device is set to a predetermined Standby mode.
4.2.4 TXD
TXD is the device input pin to control the CAN bus level. In the application, this pin is connected to the microcontroller transmit terminal.
In Normal mode, when TXD is high or floating, the CANH and CANL drivers are OFF, setting the bus in a recessive state. When TXD is
low, the CANH and CANL drivers are activated and the bus is set to a dominant state. TXD has a built-in timing protection that disables
the bus when TXD is dominant for more than tXDOM.
In Standby mode, TXD has no effect on the device. The TXD dominant protection is available on 33901, but not available on 34901.
4.2.5 RXD
RXD is the bus output level report pin. In the application, this pin is connected to the microcontroller receive terminal. In Normal mode,
RXD is a push-pull structure. When the bus is in a recessive state, RXD is high. When the bus is dominant, RXD is low.
In Standby mode, the push-pull structure is disabled, RXD is pulled up to VIO via a resistor (RPU-RXD), and is in a high level. When the
bus wake-up is detected, the push-pull structure resumes and TXD reports a wake-up via a toggling mechanism (refer to Figure 10). The
toggling mechanism for bus wake-up reports is available on the MC33901WEF. This mechanism is not available on the MC33901SEF.
Analog Integrated Circuit Device Data
10 Freescale Semiconductor
33901
4.2.6 CANH and CANL
These are the CAN bus terminals.
CANL is a low side driver to GND, and CANH is a high-side driver to VDD. In Normal mode and TXD high, the CANH and CANL drivers
are OFF, and the voltage at CANH and CANL is approx. 2.5 V, provided by the internal bus biasing circuitry. When TXD is low, CANL is
pulled to GND and CANH to VDD, creating a differential voltage on the CAN bus.
In Standby mode, CANH and CANL drivers are OFF, and these pins are pulled to GND via the device RIN resistor for the MC3x901WEF
versions (ref to parameter Input resistance). In device unpowered mode, CANH and CANL are high-impedance with extremely low leakage
to GND, making the device ideally passive when unpowered.
CANH and CANL have integrated ESD protection and extremely high robustness versus external disturbance, such as EMC and electrical
transients. These pins have current limitation and thermal protection.
4.3 Operating Modes
The device has two operating modes: Standby and Normal.
4.3.1 Normal Mode
This mode is selected when the STB pin is low. In this mode, the device is able to transmit information from TXD to the bus and report the
bus level to the RXD pin. When TXD is high, CANH and CANL drivers are off and the bus is in the recessive state (unless it is in an
application where another device drives the bus to the dominant state). When TXD is low, CANH and CANL drivers are ON and the bus
is in the dominant state.
4.3.2 Standby Mode
This mode is selected when the STB pin is high or floating. In this mode, the device is not able to transmit information from TXD to the
bus, and it cannot report accurate bus information. The Device can only report bus wake-up events via the RXD toggling mechanism.
The bus wake-up report is available on the MC3x901WEF and MC3x901WNEF. This feature is not available on the MC3x901SEF. In
Standby mode, the consumption from VDD and VIO is extremely low. In this mode, the CANH and CANL pins are pulled to GND via the
internal RIN resistor, for device versions MC33901WEF and MC34901WNEF.
4.3.2.1 Wake-up Mechanism
The device versions MC3x901WEF and MC34901WNEF include bus monitoring circuitry to detect and report bus wake-ups. To activate
a wake-up report, three events must occur on the CAN bus:
- event 1: a dominant level for a time longer than tWU_FLT1 followed by
- event 2: a recessive level (event 2) longer than tWU_FLT2 followed by
- event 3: a dominant level (event 3) longer than tWU_FLT2.
The RXD terminal then reports the bus state (bus dominant => RXD low, bus recessive => RXD high). The delay between bus dominant
and RXD low, and bus recessive and RXD high is longer than in Normal mode (refer to tTGLT).
The three events must occur within the tWU_TO timeout.
Figure 10 illustrates the wake-up detection and reporting (toggling) mechanism. If the three events do not occur within the TWU_TO timeout,
the wake-up and toggling mechanism are not active. This is illustrated in Figure 11.
The three events and the timeout function avoid a permanent dominant state on the bus that would generate a permanent wake-up
situation, which would prevent the system from entering low power mode.
4.3.3 Unpowered Mode
When VIO is below VIO UV, the device is in unpowered mode. The CAN bus is in high-impedance and is unable to transmit, receive, or
report bus wake-up events.
4.4 Fail-safe Mechanisms
The device implements various protection, detection, and predictable fail-safe mechanisms.
Analog Integrated Circuit Device Data
Freescale Semiconductor 11
33901
4.4.1 STB and TXD Input Pins
The STB input pin has an internal integrated pull-up structure to the VIO supply pin. If STB is open, the device is set to Standby mode to
ensure predictable behavior and minimize system current consumption.
The TXD input pin also has an internal integrated pull-up structure to the VIO supply pin. If TXD is open, the CAN driver is set to the
recessive state to minimize current consumption and ensure that no false dominant bit is transmitted on the bus.
4.4.2 TXD Dominant Timeout Detection
If TXD is set low for a time longer than the TXD DOM parameter, the CAN drivers are disabled and the CAN bus returns to recessive state.
This prevents the bus from being set to the dominant state permanently in case a fault sets the TXD input to low level permanently.
The device recovers from this when a high level is detected on TXD. Refer to Figures 12.
4.4.3 CAN Current Limitation
The current flowing in and out of the CANH and CANL driver is limited to a maximum of 100 mA, in case of a short-circuit (parameter for
ILIM).
4.4.4 CAN Overtemperature
If the driver temperature exceeds TSD, the driver is turned off to protect the device. A hysteresis is implemented in this protection feature.
The device overtemperature and recovery conditions are shown in Figure 7 “Overtemperature behavior”. The driver remains disabled until
the temperature has fallen below the OT threshold minus the hysteresis and a TXD high to low transition is detected.
Figure 7. Overtemperature behavior
4.4.5 VDD and VIO Supply Voltage Monitoring
For MC3x901WEF and MC3x901SEF versions:
The device monitors the VDD and VIO supply inputs. If VDD falls below VDD UV (VDD_UV), the device is set in Standby mode. This ensures
a predictable behavior due to the loss of VDD. CAN driver, receiver, or bus biasing cannot operate any longer. In this case, the bus wake-
up is available as VIO remains active.
If VIO falls below VIO UV (VIO_UV), the device is set to an unpowered condition. This ensures a predictable behavior due to the loss of
VIO, CAN driver, receiver, or bus biasing can not operate any longer. This sets the bus in high-impedance and in ideal passive behavior.
TXD
high
low
dominant
recessive
Event 1
BUS
Temperature
Hysteresis
Event 1: overtemperature detection. CAN driver disable.
Event 2: temperature falls below “overtemperature threshold minus hysteresis” => CAN driver remains disable.
Event 2
dominant
Event 1
Hysteresis
Event 2
dominant
Event 3
Event 3: temperature below “overtemperature threshold minus hysteresis” and TxD high to low transition => CAN driver enable.
Event 4
Event 4: temperature above “overtemperature threshold minus hysteresis” and TxD high to low transition => CAN driver remains disable.
Event 3
Overtemperature Threshold
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
33901
For MC3x901WNEF and MC3x901SNEF versions:
As VIO is internally connected to VDD, VIO voltage depends on the VDD supply. If VDD is between VIO_UV and VDD_UV, the device is set in
Standby mode. If VDD is below VIO UV, the device is set in unpowered mode.
4.4.6 Bus Dominant State Behavior in Standby Mode
In device Standby mode, a bus dominant condition due, for instance to a short-circuit or a fault in one of the other CAN nodes, does not
generate a permanent wake-up event, by virtue of the multiple events (dominant, recessive, dominant) and timeout required to detect and
report bus wake-ups.
4.5 Device Operation Summary
The following table summarizes the device operation and the state of the input output pins, depending on the operating mode and power
supply conditions.
Table 6. Operation for VIO Devices
STANDBY AND NORMAL MODES FOR MC3X901 VERSION
MODE Description VDD
range
VIO
range STB TXD RXD CAN Wake-up
Normal
Nominal
supply and
normal mode
from
4.5 V to
5.5 V
from 2.8 V
to 5.5 V Low
TXD High
=> bus
recessive
TXD Low
=> bus
dominant
Report CAN state
(bus recessive =>
RXD high, bus
dominant => RXD
low).
CANH and CANL drivers
controlled by TXD input.
Differential receiver report bus
state on RXD pins.
Biasing circuitry provides approx
2.5 in recessive state.
Disabled
Standby
Nominal
supply and
standby mode
from 0 V
to 5.5 V
from 2.8 V
to 5.5 V
High or
floating
No effect.
on CAN
bus.
Report bus wake
up via toggling
mechanism for
MC3x901WNEF.
RXD High level for
MC3x901SNEF
CAN driver and differential
receiver disabled.
Bus biased to GND via internal RIN
resistors for MC3x901WNEF.
Bus high-impedance for
MC3x901SNEF.
Enabled on
MC3x901WNEF
Not available on
MC3x901SNEF
UNDERVOLTAGE AND LOSS OF POWER CONDITIONS FOR MC3X901 VERSION
MODE Description VDD
range
VIO
range STB TXD RXD CAN Wake up
Standby
due to VDD
loss
Device in
standby mode
due to loss of
VDD (VDD fall
below VDD
UV)
from 0 V
to
VDD_UV
(4)
from 2.8 V
to 5.5 V
(5)
X
(3) X
Report bus wake
up via toggling
mechanism for
MC3x901WEF.
RXD High level for
MC3x901SEF
CAN driver and differential
receiver disabled.
Bus biased to GND via internal RIN
resistors for MC3x901WEF.
Bus high-impedance for
MC3x901SEF.
Enabled on
MC33901WEF
Not available on
MC33901SEF.
Unpowered
due to VIO
loss
Device in
unpowered
state due to
low VIO. CAN
bus high-
impedance
(4) from 0 V to
VIO_UV X X
Pulled up to VIO
down to VIO
approx 1.5 V.
CAN driver and differential
receiver disabled.
High-impedance, with ideal
passive behavior.
Not available.
Notes
3. STB pin has no effect. Device enters in standby mode.
4. VDD consumption < 10 uA down to VDD approx 1.5 V.
5. VIO consumption < 10 uA down to VIO approx 1.5 V. If STB is high or floating.
Analog Integrated Circuit Device Data
Freescale Semiconductor 13
33901
Table 7. Operation for Non-VIO Devices
STANDBY AND NORMAL MODES FOR MC3X901N VERSIONS
MODE Description VDD range STB TXD RXD CAN Wake-up
Normal
Nominal
supply and
normal mode
from 4.5 V
to 5.5 V Low
TXD High
=> bus
recessive
TXD Low
=> bus
dominant
Report CAN
state
(bus
recessive =>
RXD high, bus
dominant =>
RXD
low)
CANH and CANL drivers
controlled
by TXD input.
Differential receiver
report bus
state on RXD pins.
Biasing circuitry provides
approx 2.5
in recessive state
Disabled
Standby
Nominal
supply and
standby mode
from 2.8 V
to 5.5 V
High or
floating
No effect.
on
CAN
bus.
Report bus wake
up
via toggling
mechanism for
MC3x901WEF.
RXD High level
for
MC3x901SEF
CAN driver and differential
receiver
disabled.
Bus biased to GND via internal
RIN
resistors for
MC3x901WEF.
Bus high-impedance for
MC3x901SEF
Enabled on
MC33901WEF
Not available on
MC33901SEF
UNDERVOLTAGE AND LOSS OF POWER CONDITIONS FOR MC3X901N VERSIONS
MODE Description VDD range STB TXD RXD CAN Wake-up
Unpowered
due to VDD
loss
Device in
unpowered
state due to
low VDD and
so VIO. CAN
bus high-
impedance
from 0 V to
VIO_UV
X X
Pulled up to VIO
down to VIO
approx 1.5 V.
CAN driver and differential receiver
disabled.
High-impedance, with ideal passive
behavior
Not available.
Analog Integrated Circuit Device Data
14 Freescale Semiconductor
33901
4.6 Electrical Characteristics
Table 8. Static Electrical Characteristics
Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0 V, R on CAN bus
(RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions,
unless otherwise noted.
Symbol Characteristic Min Typ Max Unit Notes
POWER INPUT VDD
VDD
VDD Supply Voltage Range
• Nominal Operation 4.5 –5.5 V
VDD_UV VDD Undervoltage threshold 3.0 –4.5 V
IVDD
VDD supply current
• Normal mode, TXD High
• Normal mode, TXD Low
• Standby mode (MC3x901)
• Standby mode (MC3x901N)
–
–
–
–
–
40
–
—
5.0
65
5.0
15
mA
mA
µA
µA
POWER INPUT VIO
VIO
Vio Supply Voltage Range
• Nominal Operation 2.8 –5.5 V
VIO_UV VIO Under voltage threshold – – 2.8 V
IVIO
VIO supply current
• Normal mode, TXD high
• Normal mode, TXD low or CAN bus in dominant state
• Standby mode, CAN bus in recessive state
• Standby mode, wake-up filter and wake-up time out running
–
–
–
–
–
–
5.0
–
200
1.0
10
150
µA
mA
µA
µA
STB INPUT
VSTB
Input voltages
• High level Input Voltage
• Low level input voltage
• Input threshold hysteresis
0.7
–
200
–
–
–
–
0.3
–
VIO
V
mV
RPU-STB Pull-up resistor to VIO – 100 – k
TXD INPUT
VTXD
Input voltages
• High level Input Voltage
• Low level input voltage
• Input threshold hysteresis
0.7
–
200
–
–
300
–
0.3
–
VIO
V
mV
RPU-TXD Pull-up resistor to VIO 5.0 –50 k
RXD OUTPUT
IRXD
Output current
• RXD high, VRXD high = VIO - 0.4 V
• RXD low, VRXD high = 0.4 V
-5.0
1.0
-2.5
2.5
-1.0
5.0
mA
RPU-RXD Pull-up resistor to VIO (in standby mode, without toggling - no wake-up
report) 25 50 90 k
Analog Integrated Circuit Device Data
Freescale Semiconductor 15
33901
CANL AND CANH TERMINALS
VREC
Recessive voltage, TXD high, no load
• CANL recessive voltage
• CANH recessive voltage
2.0
2.0
2.5
2.5
3.0
3.0
V
VDIFF_REC CANH - CANL differential recessive voltage, TXD high, no load -50 –50 mV
VREC_SM
Recessive voltage, sleep mode, no load
• CANL recessive voltage
• CANH recessive voltage
-0.1
-0.1
–
–
0.1
0.1
V
VDOM
Dominant voltage, TXD low (t < TXDOM), RL = 45 to 65
• CANL dominant voltage
• CANH dominant voltage
0.5
2.75
–
–
2.25
4.5
V
VDIFF_DOM CANH - CANL differential dominant voltage, RL = 45 to 65
TxDLOW
1.5 2.0 3.0 V
VSYM Driver symmetry CANH + CANL 0.9 1.0 1.1 VDD
ILIM
Current limitation, TXD low (t < TXDOM)
• CANL current limitation, CANL 5.0 V to 28 V
• CANH current limitation, CANH = 0 V
40
-100
–
–
100
-40
mA
VDIFF_THR CANH - CANL Differential input threshold 0.5 –0.9 V
VDIFF_HYS CANH - CANL Differential input voltage hysteresis 50 –400 mV
VDIFF_THR_S CANH - CANL Differential input threshold, in standby mode 0.4 –1.15 V
VCM Common Mode Voltage -12 –12 V
RIN
Input resistance
• CANL input resistance
• CANH input resistance
5.0
5.0
–
–
50
50
k
RIN_DIFF CANH, CANL differential input resistance 10 –100 k
RIN_MATCH Input resistance matching -3.0 –3.0 %
IIN_UPWR
CANL or CANH input current, device unpowered, VDD = VIO = 0 V,
VCANL and VCANH 0 V to 5.0 V range
• VDD connected with R = 0 k to GND
• VDD connected with R=47 k to GND
-10
-10
–
–
10
10
µA
RIN_UPWR CANL, CANH input resistance, VCANL = VCANH = 12 V 10 – – k
CCAN_CAP CANL, CANH input capacitance (guaranteed by design and
characterization) –20 –pF
CDIF_CAP CANL, CANH differential input capacitance (guaranteed by design
and characterization) –10 –pF
TSD Temperature Shutdown 150 185 –°C
Table 8. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0 V, R on CAN bus
(RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions,
unless otherwise noted.
Symbol Characteristic Min Typ Max Unit Notes
Analog Integrated Circuit Device Data
16 Freescale Semiconductor
33901
Figure 8. Timing Test Circuit
Table 9. Dynamic Electrical Characteristics
Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0 V, R on CAN bus (RL) =
60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless
otherwise noted.
Symbol Characteristic Min Typ Max Unit Notes
TIMING PARAMETERS
tXDOM TXD DOM 2.5 –16 ms (6)
tLOOP T loop – – 255 ns
tWU_FLT1 TWU filter1 0.5 –5.0 µs (7)
tWU_FLT2 TWU filter2 0.08 –1.0 µs (7)
tTGLT Tdelay during toggling – – 1.3 µs (7)
tWU_TO Twake up timeout 1.5 –7.0 ms (7)
tDELAY_PWR Delay between power-up and device ready –120 300 µs
tDELAY_SN Transition time from Standby to Normal mode (STB high to low) 40 us
Notes
6. MC33901 & MC33901N versions only
7. MC3x901WEF and MC3x901WNEF versions only
MC33901
CANH
CANL
RXD
TXD
VIO
STB
VDD
GND
5.0 V
100 nF
60 100 pF
15 pF
1.0 F
Analog Integrated Circuit Device Data
Freescale Semiconductor 17
33901
Figure 9. CAN Timing Diagram
Figure 10. Wake-up Pattern Timing Illustration
0.3 VIO
TXD
CANH
RXD
CANL
VDIFF
dominant
recessive
0.9 V
0.5 V
0.7 VIO
high
low
high
low
tLOOP (R-D) tLOOP (D-R)
(CANH - CANL)
RXD
high
low
t_WUFL1
dominant dominant
recessive
t_WUFL2
1st event
t_WUFL2
T_TOG
2nd event 3rd event
T_TOG T_TOG T_TOG
BUS
dominant
recessive recessive
t_WUTO
note: 1st, 2nd and 3rd event must occurs within t_WUTO timing.
Analog Integrated Circuit Device Data
18 Freescale Semiconductor
33901
Figure 11. Timeout Wake-up Timing Illustration
Figure 12. TXD Dominant Timeout Detection Illustration
RXD
high
t_WUFL1
dominant dominant
recessive
t_wUFL2
1st event 2nd event
BUS
recessive
t_WUTO (expired)
t_WUFL1
1st event
t_WUFL2
2nd event
note: only the 1st and the 2nd event occurred within t_WUTO timing.
TXD high
dominant recessive
BUS
TXD_dom timeout
dominant
TXD_dom timeout
dominant
TXD_dom timeout
low
RXD high
low
TXD dom timeout expired
recovery condition: TXD high
Analog Integrated Circuit Device Data
Freescale Semiconductor 19
33901
5 Typical Applications
5.1 Application Diagrams
Figure 13. Single Supply Typical Application Schematic for MC3x901xEF
Figure 14. Single Supply Typical Application Schematic for MC3x901xNEF
CANH
MCU
CAN CANL
RXD
TXD
VIO
STB
VDD
GND
VCC
5.0 V Reg. 5.0 V
RXD
TXD
controller
Port_xx
VPWR
C1
D
R1
C1: 1.0 µF
R1: application dependant
(ex: 60, 120 ohm or other value)
MC3x901xEF
MC3x901xNEF
CANH
MCU
CAN CANL
RXD
TXD
STB
VDD
GND
VCC
5.0 V Reg. 5.0 V
RXD
TXD
controller
Port_xx
VPWR
C1
D
R1
C1: 1.0 µF
R1: application dependant
(ex: 60, 120 ohm or other value)
Analog Integrated Circuit Device Data
20 Freescale Semiconductor
33901
Figure 15. Dual Supply Typical Application Schematic for MC3x901xEF
Figure 16. Example of Bus Termination Options
MC3x901xEF
CANH
MCU
CAN CANL
RXD
TXD
VIO
STB
VDD
GND
VCC
3.3 - 5.0 V
RXD
TXD
controller
Port_xx
VPWR
5.0 V Reg
3.3-5.0 V Reg
5.0 V
C1
C2
R1
D
C1: 1.0 µF
R1: application dependant
(ex: 60, 120 ohm or other value)
C2: 1.0 µF
R2
R3
CANH
CANL
C3
R2, R3: application dependant
(ex: 60 ohm or other value):
C3: application dependant
(ex: 4.7 nF or other value):
Analog Integrated Circuit Device Data
Freescale Semiconductor 21
33901
6 Packaging
6.1 Package Mechanical Dimensions
Package dimensions are provided in package drawings. To find the most current package outline drawing, go to www.freescale.com and
perform a keyword search for the drawing’s document number.
.
Table 10. Packaging Information
Package Suffix Package Outline Drawing Number
8-Pin SOICN EF 98ASA42564B
Analog Integrated Circuit Device Data
22 Freescale Semiconductor
33901
.
Analog Integrated Circuit Device Data
Freescale Semiconductor 23
33901
7 Revision History
REVISION DATE DESCRIPTION OF CHANGES
1.0 12/2013 • Initial release
2.0 4/2015
• Changed Advance Information to Technical Data
• Added information for high-speed (up to 1.0 Mbit/s)
• Added VREC_SM (CANH, CANL recessive voltage, sleep mode) to Table 7
• Added VSYM (Driver symmetry) to Table 7
• Added IIN_UPWR to Table 7
3.0 6/2015 • Added MC33901xNEF and MC34901xNEF parts to Table 1, Orderable Parts
• Added additions to all figures and tables to include the variations for the new part numbers
Document Number: MC33901
Rev. 3.0
6/2015
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