ICS552-01A
MDS 552-01A C 1Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
Description
The ICS552-01A produces 8 low-skew copies of a
multiple of the input when a clock or fundamental,
parallel-mode crystal is connected to it. Unlike other
clock drivers, it does not require a separate oscillator
for the input. Using ICS’ patented Phase-Locked Loop
(PLL) to multiply the input frequency, it is ideal for
generating and distributing multiple high-frequency
clocks.
Features
Packaged as 20-pin SSOP (QSOP)
Pb-free packaging available
Input frequency of 10.0 to 27.0 MHz
Contains on-chip multiplier with selections of x1,
x1.33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
Provides 8 low-skew outputs (<250 ps)
Output clock duty cycle of 40/60 at 3.3 V
Operating voltages of 3.0 V to 5.5 V
Industrial temperature available
Power-down and Tri-state modes
Block Diagram
Crystal
Buffer/
Crystal
Oscillator
GND
VDD
PLL
Multiplier
S3:S0 CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
4
X2
10.0 to 27.0 MHz
crystal or clock input
External capacitors are
required with a crystal input.
X1
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
MDS 552-01A C 2Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01A
Pin Assignment Multiplier Select Table
Pin Descriptions
16
1
15
2
14
DC S0
3
13
X2
4
12
X1/ICLK
DC
5
11
S2
6
7
VDD
8
GND S3
VDD
GND
CLK1
CLK5
CLK2 CLK6
9
10
CLK3
CLK7
CLK4
CLK8
20
19
18
17
20-pin (150 mil) SSOP (QSOP)
S1
S3 S2 S1 S0 Multiplier
0 0 0 0 Power Down
0001 x1
0010 x1.333
0011 x2
0100 x2.666
0101 x3
0110 x3.333
0111 x4
1000 x5
1 0 0 1 x4.66
1010 x6
1 1 0 1 Tri-state all
Pin
Number
Pin
Name
Pin
Type Pin Description
1 DC Do not connect.
2 X2 XO Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal.
3X1/ICLKXI
Crystal connection. Connect to a 10 - 27 MHz fundamental mode crystal or
clock.
4 VDD Power Connect to +3.3 V or 5.0 V. Decouple with pin 6.
5 S2 Input Multiplier Select pin 2 per table above.
6 GND Power Connect to ground.
7 CLK1 Output Output clock 1.
8 CLK2 Output Output clock 2.
9 CLK3 Output Output clock 3.
10 CLK4 Output Output clock 4.
11 S1 Input Multiplier Select pin 1per table above
12 CLK5 Output Output clock 5.
13 CLK6 Output Output clock 6.
14 GND Power Connect to ground.
15 S3 Input Multiplier Select pin 3 per table above
16 VDD Power Connect to +3.3 V or 5.0 V. Decouple with pin 14.
17 CLK7 Output Output clock 7.
18 CLK8 Output Output clock 8.
19 DC Do not connect.
20 S0 Input Multiplier Select pin 0 per table above
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
MDS 552-01A C 3Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01A
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50 trace (a
commonly used trace impedance), place a 33 resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20.
Decoupling Capacitors
As with any high-performance mixed-signal IC, the
ICS552-01A must be isolated from system power
supply noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and GND on pins 4 and 6, and 16
and 14. Other VDDs and GNDs can be connected to
these pins or directly to their respective ground planes.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal
(CL -12 pF)*2. In this equation, CL= crystal load
capacitance in pF. Example: For a crystal with a 18 pF
load capacitance, two 12 pF capacitors should be
used. For a clock input, connect it X1/ICLK and leave
X2 unconnected (floating).
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) Each 0.01µF decoupling capacitor should be
mounted on the component side of the board as close
to the VDD pin as possible. No vias should be used
between decoupling capacitor and VDD pin. The PCB
trace to VDD pin should be kept as short as possible,
as should the PCB trace to the ground via.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI, the 33 series termination resistor
(if needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers.
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
MDS 552-01A C 4Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01A
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS552-01A. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Recommended Operation Conditions
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85°C
Parameter Condition Min. Typ. Max. Units
Supply Voltage, VDD Referenced to GND 7 V
Inputs Referenced to GND -0.5 VDD+0.5 V
Clock Outputs Referenced to GND -0.5 VDD+0.5 V
Storage Temperature -65 150 °C
Soldering Temperature Max 10 seconds 260 °C
Junction Temperature 125 °C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature (ICS552R-01A) 0 +70 °C
Ambient Operating Temperature (ICS552R-01AI) -40 +85 °C
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.0 5.5 V
Input High Voltage VIH ICLK VDD/2+1 VDD/2 V
Input Low Voltage VIL ICLK VDD/2 VDD/2-1 V
Input High Voltage VIH S3:S0 2 V
Input Low Voltage VIL S3:S0 0.8 V
Output High Voltage VOH VDD = 3.3 V,
IOH = -8 mA
2.4 V
Output Low Voltage VOL VDD = 3.3 V,
IOL = 8 mA
0.4 V
Output High Voltage VOH VDD = 3.3 V or 5 V,
IOH = -8 mA
VDD-0.4 V
Short Circuit Current IOS VDD = 3.3 V, each
output
±50 mA
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
MDS 552-01A C 5Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01A
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V or 5 V, Ambient Temperature -40 to +85° C
Thermal Characteristics
Operating Supply Current IDD at 3.3 V, no load, 25
MHz in, x4
35 mA
Operating Supply Current IDD at 5 V, no load, 25 MHz
in, x4
59 mA
Power-down Supply
Current
IDD S3:S0 = 0 (GND) 55 µA
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency FIN Fundamental crystal 10 27 MHz
Input clock 10 27 MHz
Output Rise Time tOR 0.8 to 2.0 V 1.5 ns
Output Fall Time tOF 2.0 to 0.8 V 1.5 ns
Duty Cycle at VDD/2 40 50 60 %
Output-to-Output Skew Rising edges at VDD/2 250 ps
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
θJA Still air 135 °C/W
θJA 1 m/s air flow 93 °C/W
θJA 3 m/s air flow 78 °C/W
Thermal Resistance Junction to Case θJC 60 °C/W
Parameter Symbol Conditions Min. Typ. Max. Units
Crystal Oscillator and Multiplier with 8 Low Skew Outputs
MDS 552-01A C 6Revision 012904
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01A
Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Wide Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
Part / Order Number Marking Shipping
packaging
Package Temperature
ICS552R-01A ICS552-01A Tubes 20-pin SSOP 0 to +70°C
ICS552R-01AT ICS552-01A Tape and Reel 20-pin SSOP 0 to +70°C
ICS552R-01ALF ICS552-01ALF Tubes 20-pin SSOP 0 to +70°C
ICS552R-01ALFT ICS552-01ALF Tape and Reel 20-pin SSOP 0 to +70°C
ICS552R-01AI ICS552-01AI Tubes 20-pin SSOP -40 to +85°C
ICS552R-01AIT ICS552-01AI Tape and Reel 20-pin SSOP -40 to +85°C
INDEX
AREA
1 2
20
D
E1 E
SEATING
PLANE
A1
A
A2
e
- C -
b
aaa C
c
L
Millimeters Inches
Symbol Min Max Min Max
A 1.35 1.75 0.053 0.069
A1 0.10 0.25 0.004 0.010
A2 -- 1.50 -- 0.059
b 0.20 0.30 0.008 0.012
c 0.18 0.25 0.007 0.010
D 8.55 8.75 0.337 0.344
E 5.80 6.20 0.228 0.244
E1 3.80 4.00 0.150 0.157
e .635 Basic .025 Basic
L 0.40 1.27 0.016 0.050
α0°8°0°8°
aaa -- 0.10 -- 0.004