www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2001-2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
REG113
FEATURES
●CAP-FREE DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
250mV typ at 400mA
Output Capacitor
not
Required for Stability
●UP TO 500mA PEAK, TYPICAL
●FAST TRANSIENT RESPONSE
●
VERY LOW NOISE:
28
µ
Vrms
●HIGH ACCURACY: ±1.5% max
●HIGH EFFICIENCY:
I
GND
= 850
µ
A at I
OUT
= 400mA
Not Enabled: IGND = 0.01µA
●2.5V, 2.85V, 3.0V, 3.3V, AND 5.0V OUTPUT VERSIONS
●OTHER OUTPUT VOLTAGES AVAILABLE UPON
REQUEST
●FOLDBACK CURRENT LIMIT
●THERMAL PROTECTION
●SMALL SURFACE-MOUNT PACKAGES:
SOT23-5 and MSOP-8
APPLICATIONS
●PORTABLE COMMUNICATION DEVICES
●BATTERY-POWERED EQUIPMENT
●PERSONAL DIGITAL ASSISTANTS
●MODEMS
●BAR-CODE SCANNERS
●BACKUP POWER SUPPLIES
DESCRIPTION
The REG113 is a family of low-noise, low-dropout linear
regulators with low ground pin current. Its new DMOS topol-
ogy provides significant improvement over previous designs,
including low-dropout voltage (only 250mV typ at full load),
and better transient performance. In addition, no output
capacitor is required for stability, unlike conventional low-
dropout regulators that are difficult to compensate and re-
quire expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 850µA (at IOUT = 400mA)
and drops to 10nA when not enabled. Unlike regulators with
PNP pass devices, quiescent current remains relatively con-
stant over load variations and under dropout conditions.
The REG113 has very low output noise (typically 28µVrms
for VOUT = 3.3V with CNR = 0.01µF), making it ideal for use
in portable communications equipment. Accuracy is main-
tained over temperature, line, and load variations. Key
parameters are tested over the specified temperature range
(–40°C to +85°C).
The REG113 is well protected—internal circuitry provides a
current limit which protects the load from damage, further-
more, thermal protection circuitry keeps the chip from being
damaged by excessive temperature. The REG113 is avail-
able in SOT23-5 and MSOP-8 packages.
SBVS031D – MARCH 2001 – REVISED SEPTEMBER 2005
REG113
Enable
GND
0.1µFC
OUT(1)
+
+V
OUT
V
IN
NR
(2)
NOTES: (1) Optional. (2) NR = Noise Reduction.
DMOS
400mA Low-Dropout Regulator
All trademarks are the property of their respective owners.
REG113
2SBVS031D
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
Supply Input Voltage, VIN .......................................................–0.3V to 12V
Enable Input Voltage, VEN ....................................................... –0.3V to VIN
NR Pin Voltage, VNR .............................................................–0.3V to 6.0V
Output Short-Circuit Duration ......................................................Indefinite
Operating Temperature Range (TJ) ................................ –55°C to +125°C
Storage Temperature Range (TA) ................................... –65°C to +150°C
Lead Temperature (soldering, 3s).................................................. +240°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small paramet-
ric changes could cause the device not to meet its published
specifications.
PIN CONFIGURATIONS
Top View
V
IN
GND
Enable
V
OUT
NR
SOT
1
2
3
5
4
(N Package)
Enable
VIN
VOUT
NR
GND
GND
GND
GND
MSOP
1
2
3
4
8
7
6
5
(E Package)
NOTE: Leads 5 through 8 are fused to the lead frame and can be
used for improved thermal dissipation.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT VOUT(2)
REG113xx-
yyyy/zzz
XX is package designator.
YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable).
ZZZ is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
(2) Output voltages from 2.5V to 5.1V in 50mV increments are available; minimum order quantities apply. Contact factory for details and availability.
REG113 3
SBVS031D www.ti.com
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C.
At TJ = +25°C, VIN = VOUT + 1V, VENABLE = 1.8V, IOUT = 5mA, CNR = 0.01µF, and COUT = 0.1µF(1), unless otherwise noted.
REG113NA
REG113EA
PARAMETER CONDITION MIN TYP MAX UNITS
OUTPUT VOLTAGE
Output Voltage Range VOUT
REG113-2.5 2.5 V
REG113-2.85 2.85 V
REG113-3 3.0 V
REG113-3.3 3.3 V
REG113-5 5.0 V
Accuracy ±0.5 ±1.5 %
Over Temperature ±2.3 %
vs Temperature dVOUT/dT 50 ±2.3 ppm/°C
vs Line and Load
IOUT = 5mA to 400mA, VIN = (VOUT + 0.4V) to 10V
±1±2.3 %
Over Temperature
IOUT = 5mA to 400mA,
VIN = (VOUT + 0.6V) to 10V ±3.0 %
DC DROPOUT VOLTAGE(2) VDROP IOUT = 5mA 4 10 mV
For all models IOUT = 400mA 250 325 mV
Over Temperature IOUT = 400mA 410 mV
VOLTAGE NOISE
f = 10Hz to 100kHz Vn
Without CNR CNR = 0, COUT = 0 23µVrms/V • VOUT µVrms
With CNR CNR = 0.01µF, COUT = 10µF7µVrms/V • VOUT µVrms
OUTPUT CURRENT
Current Limit(3) ICL 425 500 575 mA
Over Temperature 600 mA
Short-Circuit Current Limit ISC 200 mA
RIPPLE REJECTION
f = 120Hz 65 dB
ENABLE CONTROL
VENABLE HIGH (output enabled) VENABLE 1.8 VIN V
VENABLE LOW (output disabled) –0.2 0.5 V
IENABLE HIGH (output enabled) IENABLE VENABLE = 1.8V to VIN, VIN = 1.8V to 6.5(4) 1 100 nA
IENABLE LOW (output disabled) VENABLE = 0V to 0.5V 2 100 nA
Output Disable Time COUT = 1.0µF, RLOAD = 13Ω50 µs
Output Enable Softstart Time COUT = 1.0µF, RLOAD = 13Ω1.5 ms
THERMAL SHUTDOWN
Junction Temperature
Shutdown 160 °C
Reset from Shutdown 140 °C
GROUND PIN CURRENT
Ground Pin Current IGND IOUT = 5mA 400 500 µA
IOUT = 400mA 850 1000 µA
Enable Pin LOW VENABLE ≤ 0.5V 0.01 0.2 µA
INPUT VOLTAGE VIN
Operating Input Voltage Range(5) 1.8 10 V
Specified Input Voltage Range VIN > 1.8V VOUT + 0.4 10 V
Over Temperature VIN > 1.8V VOUT + 0.6 10 V
TEMPERATURE RANGE
Specified Range TJ–40 +85 °C
Operating Range TJ–55 +125 °C
Storage Range TA–65 +150 °C
Thermal Resistance
SOT23-5 Surface-Mount
θ
JA Junction-to-Ambient 200 °C/W
MSOP-8 Surface-Mount
θ
JC Junction-to-Case 35(6) °C/W
θ
JA Junction-to-Ambient 160(6) °C/W
NOTES: (1) The REG113 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at VIN = VOUT
+ 1V at fixed load.
(3) Current limit is the output current that produces a 10% change in output voltage from VIN = VOUT + 1V and IOUT = 5mA.
(4) For VENABLE > 6.5V, see typical characteristic
IENABLE vs VENABLE
.
(5) The REG113 no longer regulates when VIN < VOUT + VDROP (MAX). In dropout, the impedance from VIN to VOUT is typically less than 1Ω at TJ = +25°C.
(6) See Figure 7.
REG113
4SBVS031D
www.ti.com
TYPICAL CHARACTERISTICS
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
0 50 100 150 200 250 300 350 400
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
Ouput Voltage Change (%)
Output Current (mA)
OUTPUT VOLTAGE CHANGE vs IOUT
(Referred to IOUT = 200mA at +25°C)
–55°C
+25°C
+125°C
–50 –25 0 25 50 75 100 125
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
Ouput Change (%)
Temperature (°C)
LOAD REGULATION vs TEMPERATURE
(VIN = VOUT + 1V)
IOUT = 40mA to 400mA
IOUT = 5mA to 400mA
01234567
40
30
20
10
0
–10
–20
–30
–40
Ouput Voltage Change (mV)
VIN – VOUT (V)
LINE REGULATION
(Referred to VIN = VOUT + 1V at IO = 200mA)
5mA
200mA
400mA
–50 –25 0 25 50 75 100 125
0
–0.05
–0.10
–0.15
–0.20
–0.25
–0.30
–0.35
–0.40
–0.45
–0.50
Ouput Change (%)
Temperature (°C)
LINE REGULATION vs TEMPERATURE
I
OUT
= 200mA, (V
OUT
+ 1V) < V
IN
< 10
I
OUT
= 200mA, (V
OUT
+ 0.4V) < V
IN
< 10
I
OUT
= 400mA, (V
OUT
+ 1V) < V
IN
< 10
I
OUT
= 400mA, (V
OUT
+ 0.4V) < V
IN
< 10
0 50 100 150 200 250 350300 400
400
350
300
250
200
150
100
50
0
DC Dropout Voltage (mV)
Output Current (mA)
DC DROPOUT VOLTAGE vs OUTPUT CURRENT
–55°C
+25°C
+125°C
400
350
300
250
200
150
100
50
0
DC Dropout Voltage (mV)
DC DROPOUT VOLTAGE vs TEMPERATURE
–50 –25 0 25 50 75 100 125
Junction Temperature (°C)
IOUT = 400mA
REG113 5
SBVS031D www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
–1.0
–0.8
–0.6
–0.4
–0.2
0.0
0.2
0.4
0.6
0.8
1.0
18
16
14
12
10
8
6
4
2
0
Percentage of Units (%)
Error (%)
OUTPUT VOLTAGE ACCURACY HISTOGRAM
0
10
20
30
40
50
60
70
80
90
100
5
15
25
35
45
55
65
75
85
95
30
25
20
15
10
5
0
Percentage of Units (%)
VOUT Drift (ppm/°C)
OUTPUT VOLTAGE DRIFT HISTOGRAM
–50 25–25 0 50 75 100 125
1µ
100n
10n
1n
100p
I
GND
(A)
Temperature (°C)
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
V
ENABLE
= 0.5V
V
IN
= V
OUT
+ 1V
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
Output Voltage Change (%)
OUTPUT VOLTAGE vs TEMPERATURE
(Referred to IOUT = 200mA at +25°C)
–50 –25 0 25 50 75 100 125
Temperature (°C)
IOUT = 5mA
IOUT = 200mA
IOUT = 400mA
0 50 100 150 200 250 300 350 400
1000
900
800
700
600
500
400
300
200
100
0
IGND (µA)
Load Current (mA)
GROUND CURRENT vs LOAD CURRENT
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5.0V
1000
950
900
850
800
750
700
I
GND
(µA)
GROUND CURRENT vs TEMPERATURE
–50 –25 0 25 50 75 100 125
Temperature (°C)
I
OUT
= 400mA V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 5.0V
REG113
6SBVS031D
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
10 100 1k 10k 100k 10M1M
80
70
60
50
40
30
20
10
0
Ripple Rejection (dB)
Frequency (Hz)
RIPPLE REJECTION vs FREQUENCY
I
OUT
= 2mA
I
OUT
= 100mA
I
OUT
= 2mA
C
OUT
= 10µFI
OUT
= 100mA
C
OUT
= 10µF
C
OUT
= 0µF
1.0 0.9 0.60.8 0.7 0.5 0.4 0.3 00.2 0.1
30
25
20
15
10
5
0
Ripple Rejection (dB)
VIN – VOUT (V)
RIPPLE REJECTION vs (VIN – VOUT)
Frequency = 100kHz
COUT = 10µF
VOUT = 3.3V
IOUT = 100mA
0.1 1 10
60
50
40
30
20
10
0
Noise Voltage (µVrms)
C
OUT
(µF)
RMS NOISE VOLTAGE vs C
OUT
REG113-5.0
REG113-3.3
REG113-2.5
C
OUT
= 0.01µF
10Hz < BW < 100kHz
1 100 1k10
REG113-5.0
REG113-3.3
REG113-2.5
10k
110
100
90
80
70
60
50
40
30
20
Noise Voltage (µVrms)
CNR (pF)
RMS NOISE VOLTAGE vs CNR
COUT = 0µF
10Hz < BW < 100kHz
10 100 1k 10k 100k
10
1
0.1
0.01
eN (µV/√Hz)
Frequency (Hz)
NOISE SPECTRAL DENSITY
IOUT = 100mA
CNR = 0µF
COUT = 1µF
COUT = 0µF
COUT = 10µF
10 100 1k 10k 100k
10
1
0.1
0.01
eN (µV/√Hz)
Frequency (Hz)
NOISE SPECTRAL DENSITY
IOUT = 100mA
CNR = 0.01µF
COUT = 1µF
COUT = 0µF
COUT = 10µF
REG113 7
SBVS031D www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
TURN-ON
250µs/div
1V/div1V/div
VENABLE
VOUT
REG113-3.3
V
IN
= V
OUT
+ 1V
C
NR
= 0.01µF
C
OUT
= 10µF
R
LOAD
= 13Ω
C
OUT
= 0µF
R
LOAD
= 13Ω
C
OUT
= 0µF
R
LOAD
= 660Ω
TURN-OFF
200µs/div
1V/div1V/div
V
ENABLE
V
OUT
REG113-3.3
COUT = 10µF
RLOAD = 13Ω
COUT = 1.0µF
RLOAD = 13Ω
COUT = 0µF
RLOAD = 660Ω
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Output Voltage (V)
CURRENT LIMIT FOLDBACK
0 50 100 150 200 250 300 350 400 450 500 550
Output Current Limit (mA)
VOUT = 3.3V
ICL
ISC
–50 –25 0 25 50 75 100 125
600
550
500
450
400
350
300
250
200
150
100
Output Current (mA)
Temperature (°C)
CURRENT LIMIT vs TEMPERATURE
I
CL
(Current Limit)
I
SC
(Short-Circuit Current)
LOAD TRANSIENT RESPONSE
10µs/div
500mV/div
VOUT
IOUT
40mA
400mA
VOUT
REG113-3.3
VIN = 4.3V
COUT = 10µF
COUT = 0
LINE TRANSIENT RESPONSE
50µs/div
25mV/div
V
OUT
V
IN
4.3V
5.3V
V
OUT
REG113-3.3
IOUT = 400mA
C
OUT
= 10µF
C
OUT
= 0
REG113
8SBVS031D
www.ti.com
BASIC OPERATION
The REG113 series of LDO (low dropout) linear regulators
offers a wide selection of fixed output voltage versions and
an adjustable output version. The REG113 belongs to a
family of new generation LDO regulators that use a DMOS
pass transistor to achieve ultra low-dropout performance
and freedom from output capacitor constraints. Ground pin
current remains under 1mA over all line, load, and tempera-
ture conditions. All versions have thermal and over-current
protection, including foldback current limit.
The REG113 does not require an output capacitor for
regulator stability and is stable over most output currents
and with almost any value and type of output capacitor up
to 10µF or more. For applications where the regulator output
current drops below several milliamps, stability can be
enhanced by adding a 1kΩ to 2kΩ load resistor, using
capacitance values smaller than 10µF, or keeping the effec-
tive series resistance greater than 0.05Ω including the
capacitor ESR and parasitic resistance in printed circuit
board traces, solder joints, and sockets.
Although an input capacitor is not required, it is a good
standard analog design practice to connect a 0.1µF low
ESR capacitor across the input supply voltage; this is
recommended to counteract reactive input sources and
improve ripple rejection by reducing input voltage ripple.
Figure 1 shows the basic circuit connections for the fixed
voltage models.
INTERNAL CURRENT LIMIT
The REG113 internal current limit has a typical value of
500mA. A foldback feature limits the short-circuit current to
a typical short-circuit value of 200mA. A curve of VOUT
versus IOUT is given in Figure 2, and in the Typical Charac-
teristics section.
FIGURE 1. Fixed Voltage Nominal Circuit for the REG113.
REG113
Enable
VOUT
COUT
VIN
0.1µF
CNR
0.01µF
Gnd NR
In Out
Optional
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Output Voltage (V)
CURRENT LIMIT FOLDBACK
0 50 100 150 200 250 300 350 400 450 500 550
Output Current Limit (mA)
VOUT = 3.3V
ICL
ISC
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
678910
10µ
1.0µ
100n
10n
1n
I
ENABLE
(A)
V
ENABLE
(V)
I
ENABLE
vs V
ENABLE
T = +25°C
T = –55°C
T = +125°C
POWER-UP/POWER-DOWN
1s/div
500mV/div
V
OUT
= 3.0V
R
LOAD
= 12Ω
ENABLE
The Enable pin is active high and compatible with standard
TTL-CMOS levels. Inputs below 0.5V (max) turn the regula-
tor off and all circuitry is disabled. Under this condition,
ground pin current drops to approximately 10nA. When not
used, the Enable pin can be connected to VIN.
FIGURE 2. Foldback Current Limit of the REG113-3.3 at 25°C.
REG113 9
SBVS031D www.ti.com
OUTPUT NOISE
A precision bandgap reference is used to generate the
internal reference voltage, VREF. This reference is the domi-
nant noise source within the REG113 and generates approxi-
mately 29µVrms in the 10Hz to 100kHz bandwidth at the
reference output. The regulator control loop gains up the
reference noise, so that the noise voltage of the regulator is
approximately given by:
V VrmsRR
RVrms V
V
NOUT
REF
=µ +=µ •29 229
12
(1)
Since the value of VREF is 1.26V, this relationship reduces to:
VVrms
VV
NOUT
=µ•23
(2)
Connecting a capacitor, CNR, from the Noise Reduction (NR)
pin to ground (as shown in Figure 3) forms a low-pass filter
for the voltage reference. For CNR = 10nF, the total noise in
the 10Hz to 100kHz bandwidth is reduced by approximately
a factor of 2.8 for VOUT = 3.3V. This noise reduction effect is
shown in Figure 4, and as
RMS Noise Voltage vs C
NR
in the
Typical Characteristics section.
Noise can be further reduced by carefully choosing an output
capacitor, COUT. Best overall noise performance is achieved
with very low (< 0.22µF) or very high (> 2.2µF) values of COUT
(see the
RMS Noise Voltage vs C
OUT
typical characteristic).
The REG113 uses an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the
DMOS pass element above VIN. The charge-pump switching
noise (nominal switching frequency = 2MHz) is not measur-
able at the output of the regulator over most values of IOUT
and COUT.
DROPOUT VOLTAGE
The REG113 uses an N-channel DMOS as the pass ele-
ment. When (V
IN
– V
OUT
) is less than the dropout voltage
(V
DROP
), the DMOS pass device behaves like a resistor;
therefore, for low values of (V
IN
– V
OUT
), the regulator input-
to-output resistance is the Rds
ON
of the DMOS pass element
(typically 600m
Ω
). For static (DC) loads, the REG113 will
FIGURE 4. Output Noise versus Noise Reduction Capacitor.
0.1 100 1k10 10k
110
100
90
80
70
60
50
40
30
20
Noise Voltage (Vrms)
CNR (pF)
RMS NOISE VOLTAGE vs CNR
REG113-5.0
REG113-3.3
REG113-2.5
COUT = 0µF
10Hz < BW < 100kHz
FIGURE 3. Block Diagram.
Over-Current
Over Temp
Protection
V
REF
(1.26V)
Low-Noise
Charge Pump
DMOS
Output
V
OUT
NR
GND
Enable
REG113
V
IN
C
NR
(optional)
typically maintain regulation down to a (V
IN
– V
OUT
) voltage
drop of 250mV at full rated output current. In Figure 5, the
bottom line (DC dropout) shows the minimum V
IN
to V
OUT
voltage drop required to prevent dropout under DC load
conditions.
FIGURE 5. Transient and DC Dropout.
0 50 100 150 200 250 350300 400
600
500
400
300
200
100
0
Dropout Voltage (mV)
IOUT (mA)
DROPOUT VOLTAGE vs IOUT
Dropout for 0mA to IOUT Transient
DC Dropout
REG113
10 SBVS031D
www.ti.com
POWER DISSIPATION
The REG113 is available in two different package configura-
tions. The ability to remove heat from the die is different for each
package type and, therefore, presents different considerations
in the printed circuit board (PCB) layout. On the MSOP-8
package, leads 5 through 8 are fused to the lead frame and may
be used to improve the thermal performance of the package.
The PCB area around the device that is free of other compo-
nents moves the heat from the device to the ambient air.
Although it is difficult or impossible to quantify all of the
variables in a thermal design of this type, performance data for
several simplified configurations are shown in Figure 6. In all
cases the PCB copper area is bare copper, free of solder resist
mask, and not solder plated. All examples are for 1-ounce
copper and in the case of the MSOP-8, the copper area is
connected to fused leads 5 to 8. See Figure 7 for thermal
resistance for varying areas of copper. Using heavier copper
can increase the effectiveness in removing the heat from the
device. In those examples where there is copper on both sides
of the PCB, no connection has been provided between the two
sides. The addition of plated through holes will improve the heat
sink effectiveness.
For large step changes in load current, the REG113 requires
a larger voltage drop across it to avoid degraded transient
response. The boundary of this transient dropout region is
shown as the top line in Figure 5. Values of VIN to VOUT voltage
drop above this line insure normal transient response.
In the transient dropout region between DC and Transient,
transient response recovery time increases. The time required to
recover from a load transient is a function of both the magnitude
and rate of the step change in load current and the available
headroom V
IN
to V
OUT
voltage drop. Under worst-case condi-
tions (full-scale load change with (V
IN
– V
OUT
) voltage drop close
to DC dropout levels), the REG113 can take several hundred
microseconds to re-enter the specified window of regulation.
TRANSIENT RESPONSE
The REG113 response to transient line and load conditions
improves at lower output voltages. The addition of a capacitor
(nominal value 0.47µF) from the output pin to ground may
improve the transient response. In the adjustable version, the
addition of a capacitor, C
FB
(nominal value 10nF), from the
output to the adjust pin also improves the transient response.
THERMAL PROTECTION
Power dissipated within the REG113 can cause the junction
temperature to rise, however, the REG113 has thermal
shutdown circuitry that protects the regulator from damage.
The thermal protection circuitry disables the output when
the junction temperature reaches approximately 160°C,
allowing the device to cool. When the junction temperature
cools to approximately 140°C, the output circuitry is again
enabled. Depending on various conditions, the thermal
protection circuit can cycle on and off. This limits the
dissipation of the regulator, but can have an undesirable
effect on the load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat sink.
For reliable operation, junction temperature should be limited
to 125°C, maximum. To estimate the margin of safety in a
complete design (including heat sink), increase the ambient
temperature until the thermal protection is triggered. Use
worst-case loads and signal conditions. For good reliability,
thermal protection should trigger more than 35°C above the
maximum expected ambient condition of th e application. This
produces a worst-case junction temperature of 125°C at the
highest expected ambient temperature and worst-case load.
The internal protection circuitry of the REG113 is designed to
protect against overload conditions and is not intended to
replace proper heat sinking. Continuously running the REG113
into thermal shutdown will degrade reliability.
3.0
2.5
2.0
1.5
1.0
0.5
0
Power Dissipation (W)
MAXIMUM POWER DISSIPATION vs TEMPERATURE
–50 –25 0 25 50 75 100 125
Ambient Temperature (°C)
Condition 1
Condition 2
Condition 3
CONDITION PACKAGE PCB AREA
θ
JA
1 MSOP-8 1 sq. in. Cu, 1 Side 71
2 MSOP-8 0.25 sq. in. Cu, 1 Side 90
3 SOT-23-8 None 200
FIGURE 6. Maximum Power Dissipation versus Ambient Tem-
perature for the Various Packages and PCB Heat
Sink Configurations.
REG113 11
SBVS031D www.ti.com
FIGURE 7. Thermal Resistance versus PCB Area for the MSOP-8.
THERMAL RESISTANCE vs PCB COPPER AREA
160
150
140
130
120
110
100
90
80
70
60
Thermal Resistance, JA (°C/W)
θ
012345
Copper Area (inches2)
Power dissipation depends on input voltage, load condi-
tions, and duty cycle and is equal to the product of the
average output current times the voltage across the output
element (VIN to VOUT voltage drop):
PVV I
DIN
OUT OUT
=•(–)
(3)
Power dissipation can be minimized by using the lowest possible
input voltage necessary to assure the required output voltage.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG113EA-2.5/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-2.5/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-2.5/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-2.5/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3.3/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3.3/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-3/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-5/250 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-5/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-5/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA-5/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA33250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113EA332K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
REG113NA-2.5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG113NA-2.5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-2.5/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-2.5/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-2.85/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-2.85/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-2.85/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3.3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3.3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3.3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3.3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-5/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG113NA-5/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG113NA2.85/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
REG113EA-2.5/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-2.5/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-3.3/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-3.3/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-3/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-3/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-5/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113EA-5/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
REG113NA-2.5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-2.5/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-2.85/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-2.85/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-3.3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-3.3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG113NA-5/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
REG113EA-2.5/250 VSSOP DGK 8 250 210.0 185.0 35.0
REG113EA-2.5/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
REG113EA-3.3/250 VSSOP DGK 8 250 210.0 185.0 35.0
REG113EA-3.3/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
REG113EA-3/250 VSSOP DGK 8 250 210.0 185.0 35.0
REG113EA-3/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
REG113EA-5/250 VSSOP DGK 8 250 210.0 185.0 35.0
REG113EA-5/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
REG113NA-2.5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG113NA-2.5/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG113NA-2.85/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG113NA-2.85/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG113NA-3.3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG113NA-3.3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG113NA-3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG113NA-3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG113NA-5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG113NA-5/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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