S-8244 Series
www.ablic.com
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK
(SECONDARY PROTECTION)
© ABLIC Inc., 2003-2018 Rev.7.0_00
1
The S-8244 Series is used for secondary protection of lithium-ion batteries with from one to four cells, and incorporates a
high-precision voltage detector circuit and a delay circuit. Short-circuiting between cells makes it possible for serial
connection of one to four cells.
Features
(1) Internal high-precision voltage detector circuit
• Overcharge detection voltage range: 3.700 V to 4.550 V: Accuracy of ± 25 mV (at +25°C)
(at a 5 mV/step) Accuracy of ± 50 mV (at −40°C to +85°C)
• Hysteresis: 5 types
0.38 ± 0.1 V, 0.25 ± 0.07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V, None
(2) High-withstand voltage: Absolute maximum rating: 26 V
(3) Wide operating voltage range: 3.6 V to 24 V (refers to the range in which the delay circuit can operate
normally after overvoltage is detected)
(4) Delay time during detection: Can be set by an external capacitor.
(5) Low current consumption: At 3.5 V for each cell: 3.0 μA max. (+25°C)
At 2.3 V for each cell: 2.4 μA max. (+25°C)
(6) Output logic and form: 5 types
CMOS output active “H”
CMOS output active “L”
Pch open drain output active “L”
Nch open drain output active “H”
Nch open drain output active “L”
(CMOS / Nch open drain output for 0.045 V hysteresis models)
(7) Lead-free (Sn 100%), halogen-free
Applications
• Lithium ion rechargeable battery packs (secondary protection)
Packages
• SNT-8A
• TMSOP-8
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
2
Block Diagram
VCC
ICT
VC2
VC1
-
+
CO
SENSE
VC3
Control
logic
Overcharge detection
comparator 4
Overcharge detection
comparator 3
Overcharge detection
comparator 2
Overcharge detection
comparator 1
Reference voltage 4
Reference voltage 3
Reference voltage 2
Reference voltage 1
VSS
-
+
-
+
-
+
Overcharge
detection
delay circuit
Remark In the case of Nch open-drain output, only the Nch transistor will be connected to the CO pin.
In the case of Pch open-drain output, only the Pch transistor will be connected to the CO pin.
Figure 1
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
3
Product Name Structure
1. Product Name
S-8244A xx xx - xxx xx U
Environmental code
U: Lead-free (Sn 100%), halogen-free
IC direction of tape specifications
*1
TF: SNT-8A
T2: TMSOP-8
Product code
*2
Package abbreviation
PH: SNT-8A
FM: TMSOP-8
Serial code
Sequentially set from AA to ZZ
*1. Refer to the tape drawing.
*2. Refer to “3. Product Name List”.
2. Packages
Package name Drawing code
Package Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD ⎯
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
4
3. Product Name List
(1) SNT-8A
Table 1
Product name Overcharge detection voltage
[VCU]
Overcharge hysteresis voltage
[VCD] Output logic and form
S-8244AAAPH-CEATFU 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABPH-CEBTFU 4.200 ± 0.025 V 0 V Nch open drain output active “H”
S-8244AADPH-CEDTFU 4.200 ± 0.025 V 0 V Pch open drain output active “L”
S-8244AAFPH-CEFTFU 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGPH-CEGTFU 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJPH-CEJTFU 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AASPH-CESTFU 4.350 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AATPH-CETTFU 4.200
± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAVPH-CEVTFU 4.275 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAYPH-CEYTFU 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAZPH-CEZTFU 4.280 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABBPH-CFBTFU 4.380 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABDPH-CFDTFU 4.150 ± 0.025 V 0.045 ± 0.02 V CMOS output active “L”
S-8244ABEPH-CFETFU 4.215 ± 0.025 V 0 V Nch open drain output active “L”
S-8244ABHPH-CFHTFU 4.280 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244ABMPH-CFMTFU 4.100
± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABOPH-CFOTFU 4.550 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
Remark Please contact our sales office for the products with the detection voltage value other than those specified above.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
5
(2) TMSOP-8
Table 2
Product name Overcharge detection voltage
[VCU]
Overcharge hysteresis voltage
[VCD] Output logic and form
S-8244AAAFM-CEAT2U 4.450 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AABFM-CEBT2U 4.200 ± 0.025 V 0 V Nch open drain output active “H”
S-8244AACFM-CECT2U 4.115 ± 0.025 V 0.13 ± 0.04 V CMOS output active “H”
S-8244AAFFM-CEFT2U 4.350 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAGFM-CEGT2U 4.450 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAHFM-CEHT2U 4.300 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAIFM-CEIT2U 4.400 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAJFM-CEJT2U 4.500 ± 0.025 V 0.38 ± 0.1 V CMOS output active “H”
S-8244AALFM-CELT2U 4.350 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AANFM-CENT2U 4.150 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAOFM-CEOT2U 4.250 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAPFM-CEPT2U 4.050 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAQFM-CEQT2U 4.150 ± 0.025 V 0 V Nch open drain output active “H”
S-8244AATFM-CETT2U 4.200 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAUFM-CEUT2U 3.825 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244AAVFM-CEVT2U 4.275 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244AAXFM-CEXT2U 4.025 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABAFM-CFAT2U 4.220 ± 0.025 V 0.045 ± 0.02 V CMOS output active “H”
S-8244ABCFM-CFCT2U 3.750 ± 0.025 V 0.25 ± 0.07 V CMOS output active “H”
S-8244ABGFM-CFGT2U 4.225 ± 0.025 V 0.045 ± 0.02 V Nch open drain output active “L”
S-8244ABIFM-CFIT2U 4.100 ± 0.025 V 0 V Nch open drain output active “L”
S-8244ABJFM-CFJT2U 4.325 ± 0.025 V 0.045 ± 0.02 V Nch open drain output active “L”
S-8244ABKFM-CFKT2U 4.175 ± 0.025 V 0 V Nch open drain output active “L”
S-8244ABNFM-CFNT2U 4.225 ± 0.025 V 0.38 ± 0.1 V Nch open drain output active “L”
S-8244ABPFM-CFPT2U 4.350 ± 0.025 V 0.38 ± 0.1 V Nch open drain output active “L”
Remark Please contact our sales office for the products with the detection voltage value other than those specified above.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
6
Pin Configurations
Table 3
SNT-8A
Top view
1
2
3
4
CO
ICT
VSS
VC3
6
8
7
5
VCC
SENSE
VC1
VC2
Pin No. Symbol Description
1 CO FET gate connection pin for charge control
2 ICT
Capacitor connection pin for overcharge detection
delay
3 VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
4 VC3
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
5 VC2
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
6 VC1
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
7 SENSE Connection pin for battery 1’s positive voltage
Figure 2 8 VCC Input pin for positive power supply
Table 4
3
2
4
1 8
6
7
5
CO
ICT
VSS
VC3
VCC
SENSE
VC2
VC1
TMSOP-8
Top view
Pin No. Symbol Description
1 VCC Input pin for positive power supply
2 SENSE Connection pin for battery 1’s positive voltage
3 VC1
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
4 VC2
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
5 VC3
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
6 VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
7 ICT
Capacitor connection pin for overcharge detection
delay
Figure 3 8 CO FET gate connection pin for charge control
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
7
Absolute Maximum Ratings
Table 5
(Ta = 25°C unless otherwise specified)
Item Symbol Applied pin Absolute maximum rating Unit
Input voltage between VCC and VSS VDS VCC VSS−0.3 to VSS +26 V
Delay capacitor connection pin voltage VICT ICT VSS −0.3 to VCC +0.3 V
Input pin voltage VIN SENSE, VC1,
VC2, VC3 VSS −0.3 to VCC +0.3 V
CO output pin
voltage
(CMOS output)
VCO CO
VSS −0.3 to VCC +0.3 V
(Nch open drain output) VSS −0.3 to 26 V
(Pch open drain output) VCC −26 to VCC +0.3 V
Power
dissipation
SNT-8A PD
⎯
450*1 mW
TMSOP-8 650*1 mW
Operating ambient temperature To
pr
⎯
−40 to +85 °C
Storage temperature Tst
g
⎯
−40 to +125 °C
*1. When mounted on board
[Mounted board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Name : JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
0 50 100 150
Ambient Temperature (Ta) [°C]
700
600
500
400
300
200
100
0
Power Dissipation (P
D
) [mW]
TMSOP-8
SNT-8A
Figure 4 Power Dissipation of Package (When Mounted on Board)
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
8
Electrical Characteristics
Table 6
(Ta = 25 °C unless otherwise specified)
Item
Symbol
Condition Min. Typ. Max. Unit
Test
condition Test circuit
DETECTION VOLTAGE
Overcharge detection voltage 1 *1
V
CU1
3.7 V to 4.55 V Adjustment V
CU1
−
0.025 V
CU1
V
CU1
+
0.025 V 1 1
Overcharge detection voltage 2 *1
V
CU2
3.7 V to 4.55 V Adjustment V
CU2
−
0.025 V
CU2
V
CU2
+
0.025 V 2 1
Overcharge detection voltage 3 *1
V
CU3
3.7 V to 4.55 V Adjustment V
CU3
−
0.025 V
CU3
V
CU3
+
0.025 V 3 1
Overcharge detection voltage 4 *1
V
CU4
3.7 V to 4.55 V Adjustment V
CU4
−
0.025 V
CU4
V
CU4
+
0.025 V 4 1
Overcharge hysteresis voltage 1 *2
V
CD1
⎯
0.28 0.38 0.48 V 1 1
Overcharge hysteresis voltage 2 *2
V
CD2
⎯
0.28 0.38 0.48 V 2 1
Overcharge hysteresis voltage 3 *2
V
CD3
⎯
0.28 0.38 0.48 V 3 1
Overcharge hysteresis voltage 4 *2
V
CD4
⎯
0.28 0.38 0.48 V 4 1
Detection voltage
temperature coefficient *3
T
COE
Ta =
−
40
°
C to
+
85
°
C
*4
−
0.4 0.0
+
0.4 mV/
°
C
⎯
⎯
DELAY TIME
Overcharge detection delay time
t
CU
C = 0.1
μ
F 1.0 1.5 2.0 s 5 2
OPERATING VOLTAGE
Operating voltage
between VCC and VSS *5
V
DSOP
⎯
3.6
⎯
24 V
⎯
⎯
CURRENT CONSUMPTION
Current consumption
during normal operation
I
OPE
V1 = V2 = V3 = V4 = 3.5 V
⎯
1.5 3.0
μ
A 6 3
Current consumption at
power down
I
PDN
V1 = V2 = V3 = V4 = 2.3 V
⎯
1.2 2.4
μ
A 6 3
VC1 sink current
I
VC1
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
VC2 sink current
I
VC2
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
VC3 sink current
I
VC3
V1 = V2 = V3 = V4 = 3.5 V
−
0.3
⎯
0.3
μ
A 6 3
OUTPUT VOLTAGE*6
CO “H” voltage
V
CO(H)
at I
OUT
= 10
μ
A V
CC
−
0.05
⎯
⎯
V 7 4
CO “L” voltage
V
CO(L)
at I
OUT
= 10
μ
A
⎯
⎯
V
SS
+
0.05 V 7 4
*1. ± 50 mV when Ta = −40°C to +85°C.
*2. 0.25 ± 0.07 V, 0.13 ± 0.04 V, 0.045 ± 0.02 V except for 0.38 V hysteresis models.
*3. Overcharge detection voltage or overcharge hysteresis voltage.
*4. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed
by design, not tested in production.
*5. After detecting the overcharge, the delay circuit operates normally in the range of operating voltage.
*6. Output logic and CMOS or open drain output can be selected.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
9
Test Circuits
(1) Test Condition 1, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 1 (VCU1) is a voltage at V1; when the CO pin’s voltage is set to “H” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO = “L”,
and the difference of this V1’s voltage and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 1 (VCU1) is a voltage at V1; when the CO pin’s voltage is set to “L” by increasing
V1 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V1’s voltage to set CO =
“H”, and the difference of this V1’s voltage and VCU1 is the overcharge hysteresis voltage 1 (VCD1).
(2) Test Condition 2, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 2 (VCU2) is a voltage at V2; when the CO pin’s voltage is set to “H” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V2’s voltage to set CO = “L”,
and the difference of this V2’s voltage and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 2 (VCU2) is a voltage at V2; when the CO pin’s voltage is set to “L” by increasing
V2 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V2’s voltage to set CO =
“H”, and the difference of this V2’s voltage and VCU2 is the overcharge hysteresis voltage 2 (VCD2).
(3) Test Condition 3, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 3 (VCU3) is a voltage at V3; when the CO pin’s voltage is set to “H” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V3’s voltage to set CO = “L”,
and the difference of this V3’s voltage and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 3 (VCU3) is a voltage at V3; when the CO pin’s voltage is set to “L” by increasing
V3 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V3’s voltage to set CO =
“H”, and the difference of this V3’s voltage and VCU3 is the overcharge hysteresis voltage 3 (VCD3).
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
10
(4) Test Condition 4, Test Circuit 1
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS output active “H”, Nch open drain output active “H”
The overcharge detection voltage 4 (VCU4) is a voltage at V4; when the CO pin’s voltage is set to “H” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO = “L”,
and the difference of this V4’s voltage and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
The overcharge detection voltage 4 (VCU4) is a voltage at V4; when the CO pin’s voltage is set to “L” by increasing
V4 gradually, after setting V1 = V2 = V3 = V4 = 3.5 V. After that, gradually decreasing V4’s voltage to set CO =
“H”, and the difference of this V4’s voltage and VCU4 is the overcharge hysteresis voltage 4 (VCD4).
(5) Test Condition 5, Test Circuit 2
Set switches 1 and 2 to OFF for CMOS output product.
Set switch 1 to ON and switch 2 to OFF for Nch open drain product.
Set switch 1 to OFF and switch 2 to ON for Pch open drain product.
• Product with CMOS output active “H”, Nch open drain output active “H”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “H” is the overcharge detection delay time (tCU).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
Rise V1 to 4.7 V momentarily within 10 μs after setting V1 = V2 = V3 = V4 = 3.5 V. The period from V1 having
reached 4.7 V to CO = “L” is the overcharge detection delay time (tCU).
(6) Test Condition 6, Test Circuit 3
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 2.3 V. This I1 is current consumption at power-down
(IPDN).
Measure current consumption (I1) setting V1 = V2 = V3 = V4 = 3.5 V. This I1 is current consumption during normal
operation (IOPE), I2 is the VC1 sink current (IVC1), I3 is the VC2 sink current (IVC2), I4 is the VC3 sink current (IVC3).
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
11
(7) Test Condition 7, Test Circuit 4
Measure setting switch 1 to OFF and switch 2 to ON.
• Product with CMOS output active “H”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with CMOS output active “L”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with Pch open drain output active “L”
Decrease V6 from VCC gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = −10
μA is the VCO(H) voltage.
• Product with Nch open drain output active “H”
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 3.5 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
• Product with Nch open drain output active “L”
Increase V6 from 0 V gradually after setting V1 = V2 = V3 = V4 = 4.6 V, the V6’s voltage when flowing I2 = 10 μA
is the VCO(L) voltage.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
12
10 MΩ
10 MΩ
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
V
10 MΩ
10 MΩ
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
0.1
μ
F
V
Test Circuit 1
Test Circuit 2
V1
V2
V3
V4
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3
I1 I2
I3 I4
V5
V1
V2
V3
V4
SW2
SW1
S-8244
VCC
SENSE
VC1
VC2
CO
ICT
VSS
VC3 V6
I2
I1
V
Test Circuit 3
Test Circuit 4
Figure 5
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
13
Operation
Remark Refer to “ Battery Protection IC Connection Example”.
1. Overcharge Detection
• Product with CMOS output active “H”, Nch open drain output active “H”
During charging in the normal status, the voltage of one of the batteries exceeds overcharge detection voltage
(VCU), and this status is maintained for overcharge detection delay time (tCU) or longer, CO gets “H”. This is
overcharge status. Connecting a FET to the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until the voltage of each of the batteries decreases, to the
overcharge hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
• Product with CMOS output active “L”, Nch open drain output active “L”, Pch open drain output active “L”
During charging in the normal status, the voltage of one of the batteries exceeds overcharge detection voltage
(VCU), and this status is maintained for overcharge detection delay time (tCU) or longer, CO gets “L”. This is
overcharge status. Connecting a FET to the CO pin enables charge-control and the second protect.
In this case, the IC maintains the overcharge status until the voltage of each of the batteries decreases, to the
overcharge hysteresis voltage (VCD) from the overcharge detection voltage (VCU).
2. Delay Circuit
The delay circuit rapidly charges the capacitor connected to the delay capacitor connection pin up to a specified
voltage when the voltage of one of the batteries exceeds the overcharge detection voltage (VCU). Then, the delay
circuit gradually discharges the capacitor at 100 nA and inverts the CO output when the voltage at the delay
capacitor connection pin goes below a specified level. Overcharge detection delay time (tCU) varies depending
upon the external capacitor.
Each delay time is calculated using the following equation.
Min. Typ. Max.
tCU[s] = Delay Coefficient (10, 15, 20) × CICT [μF]
Because the delay capacitor is rapidly charged, the smaller the capacitance, the larger the difference between the
maximum voltage and the specified value of delay capacitor pin (ICT pin). This will cause a deviation between the
calculated delay time and the resultant delay time. Also, delay time is internally set in this IC to prevent the CO
output from inverting until the charge to delay capacitor pin is reached to the specified voltage. If large
capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay
time.
Please note that the maximum capacitance connected to the delay capacitor pin (ICT pin) is 1 μF.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
14
Timing Chart
VCU
Battery voltage
VSS
CO pin voltage
VCC
CO pin voltage
VSS
Delay
VSS
ICT pin voltage
VCC
CMOS output active “H” and
Nch open drain output active “H” products
CMOS output active “L” ,
Pch open drain output active “L” and
Nch open drain output active “L” products
VCD V1 battery V2 battery V3 battery V4 battery
VSS
Figure 6
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
15
Battery Protection IC Connection Example
(1) Connection Example 1
SCP
EB−
CVCC
CICT
C1
C2
C3
C4
EB+
R1
R2
R3
R4
BAT1
BAT2
BAT3
BAT4
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 7
Table 7 Constants for External Components 1
Symbol Min. Typ. Max. Unit
R1 to R4 0 1 k 10 k Ω
C1 to C4 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform thorough evaluation using the actual application to set
the constant.
[For SCP, contact]
Global Sales & Marketing Division, Dexerials Corporation
Gate City Osaki East Tower 8F, 1-11-2
Osaki, Shinagawa-ku, Tokyo, 141-0032, Japan
TEL +81-3-5435-3946
Contact Us: http://www.dexerials.jp/en/
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
16
(2) Connection Example 2 (for 3-cells)
SCP
EB−
CVCC
CICT
C1
C2
C3
EB+
R1
R2
R3
BAT1
BAT2
BAT3
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 8
Table 8 Constants for External Components 2
Symbol Min. Typ. Max. Unit
R1 to R3 0 1 k 10 k Ω
C1 to C3 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform thorough evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
17
(3) Connection Example 3 (for 2-cells)
SCP
EB−
CVCC
CICT
C1
C2
EB+
R1
R2
BAT1
BAT2
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
Figure 9
Table 9 Constants for External Components 3
Symbol Min. Typ. Max. Unit
R1, R2 0 1 k 10 k Ω
C1, C2 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform thorough evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
18
(4) Connection Example 4 (for 1-cell)
EB−
CVCC
CICT
C1
EB+
R1
BAT1
RVCC
FET
SENSE
VC1
VC2
VC3
VSS
VCC
ICT
CO
SCP
Figure 10
Table 10 Constants for External Components 4
Symbol Min. Typ. Max. Unit
R1 0 1 k 10 k Ω
C1 0 0.1 1 μF
RVCC 0 100 1 k Ω
CVCC 0 0.1 1 μF
CICT 0 0.1 1 μF
Caution1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do
not guarantee proper operation. Perform thorough evaluation using the actual application to set
the constant.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
Rev.7.0_00 S-8244 Series
19
Precautions
• This IC charges the delay capacitor through the delay capacitor pin (ICT pin) immediately when the voltage of one of
batteries V1 to V4 reaches the overcharge voltage. Therefore, setting the resistor connected to the VCC pin to any
value greater than the recommended level causes a reduction in the IC power supply voltage because of charge
current of the delay capacitor. This may lead to a malfunction. Set up the resistor NOT to exceed the typical value.
If you change the resistance, please consult us.
• DO not connect any of overcharged batteries. Even if only one overcharged battery is connected to this IC, the IC
detects overcharge, then charge current flows to the delay capacitor through the parasitic diode between pins where
the battery is not connected yet. This may lead to a malfunction. Please perform sufficient evaluation in the case of
use. Depending on an application circuit, even when the fault charge battery is not contained, the connection turn of
a battery may be restricted in order to prevent the output of CO detection pulse at the time of battery connection.
VCU
Battery voltage
Setting voltage
VCC
CO pin voltage
VSS
VSS
ICT pin voltage
CMOS output active “H” and Nch open drain output active “H” products
VCD V1 battery V2 battery V3 battery V4 battery
Internal delay
Delay
CICT low
CICT high
CICT low
CICT high
VSS
• In this IC, the output logic of the CO pin is inverted after several milliseconds of internal delay if this IC is under the
overcharge condition even ICT pin is either “VSS−short circuit,” “VDD−short circuit” or “Open” status.
• Any position from V1 to V4 can be used when applying this IC for a one to three-cell battery. However, be sure to
short circuit between pins not in use (SENSE−VC1, VC1−VC2, VC2−VC3, or VC3−VSS).
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement of the
products including this IC upon patents owned by a third party.
BATTERY PROTECTION IC FOR 1-SERIAL TO 4-SERIAL-CELL PACK (SECONDARY PROTECTION)
S-8244 Series Rev.7.0_00
20
Characteristics (Typical Data)
1. Detection Voltage vs. Temperature
Overcharge Detection Voltage vs. Temperature Overcharge Release Voltage vs. Temperature
4.35
4.45
4.55
−40 −20 0 20 40 60 80 100
Ta [°C]
VCU [V]
S-8244AAAFN VCU = 4.45 V
3.97
4.07
4.17
−40 −20 0 20 40 60 80 100
Ta [°C]
VCU−VCD [V]
S-8244AAAFN VCD = 0.38 V
2. Current Consumption vs. Temperature
Current Consumption during Normal Operation vs. Temperature Current Consumption at Power Down vs. Temperature
IOPE [μA]
0
1
2
3
−40 −20 0 20 40 60 80 100
S-8244AAAFN VCC = 14.0 V
Ta [°C]
0
1
2
3
−40 −20 0 20 40 60 80 100
IPDN [μA]
S-8244AAAFN VCC = 9.2 V
Ta [°C]
3. Delay Time vs. Temperature
Overcharge Detection Delay Time vs. Temperature
0
1
2
3
−40 −20 0 20 40 60 80 100
tCU [s]
S-8244AAAFN VCC = 15.2 V
Ta [°C]
Caution Please design all applications of the S-8244 Series with safety in mind.
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
1.97±0.03
0.2±0.05
0.48±0.02
0.08
mm
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.1
No. PH008-A-P-SD-2.1
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PH008-A-C-SD-2.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-2.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
mm
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
SNT-8A-A
-Land Recommendation
PH008-A-L-SD-4.1
0.3
0.2
0.52
2.01
0.52
No. PH008-A-L-SD-4.1
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.96 mm ~ 2.06 mm)
1.
2. 0.03 mm
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
1
2
1.
2. (1.96 mm ~ 2.06 mm)
(0.25 mm min. / 0.30 mm typ.)
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
2.90±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
TMSOP8-A-PKG Dimensions
No. FM008-A-P-SD-1.2
FM008-A-P-SD-1.2
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
0.30±0.05
1.00±0.1
1.05±0.05
1.5
2.00±0.05
4.00±0.1
3.25±0.05
4.00±0.1
1
4
58
TMSOP8-A-Carrier Tape
Feed direction
No. FM008-A-C-SD-2.0
FM008-A-C-SD-2.0
+0.1
-0
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
16.5max.
13.0±0.3
QTY. 4,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
FM008-A-R-SD-1.0
mm
Disclaimers (Handling Precautions)
1. All the information described herein
(product data,
specifications,
figures,
tables,
programs,
algorithms and application
circuit examples,
etc.)
is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.2-2018.06
www.ablic.com
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
ABLIC:
S-8244AAAFN-CEAT2G S-8244AAFFN-CEFT2G S-8244AABFN-CEBT2G S-8244AAHFN-CEHT2G S-8244AAIFN-
CEIT2G S-8244AAJFN-CEJT2G S-8244AADFN-CEDT2G S-8244AACFN-CECT2G S-8244AAGFN-CEGT2G S-
8244AAEFN-CEET2G S-8244AASPH-CESTFG S-8244AAZPH-CEZTFG S-8244ABBPH-CFBTFG S-8244ABDPH-
CFDTFG S-8244ABEPH-CFETFG S-8244ABGFN-CFGT2S S-8244ABHPH-CFHTFG S-8244ABIFN-CFIT2S S-
8244ABJFN-CFJT2S S-8244ABKFN-CFKT2S S-8244AAAPH-CEATFG S-8244AABPH-CEBTFG S-8244AAFPH-
CEFTFG S-8244AAGPH-CEGTFG S-8244AAKFN-CEKT2G S-8244AALFN-CELT2G S-8244AAMFN-CEMT2G S-
8244AANFN-CENT2G S-8244AAOFN-CEOT2G S-8244AAPFN-CEPT2G S-8244AAQFN-CEQT2G S-8244AARFN-
CERT2G S-8244AATFN-CETT2G S-8244AAUFN-CEUT2G S-8244AAWFN-CEWT2G S-8244AAXFN-CEXT2G S-
8244ABAFN-CFAT2G S-8244AAAFN-CEAT2U S-8244AAMFN-CEMT2U S-8244AAIFN-CEIT2U S-8244ABAFN-
CFAT2U S-8244AADFN-CEDT2U S-8244AAPFN-CEPT2U S-8244AAGFN-CEGT2U S-8244AATFN-CETT2U S-
8244AAJFN-CEJT2U S-8244AAWFN-CEWT2U S-8244AACFN-CECT2U S-8244AAOFN-CEOT2U S-8244AAXFN-
CEXT2U S-8244AAFFN-CEFT2U S-8244AALFN-CELT2U S-8244AAUFN-CEUT2U S-8244AANFN-CENT2U S-
8244AARFN-CERT2U S-8244AAKFN-CEKT2U S-8244AABFN-CEBT2U S-8244AAEFN-CEET2U S-8244AAQFN-
CEQT2U S-8244AAHFN-CEHT2U S-8244AAJFM-CEJT2U S-8244AAUFN-CEUT2S
Seiko Instruments:
S-8244AADPH-CEDTFG S-8244AAJPH-CEJTFG S-8244AAVPH-CEVTFG S-8244AAYPH-CEYTFG
