12.7 GHz to 15.4 GHz, Low Noise Amplifier
Data Sheet
ADL5724
Rev. 0 Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Frequency range: 12.7 GHz to 15.4 GHz
Typical gain of >23.7 dB
Low noise input
Noise figure
2.1 dB typical at 12.7 GHz
2.4 dB typical at 15.4 GHz
High linearity input
≥2.0 dBm typical input third-order intercept (IIP3)
−8 dBm input 1 dB compression point (P1dB) at 15.4 GHz
Matched 50 Ω single-ended input
Matched 100 Ω differential outputs
8-lead, 2.00 mm × 2.00 mm LFCSP microwave packaging
APPLICATIONS
Point to point microwave radios
Instrumentation
Satellite communications (SATCOM)
Phased arrays
FUNCTIONAL BLOCK DIAGRAM
14317-001
50Ω
SINGLE-ENDED 100Ω
DIFFERENTIAL
GND
INPT
RBIAS
VCC1
OUTN
OUTP
DNC
VCC2
ADL5724
DNC = DO NOT CONNECT.
DO NO T CO NNE CT TO THIS PIN.
Figure 1.
GENERAL DESCRIPTION
The ADL5724 is a narrow-band, high performance, low noise
amplifier (LNA) targeting microwave radio link receiver designs.
The monolithic silicon germanium (SiGe) design is optimized for
microwave radio link bands ranging from 12.7 GHz to 15.4 GHz.
The unique design offers a single-ended 50 Ω input impedance
and provides a 100 Ω balanced differential output that is ideal
for driving Analog Devices, Inc., differential downconverters
and radio frequency (RF) sampling analog-to-digital converters
(ADCs). This LNA provides noise figure performance that, in
the past, required more expensive three-five (III-V) compounds
process technology to achieve.
The ADL5721 and ADL5723 to ADL5726 family of narrow-
band LNAs are each packaged in a tiny, thermally enhanced,
2.00 mm × 2.00 mm LFCSP package. The ADL5721 and
ADL5723 to ADL5726 family operates over the temperature
range of −40°C to +85°C.
ADL5724 Data Sheet
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
AC Specifications .......................................................................... 3
DC Specifications ......................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................8
Applications Information .................................................................9
Layout .............................................................................................9
Differential vs. Single-Ended Output .........................................9
Evaluation Board ............................................................................ 10
Initial Setup ................................................................................. 10
Results .......................................................................................... 10
Basic Connections for Operation ............................................. 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
4/16—Revision 0: Initial Version
Data Sheet ADL5724
Rev. 0 | Page 3 of 12
SPECIFICATIONS
AC SPECIFICATIONS
VCC1 = 1.8 V, VCC2 = 3.3 V, RBIAS = 442 Ω, TA = 25°C, ZSOURCE = 50 Ω, ZLOAD = 100 Ω differential, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
FREQUENCY RANGE 12.7 15.4 GHz
FREQUENCY = 12.7 GHz
Gain (S21) 26.4 dB
Noise Figure 2.1 dB
Input Third-Order Intercept (IIP3) Δf = 1 MHz, input power (PIN) = −30 dBm per tone 2.0 dBm
Input 1 dB Compression Point (P1dB) −11 dBm
Input Return Loss (S11) 10 dB
Output Return Loss (S22) 10 dB
FREQUENCY = 15.4 GHz
Gain (S21) 23.7 dB
Noise Figure 2.4 dB
Input Third-Order Intercept (IIP3) Δf = 1 MHz, PIN = −30 dBm per tone 4.0 dBm
Input 1 dB Compression Point (P1dB) −8 dBm
Input Return Loss (S11)
7
dB
Output Return Loss (S22) 10 dB
DC SPECIFICATIONS
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
POWER INTERFACE
Voltage
VCC1 1.65 1.8 1.95 V
VCC2 3.1 3.3 3.5 V
Quiescent Current vs. Temperature
VCC1 TA = 25°C 19.4 mA
−40°C ≤ T
A
≤ +85°C
19.4
mA
VCC2 TA = 25°C 90.0 mA
−40°C ≤ TA ≤ +85°C 90.3 mA
ADL5724 Data Sheet
Rev. 0 | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltages
VCC1 2.25 V
VCC2 4.1 V
Maximum Junction Temperature 150°C/W
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −55°C to +125°C
Lead Temperature Range (Soldering, 60 sec) −65°C to +150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is thermal resistance, junction to ambient (°C/W), θJB is
thermal resistance, junction to board (°C/W), and θJC is thermal
resistance, junction to case (°C/W).
Table 4. Thermal Resistance
Package Type
θ
JA1
θ
JB1
θ
JC1
Unit
8-Lead LFCSP 39.90 23.88 3.71 °C/W
1 See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance for a printed circuit board (PCB) with 3 × 4 vias.
ESD CAUTION
Data Sheet ADL5724
Rev. 0 | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
INPT
RBIAS
VCC1
OUTN
OUTP
DNC
VCC2
3
4
1
2
6
5
8
7
ADL5724
TOP VIEW
(Not to Scal e)
14317-002
NOTES
1. DNC = DO NO T CO NNE CT. DO NOT
CONNECT TO THIS PIN.
2. THE EXPOSED PAD MUST BE
SOLDERED TO A LOW IMPE DANCE
GRO UND P LANE.
3. T HE DE V ICE NUM BE R ON T HE FIGURE
DOES NOT INDICATE THE L ABEL ON
THE PACKAGE. RE FER TO THE PIN 1
INDI CATOR FOR THE PIN LOCATIONS.
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 VCC1 1.8 V Power Supply. It is recommended to place the decoupling capacitors as close to this pin as possible.
2 GND Ground.
3 INPT RF Input. This is a 50 Ω single-ended input.
4 RBIAS Resistor Bias. For typical operation, connect a 442 Ω resistor from RBIAS to GND. It is recommended to
place the RBIAS resistor as close to the pin as possible.
5 DNC Do Not Connect. Do not connect to this pin.
6, 7 OUTP, OUTN RF Outputs. These pins are 100 Ω differential outputs.
8 VCC2 3.3 V Power Supply. It is recommended to place the decoupling capacitors as close to this pin as possible.
EPAD (EP) Exposed Pad. The exposed pad must be soldered to a low impedance ground plane.
ADL5724 Data Sheet
Rev. 0 | Page 6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
35
30
25
20
15
10
5
0
GAIN (d B)
12.7 15.4
FRE Q UE NCY ( GHz)
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-003
T
A
= –40° C
T
A
= +25°C
T
A
= +85°C
Figure 3. Gain vs. Frequency for Various Temperatures
35
30
25
20
15
10
5
0
GAI N (dB)
12.7 15.4
FRE Q UE NCY ( GHz)
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-004
3.1V/1.65V
3.3V/1.8V
3.5V/1.95V
Figure 4. Gain vs. Frequency for Various Supply Voltages
10
9
8
7
6
5
4
3
2
1
0
NOISE FIGURE (dB)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-005
T
A
= –40° C
T
A
= +25°C
T
A
= +85°C
Figure 5. Nosie Figure vs. Frequency for Various Temperatures
10
9
8
7
6
5
4
3
2
1
0
NOSIE FIGURE (dB)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-006
3.1V/1.65V
3.3V/1.8V
3.5V/1.95V
Figure 6. Noise Figure vs. Frequency for Various Supply Voltages
0
–40
INPUT P1dB (dBm)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
–35
–30
–25
–20
–15
–10
–5
14317-007
TA = –40°C
TA = +25°C
TA = +85°C
Figure 7. Input P1dB vs. Frequency for Various Temperatures
0
–40
INPUT P1dB (dBm)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
–35
–30
–25
–20
–15
–10
–5
14317-008
3.1V/1.65V
3.3V/1.8V
3.5V/1.95V
Figure 8. Input P1dB vs. Frequency for Various Supply Voltages
Data Sheet ADL5724
Rev. 0 | Page 7 of 12
INPUT I P 3 ( dBm)
20
–30
–25
–20
–15
–10
–5
0
5
10
15
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-009
TA = –40°C
TA = +25°C
TA = +85°C
Figure 9. Input IP3 vs. Frequency for Various Temperatures
INP UT IP 3 ( dBm)
20
–30
–25
–20
–15
–10
–5
0
5
10
15
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
14317-010
3.1V/1.65V
3.3V/1.8V
3.5V/1.95V
Figure 10. Input IP3 vs. Frequency for Various Supply Voltages
0
–30
INP UT RET URN LO S S ( dB)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
–25
–20
–15
–10
–5
14317-011
T
A
= –40° C
T
A
= +25°C
T
A
= +85°C
Figure 11. Input Return Loss vs. Frequency for Various Temperatures
0
–30
OUTPUT RE TURN L OSS ( dB)
FRE Q UE NCY ( GHz)
12.7 15.4
13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1
–25
–20
–15
–10
–5
14317-012
T
A
= –40° C
T
A
= +25°C
T
A
= +85°C
Figure 12. Output Return Loss vs. Frequency for Various Temperatures
ADL5724 Data Sheet
Rev. 0 | Page 8 of 12
THEORY OF OPERATION
The ADL5724 is a narrow-band, high performance, low noise
amplifier targeting microwave radio link receiver designs. The
monolithic SiGe design is optimized for microwave radio link
bands ranging from 12.7 GHz to 15.4 GHz.
The unique design of the ADL5724 offers a single-ended 50 Ω
input impedance via the INPT pin, and provides a 100 Ω
balanced differential output via the OUTP and OUTN pins.
This LNA is ideal for driving Analog Devices differential
downconverters and RF sampling ADCs.
The ADL5724 provides cost-effective noise figure performance
without requiring more expensive III-V compounds process
technology.
The ADL5724 is available in a 2.00 mm × 2.00 mm LFCSP package,
and operates over the temperature range of −40°C to +85°C.
Data Sheet ADL5724
Rev. 0 | Page 9 of 12
APPLICATIONS INFORMATION
LAYOUT
Solder the exposed pad on the underside of the ADL5724 to a
low thermal and electrical impedance ground plane. This pad is
typically soldered to an exposed opening in the solder mask on
the evaluation board. Connect the ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package.
14317-016
Figure 13. Evaluation Board Layout for the ADL5724 Package
DIFFERENTIAL vs. SINGLE-ENDED OUTPUT
This section provides the test results that compare the ADL5724
using a differential vs. a single-ended output. When using the
device as a single-ended output, use the RFOP output on the
evaluation board and terminate RFON to 50 Ω. Note that the
converse can be done as well; however, doing so produces
slightly different results from the plots shown in this section
because there is some amplitude imbalance between the two
differential ports, RFOP and RFON. The output trace and
connector loss were not deembedded for these measurements.
0
5
10
15
20
25
35
30
12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4
GAIN (dB)
FREQUENCY (GHz)
14317-017
Figure 14. Gain vs. Frequency
0
1
2
3
4
5
6
7
8
9
10
12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4
NOSIE FIGURE (dB)
FREQUENCY (GHz)
14317-018
Figure 15. Noise Figure vs. Frequency
–30
–10
–5
–20
–15
–25
0
5
10
15
20
12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4
INPUT IP3 (dBm)
FREQUENCY (GHz)
14317-021
Figure 16. Input IP3 vs. Frequency
–40
–35
–30
–25
–20
–15
–10
–5
0
12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4
INPUT P1dB (dBm)
FREQUENCY (GHz)
14317-020
Figure 17. Input P1dB vs. Frequency
ADL5724 Data Sheet
Rev. 0 | Page 10 of 12
EVALUATION BOARD
The ADL5724-EVALZ comes with an ADL5724 chip. It supports
a single 5 V supply for ease of use. Note that, for 5 V operation,
the 3.3 V and 1.8 V test loops are for evaluation purposes only.
When using a 3.3 V or 1.8 V supply, remove the R1 and R2
resistors from the evaluation board. Figure 19 shows the
ADL5724-EVALZ lab bench setup.
INITIAL SETUP
To set up t he ADL5724-EVALZ, take the following steps:
1. Power up the ADL5724-EVALZ with a 5 V dc supply. The
supply current of the evaluation board is approximately
114 mA, which is a combination of the VCC1 (1.8 V) and
the VCC2 (3.3 V) currents.
2. Connect the signal generator to the input of theADL5724-
EVALZ.
3. Connect RFOP and RFON to a 180° hybrid that works
within the 12.7 GHz to 15.4 GHz frequency range.
4. Connect the difference output of the hybrid to the
spectrum analyzer. The sum port of the hybrid must be
terminated to 50 Ω.
See Figure 19 for the ADL5724-EVALZ lab bench setup.
RESULTS
Figure 18 shows the expected results when testing the
ADL5724-EVALZ using the Rev. A version of the evaluation
board and its software. Note that future iterations of the software
may produce different results. See the ADL5724 product page
for the most recent software version.
Figure 18 shows the results of differential output for an input of
12.7 GHz at −15 dBm. The hybrid and board loss were not
deembedded.
POWER OUTPUT (dBm)
20
10
0
–10
–20
–30
–40
–50
–60
–70
–80
1
14317-013
12.65 12.6712.66 12.68 12.69 12.71 12.7312.70 12.72 12.74 12.75
FREQUENCY (GHz)
RESOLUTION BANDWIDTH = 20kHz
VIDEO BANDWIDTH = 20kHz
SWEEP = 301ms (1001pts)
Figure 18. Test Results at 12.7 GHz
+5V DC GND
INPUT
RF FREQUENCY GENERATOR
RFON
14317-014
RFOP
180° HYBRID FOR DIFFERENTIAL
TO SINGLE ENDED OUTPUT
SPECTRUM
ANALYZER
Figure 19. ADL5724-EVALZ Lab Bench Setup
Data Sheet ADL5724
Rev. 0 | Page 11 of 12
BASIC CONNECTIONS FOR OPERATION
Figure 20 shows the basic connections for operating the ADL5724 as it is implemented on the evaluation board of the device.
DNI
U2U1
RFIN
RBIAS
R4
R2R1
P1
GND
C12
C11
C10C9
C8
C7
C6C5 C4
C3C2
C1
572X_RFOP
572X_RFON
5V 3P3V 1P8V
R3
ADL5724
DUTA
ADM7172ACPZ-3.3
ADM7170ACPZ-1.8
25-146-1000-92
442
10K
00
69157-102HLF
BLK
4.7UF
1000PF
4.7UF4.7UF
1000PF
4.7UF
0.1UF
0.1UF 4.7NF
33PF33PF
4.7NF
25-146-1000-92
25-146-1000-92
RED RED RED
0
5
2
37
6
PAD
4
1 8
111
CNSRI2516100092_SW109201A5
1
234
CNSRI2516100092_SW109201A5
1
2
34
1
1
2
CNSRI2516100092_SW109201A5
1
234
5
PAD 6
3
4
8
7
1
25
PAD 6
3
4
8
7
1
2
OUTP
OUTN
RFIN
1.8V
5V
1.8V
1.8V 3.3V
3.3V
3.3V5V
5V
1.8V
AGND
AGND
AGND AGND
OUTN
OUTPINPT
PAD
VCC2
DNCRBIAS
GND
VCC1
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
EP
VIN2
VIN1
GND
EN
SS
SENSE
VOUT2
VOUT1
EP
VIN
VIN
GND
EN
SS
SENSE
VOUT
VOUT
AGND
AGND
AGND
AGND
AGND
AGND AGND
AGND
AGND
14317-015
Figure 20. Evaluation Board Schematic
Table 6. Evaluation Board Configuration Options
Component
Function
Default Condition
3P3V, 1P8V, GND, 5V Power supplies and ground. Not applicable
RFIN, 572X_RFOP, 572x_RFON Input, output, and data. Not applicable
RBIAS 442 Ω for RBIAS. R1 = 442 Ω (0402)
R1,R2 1.8 V and 3.3 V regulator connections. R2 = 0 Ω (0402)
R3 Do not install (DNI). R3 = DNI (0402)
R4 Pull-up or pull-down resistor. R4 = 10 kΩ (0402)
C1 to C12 The capacitors provide the required decoupling of the supply
related pins.
C1, C4 = 4.7 nF (0402),
C2, C3 = 33 pF (0402),
C5, C6 = 0.1 µF (0402),
C7, C9, C10, C12 = 4.7 µF (0603),
C8,C11 = 1000 pF (0603)
P1 Jumper to change bands, 2-pin jumper. Not applicable
U1 ADM7170ACPZ-1.8 1.8 V regulator. Not applicable
U2 ADM7172ACPZ-3.3 3.3 V regulator. Not applicable
DUTA ADL5724 device under test (DUT). Not applicable
ADL5724 Data Sheet
Rev. 0 | Page 12 of 12
OUTLINE DIMENSIONS
1.70
1.60
1.50
0.425
0.350
0.275
TOP VIEW
8
1
5
4
0.30
0.25
0.20
BOTTOM VIEW
PIN 1 INDEX
AREA
SEATING
PLANE
0.60
0.55
0.50
1.10
1.00
0.90
0.20 REF
0.15 REF
0.05 M AX
0.02 NO M
0.50 BSC
EXPOSED
PAD
PIN 1
INDICATOR
(R 0. 15)
FO R P ROPE R CONNECTION O F
THE EXPOSED PAD, REFER TO
THE P IN CO NFI GURATIO N AND
FUNCTION DES CRIPT IO NS
SECTION OF THIS DATA SHEET.
01-14-2013-C
2.10
2.00 SQ
1.90
Figure 21. 8-Lead Lead Frame Chip Scale Package [LFCSP]
2.00 mm × 2.00 mm Body, and 0.55 mm Package Height
(CP-8-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
ADL5724ACPZN-R7 −40°C to +85°C 8-Lead Lead Frame Chip Scale Package [LFCSP] CP-8-10
ADL5724-EVALZ Evaluation Board
1 Z = RoHS-Compliant Part.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14317-0-4/16(0)
