TC74ACT161,163P/F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74ACT161P, TC74ACT161F TC74ACT163P, TC74ACT163F Synchronous Presettable 4-Bit Binary Counter TC74ACT161P/F/FN Asynchronous Clear TC74ACT163P/F/FN Synchronous Clear The TC74ACT161 and T163 are advanced high speed CMOS SYNCHRONOUS PRESETTABLE 4 BIT BINARY COUNTERs fabricated with silicon gate and double-layer metal wiring C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. These devices may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are compatible with TTL, NMOS and CMOS output voltage levels. The CK input is active on the rising edge. Both LOAD and CLR inputs are active on low logic level. Presetting of these IC's is synchronous to the rising edge of CK. The clear function of the TC74ACT163 is synchronous to CK, while the TC74ACT161 are cleared asynchronously. Two enable inputs (ENP and ENT) and CARRY OUTPUT are provided to enable easy cascading of counters, which facilitates easy implementation of n-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74ACT161P, TC74ACT163P TC74ACT161F, TC74ACT163F Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Features * High speed: fmax = 110 MHz (typ.) at VCC = 5 V * Low power dissipation: ICC = 8 A (max) at Ta = 25C * Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) * Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 * transmission lines. Balanced propagation delays: tpLH - tpHL * Pin and function compatible with 74F161/163 Start of commercial production 1989-11 1 2014-03-01 TC74ACT161,163P/F Pin Assignment IEC Logic Symbol TC74ACT161 TC74ACT163 Truth Table Inputs Outputs CK (163) Function CLR (161) CLR (163) LOAD ENP ENT CK (161) L L X X X X H H L X X H H H X L No Change No Count H H H L X No Change No Count H H H H H Count Up Count H X X X X No Change No Count QA QB QC QD L L L L Reset to "0" A B C D Preset Data X: Don't care A, B, C, D: Logic level of data inputs Carry: Carry = ENTQAQBQCQD 2 2014-03-01 TC74ACT161,163P/F Timing Chart 3 2014-03-01 TC74ACT161,163P/F System Diagram (Note) (Note) (Note) (Note) (Note) Note: Truth table of internal F/F TC74ACT161 TC74ACT163 D CK R Q X X Q D CK R Q Q H L H X H L H L L L H L L L H H L H L X L H L X L X L No Change No Change X: Don't care 4 2014-03-01 TC74ACT161,163P/F Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range VCC -0.5 to 7.0 V DC input voltage VIN -0.5 to VCC + 0.5 V VOUT -0.5 to VCC + 0.5 V Input diode current IIK 20 mA Output diode current IOK 50 mA DC output current IOUT 50 mA DC VCC/ground current ICC 125 mA Power dissipation PD 500 (DIP) (Note 2)/180 (SOP) mW Storage temperature Tstg -65 to 150 C DC output voltage Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = -40 to 65C. From Ta = 65 to 85C a derating factor of -10 mW/C should be applied up to300 mW. Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage VCC 4.5 to 5.5 V Input voltage VIN 0 to VCC V VOUT 0 to VCC V Operating temperature Topr -40 to 85 C Input rise and fall time dt/dV 0 to 10 ns/V Output voltage Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 5 2014-03-01 TC74ACT161,163P/F Electrical Characteristics DC Characteristics Characteristics Test Condition Symbol Ta = -40 to 85C Ta = 25C VCC (V) Min Typ. Max Min Max Unit High-level input voltage VIH 4.5 to 5.5 2.0 2.0 V Low-level input voltage VIL 4.5 to 5.5 0.8 0.8 V 4.5 4.4 4.5 4.4 4.5 3.94 3.80 5.5 3.85 4.5 0.0 0.1 0.1 4.5 0.36 0.44 5.5 1.65 High-level output voltage Low-level output voltage Input leakage current Quiescent supply current Note: VOH VOL IOH = -50 A VIN = VIH or IOH = -24 mA VIL IOH = -75 mA IOL = 50 A VIN = VIH or IOL = 24 mA VIL IOL = 75 mA (Note) (Note) V V IIN VIN = VCC or GND 5.5 0.1 1.0 A ICC VIN = VCC or GND 5.5 8.0 80.0 A 5.5 1.35 1.5 mA Ta = 25C Ta = -40 to 85C Unit VCC (V) Limit Limit Figure 1 5.0 0.5 5.0 5.0 ns Figure 4 5.0 0.5 5.0 5.0 ns ts Figure 2, Figure 3 5.0 0.5 6.0 6.0 ns ts Figure 2 5.0 0.5 4.0 4.0 ns ts Figure 5 5.0 0.5 3.0 3.0 ns th Figure 2, Figure 3 5.0 0.5 1.0 1.0 ns th Figure 2 5.0 0.5 2.0 2.0 ns th Figure 5 5.0 0.5 2.0 2.0 ns trem Figure 4 5.0 0.5 1.0 1.0 ns IC Per input: VIN = 3.4 V Other input: VCC or GND This spec indicates the capability of driving 50 transmission lines. One output should be tested at a time for a 10 ms maximum duration. Timing Requirements (input: tr = tf = 3 ns) Characteristics Symbol Minimum pulse width tW (L) (CK) tW (H) Minimum pulse width ( CLR ) (Note1) Minimum pulse width ( LOAD , ENP, ENT) Minimum set-up time (A, B, C, D) Minimum set-up time ( CLR ) (Note 2) Minimum hold time ( LOAD , ENP, ENT) Minimum hold time (A, B, C, D) Minimum hold time ( CLR ) (Note 2) Minimum removal time ( CLR ) Test Condition (Note 1) tW (L) Note 1: For TC74ACT161 only Note 2: For TC74ACT163 only 6 2014-03-01 TC74ACT161,163P/F AC Characteristics (CL = 50 pF, RL = 500 , input: tr = tf = 3 ns) Characteristics Typ. Max Min Max Figure 1 5.0 0.5 7.2 10.5 1.0 12.0 ns Figure 1 5.0 0.5 8.5 13.0 1.0 15.0 ns Figure 2 5.0 0.5 9.7 15.0 1.0 17.0 ns Figure 6 5.0 0.5 6.6 10.0 1.0 11.5 ns tpHL Figure 4 5.0 0.5 6.3 10.0 1.0 11.5 ns tpHL Figure 4 5.0 0.5 7.7 12.3 1.0 14.0 ns 5.0 0.5 70 100 60 MHz 5 10 10 pF 32 pF tpLH (CK-Q) Propagation delay time tpLH tpHL tpLH (CK-CARRY, preset mode) tpHL Propagation delay time tpLH (ENT-CARRY) tpHL Propagation delay time (Note 2) Unit Min tpHL (CK-CARRY, count mode) Ta = -40 to 85C Ta = 25C VCC (V) Propagation delay time Propagation delay time Test Condition Symbol ( CLR -Q) Propagation delay time (Note 2) ( CLR -CARRY) Maximum clock frequency fmax Input capacitance CIN Power dissipation capacitance CPD (Note 1) Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPDVCCfIN + ICC When the outputs drive a capacitive load, total current consumption is the sum of CPD, and ICC which is obtained from the following formula: C C C C C ICC = fCK VCC ( QA + QB + QC + QD + CO ) 2 4 8 16 16 CQA~CQD and CCO are the capacitances at QA~QD and CARRY OUT, respectively. fCK is the input frequency of the CK. Note 2: for TC74ACT161 only 7 2014-03-01 TC74ACT161,163P/F Switching Characteristics Test Waveform Count Mode Clear Mode (TC74ACT161) Figure 4 Figure 1 Preset Mode Clear Mode (TC74ACT163) Figure 5 Figure 2 Count Enable Mode Cascade Mode (fix maximum count) Figure 6 Figure 3 8 2014-03-01 TC74ACT161,163P/F Typical Application Parallel Carry N-Bit Counter 9 2014-03-01 TC74ACT161,163P/F Package Dimensions Weight: 1.00 g (typ.) 10 2014-03-01 TC74ACT161,163P/F Package Dimensions Weight: 0.18 g (typ.) 11 2014-03-01 TC74ACT161,163P/F RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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