DATA SHEET CX74002: Tx ASIC for CDMA, PCS, and AMPS Applications APPLICATIONS * Cellular and PCS band phones * CDMA and AMPS phones in the cellular band: - CDMA-US - CDMA-Japan * CDMA mode in PCS band: - PCS-US - PCS-Korea FEATURES VGA_CTRL VGA_OUT+ VGA_OUT- IF_IN+ IF_IN- VCC_MIXER_1 VCC_MIXER_2 POT_PCS POT_CELL 40 39 38 37 36 35 34 33 32 * Device controlled via serial bus interface * Low power consumption in all operating modes * Three drivers: one cellular band, two PCS for use with splitband filters * Image reject upconverter saves two RF Surface Acoustic Waves (SAWs) in a dual-band application * Tx power control with 90 dB dynamic range * Variable gain RF block for improved in-band SNR * 200 MHz to 700 MHz VHF VCO (external tank) * VCO_ON feature to increase the talk time of the radio * Two separate Phase Lock Loop (PLL) synthesizers: dualloop multi-band operation, power-save mode for both standby and lower frequency of operation * Fully programmable PLL dividers, selectable charge-pump currents for multi-VCO applications * 6 mm x 6 mm RF Land Grid Array (RFLGATM) package with downset paddle * Tx puncture pin disables programmable portions of device 25 VCC_CDMA_DRV VCO_TANK+ 8 24 TX_PUNCTURE VCO_TANK- 9 23 DATA IREF 10 22 LATCH_ENABLE POT_IREF 11 21 CLK 20 7 UHF_LO CDMA_DRV_OUT VCC_DIV 19 26 SYN_LO 6 18 VCC_BIAS_DIFF_DRV I- VCC_UHF 27 17 5 UHF_CP VCC_PCS_DIFF_DRV I+ 16 28 LD_OUT 4 15 PCS_DRV_OUT_A VCC_IQ_MOD REF 29 14 3 VHF_CP VCC_BIAS_SEC_DRV Q- 13 PCS_DRV_OUT_B 30 12 31 2 VCC_CLK 1 Q+ VCC_VHF VCC_IF The CX74002 device is a single-supply, monolithic integrated circuit. It is designed for use in dual-mode and multi-band CDMA/AMPS/PCS cellular voice/data applications including extensions for Japanese (CDMA-Japan) and Korea (PCSKorea). The CX74002 is a highly integrated superheterodyne transmitter that incorporates the following components: * In-Phase and Quadrature (I/Q) modulator - accepts the analog I and Q current outputs from the baseband analog processor and converts them to Intermediate Frequency (IF) signals * Voltage Controlled Oscillator (VCO) and VHF synthesizer - generates the LO signal for the quadrature modulators for the cellular and the PCS bands * UHF synthesizer - controls the UHF oscillator * Variable Gain Amplifier (VGA) - provides the variable output power for CDMA systems * Image reject upconverter and power amplifier (PA) drivers The signal enters the chip as a baseband I/Q signal, which is upconverted by an I/Q Quadrature Modulator. The resulting signal is fed through a VGA to provide variable output power. After leaving the open collector output of the VGA, the signal enters a switch matrix. This switch matrix allows the signal to be routed through an external filter, or it can be filtered by the collector load and passed directly to the UHF image reject mixer. This feature allows for dual Tx IF frequencies without any external switching components. The image reject mixer is internally connected to the PA driver. The mixer driver combination has a variable gain control, which can be used to reduce the RF gain, which improves the in-band Signal-toNoise Ratio (SNR) at a lower output power. The PA driver amplifies the RF signal to the appropriate level for the desired output power. This is then filtered by a bandpass filter and sent to an external PA to obtain the final rated output power at the antenna. C1195 Figure 1. CX74002 Pinout - 40-Pin LGA Package (Top View) Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 1 JANUARY 31, 2003 PCS Driver Bias VCC_MIXER_1 UHF_LO VCC_MIXER_2 VCC VGA_CTRL VCC_IF VCC_CLK IREF VCC Bias VCC Data Sheet I CX74002 VCC_ IQ_MOD PCS_DRV_O UT_A POT_PCS I+ PCS_DRV_O UT_B I/2 /4 Q+ Mux Q- VCO_T ANK+ VCO_T ANK- CDMA_DRV_OUT VHF PLL /2, 1 Control Sig UHF PLL CDMA Driver Bias CLK TX_PUNCTURE DATA Enable UHF_CP SYN_LO Lock Detect VHF_CP REF POT_CELL 101253_002 REF REF. BUFFER 13-BIT REFERENCE COUNTER UHF_CP VCC_VHF VCC_UHF VCC_CLK Figure 2. CX74002 Tx ASIC Block Diagram PFD1 CHARGE PUMP 1 6-BIT SWALLOW COUNTER 64/65 PRESCALER BUFFER 3-BIT SWALLOW COUNTER 8/9 PRESCALER BUFFER UHF_LO 12-BIT PROGRAMMABLE COUNTER MUX 13-BIT PROGRAMMABLE COUNTER PFD2 IF CHARGE PUMP 2 VHF_CP 13-BIT REFERENCE COUNTER 101253_003 Figure 3. UHF/VHF PLL Block Diagram 2 JANUARY 31, 2003 Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Technical Description VGA_OUT IF_IN A C I/Q Modulator and VGA The I/Q modulator converts the incoming I/Q signal to an IF signal, then feeds it directly to the VGA. The LO for the I/Q modulator is generated by the VHF VCO and is controlled by the VHF PLL. The I/Q modulator has two input modes: voltage mode and current mode. The voltage mode operates with 1.0 Vp-p differential I/Q inputs. In the current mode, a DC input current of 1.0 mA is required with 0.5 mA signal swing. The modulator supports direct I/Q or direct VCO modulation in the AMPS mode. The VGA has 90 dB of dynamic range. The open collector output requires an inductor pull-up to VCC and filtered to reject noise that falls in the receiver band. VGA MIXER B Switch Modes IFout1 IFout2 A B C VHF, VCO, and PLL 0 0 1 0 1 The VHF VCO has a frequency range of 200 to 700 MHz and requires an external tank circuit. This tank circuit can be used to provide the analog FM modulation in the AMPS mode. The VHF VCO is connected to an on-chip VHF PLL. The frequency of the VCO output is divided by 2 or 4 to derive the I/Q LO signals for the I/Q modulator. Also, an additional divide by 2/4 is derived from the tank frequency before input to the VHF PLL buffer. 0 1 1 1 0 1 0 0 1 1 1 1 Not used Not used Not used The VHF loop of the synthesizer has a 16-bit N divider and a 13-bit R divider (see Figure 3). The charge pump has four programmable discreet levels from 100 to 400 A. The VHF PLL is supplied by the VCC_DIV and VCC_VHF pins, and the VCO output follows an internal path to the I/Q modulator. As a result, the VHF PLL must be used for proper operation of the device. However, the VHF PLL and the VHF VCO may be enabled and disabled independently through the serial bus. Switch Matrix To provide the maximum flexibility for multiple IF frequency plans, there is a switch matrix between the VGA output and the upconverter input. This switch matrix allows a direct connection between the VGA and the upconverter and provides two external ports for the VGA's open collector output. An LC tank circuit can be used as the open collector load at the VGA_OUT pins or the IF_IN pins, or both. This load provides adequate Rx band noise filtering without an expensive external SAW filter. Dual Tx IF frequencies plan (single Rx IF [SIF] frequency plan) can be easily implemented by using two separate LC tank circuits on the VGA_OUT pin and the IF_IN pin: one set is tuned to the cellular band, the other set is tuned to the PCS band. An external dual-port filter can also be used between the VGA_OUT pin and IF_IN pin for IF filtering before the signal goes into the upconverter. The operation of this switch matrix is programmed by using the serial bus interface (see Figure 4). Variable RF Gain Image Reject Upconverter The image reject upconverter receives the IF signal from the Tx VGA after passing through the switch matrix. The upconverter uses an external UHF VCO, controlled by the internal UHF PLL. The UHF LO frequency can vary from 600 to 2.2 GHz (600 to 0 = Logic low 1= Logic high 0 = Open 1 = Closed Figure 4. VGA/Upconverter Switching Diagram 1100 MHz for the cellular band and 1600 to 2200 MHz for the PCS band). The upconverter can be programmed for high side (RF = LO - IF) or low side (RF = LO + IF) operation. Using an image reject mixer eliminates the need for an image reject SAW filter. The output of the mixer may be routed to either the CDMA PA driver or the PCS PA driver. At a low output power level, RF gain is reduced to improve the SNR of the signal. The variable gain function is controlled by VGA_CTRL signal, which also controls IF VGA. Synthesizer A dual UHF/VHF synthesizer has been integrated into the CX74002. This dual, multi-band frequency synthesizer has fully programmable dividers and selected charge pump currents for on-chip VHF VCO and external UHF VCO operation. The UHF synthesizer operates from 600 to 2200 MHz. It takes its reference signal from the REF pin. The programming of the UHF synthesizer is provided through the serial bus (see Figure 3). This synthesizer includes a 13-bit R divider and an 18-bit N divider. The charge pump current is adjustable and has four discrete steps between 0.8 mA and 2.7 mA. The UHF PLL has an independent power supply from the rest of the device. As a result, the UHF PLL can remain operational when the remainder of the CX74002 is disabled. The Rx LO can be also supplied from the same synthesizer, minimizing the total component count and minimizing the total current when only the Rx portion of the radio is in operation. If an external PLL is desired, the UHF PLL can be disabled without adversely affecting the operation of the CX74002. Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 3 JANUARY 31, 2003 Data Sheet I CX74002 PA Drivers Three PA drivers are included: the CDMA driver and two PCS drivers. Each driver takes its input from the image reject upconverter. The driver amplifies the signal and sends it to an external PA. A SAW filter for noise rejection should be used between the driver and the external PA. The primary purpose of the SAW is to reduce the Rx band noise from the signal - this Rx band noise can leak through the duplexer and reduce the sensitivity of the receiver. Two outputs are provided in the PCS band to facilitate the use of a split band filter at the PCS output. Serial Bus A 3-wire serial bus is provided for mode control. The serial bus is also used to program both the VHF and the UHF PLLs. Electrical and Mechanical Specifications Signal pin assignments and functional pin descriptions are described in Table 1. The absolute maximum ratings of the CX74002 are provided in Table 2. The recommended operating 4 JANUARY 31, 2003 conditions are specified in Table 3 and electrical specifications are provided in Table 4. Tables 5 through 12 provide the control logic and timing for the CX74002. Timing diagrams are shown in Figures 5 and 6 for the synthesizer and serial data word, respectively. Typical performance characteristics of the CX74002 are illustrated in Figures 7 through 28. Figure 29 shows an application schematic diagram. The package dimensions for the CX74002 40-pin RFLGA are shown in Figure 30, and the tape and reel dimensions are provided in Figure 31. Electrostatic Discharge (ESD) Sensitivity The CX74002 is a static-sensitive electronic device. Do not operate or store near strong electrostatic fields. Take proper ESD precautions. The Human Body Model (HBM) ESD withstand threshold value, with respect to ground, is 1.5 kV. The HBM ESD withstand threshold value, with respect to VCC (the positive power supply terminal), is also 1.5 kV. Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 1. CX74002 Pin Assignments and Signal Descriptions (1 of 3) Pin # Name Description 1 VCC_IF VCC for the IF VGA and the mixer input buffer 2 Q+ Q+ input. High input impedance for voltage mode; low input impedance for current mode. 3 Q- Q- input. High input impedance for voltage mode; low input impedance for current mode. 4 VCC_IQ_MOD VCC for the I/Q modulator. Also shared by divide-by-2/4 last stage, all the bias blocks (Note 1). 5 I+ I+ input. High input impedance for voltage mode; low input impedance for current mode. 6 I- I- input. High input impedance for voltage mode; low input impedance for current mode. 7 VCC_DIV VCC for the bias circuit of the VCO, VHF PLL buffer, divide-by2/4 first stage (Note 2). 8 VCO_TANK+ VCO tank Equivalent Circuit - + 9 VCO_TANK- VCO tank 10 IREF Output to the baseband chip during the current I/Q mode. This pin is not used and left open during the voltage I/Q mode. 11 POT_IREF External resistor (120 k typical) is required to set the current in the PLLs and the IREF. 12 VCC_CLK VCC supplies the TCXO buffers and related circuitry. Should be kept separate from analog supply (Note 1) (Note 2). 13 VCC_VHF VCC for the VHF Prescalar, VHF, UHF counters, and the serial bus (Note 1) (Note 2). Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 5 JANUARY 31, 2003 Data Sheet I CX74002 Table 1. CX74002 Pin Assignments and Signal Descriptions (2 of 3) Pin # Name Description 14 VHF_CP VHF charge pump output 15 REF Reference clock input from TCXO. AC coupling is required. 16 LD_OUT Lock detector is a CMOS output. 17 UHF_CP UHF charge pump 18 VCC_UHF VCC for UHF prescalar and UHF charge pump. Should be kept separate from Tx supply (Note 1). 19 SYN_LO RF input to the UHF PLL 20 UHF_LO UHF LO input for both cellular and PCS upconverter. AC coupling is required. 21 CLK Clock input for the 3-wire bus 22 LATCH_ENABLE Latch input enable for the 3-wire bus 23 DATA Data input for the 3-wire bus 24 TX_PUNCTURE Use to turn on/off block function in gated mode. See Table 7 for details. 25 VCC_CDMA_DRV VCC for the CDMA differential driver. 26 CDMA_DRV_OUT CDMA driver output. AC coupling is required. 27 VCC_BIAS_DIFF_DRV VCC for the TX LO chain (Note 1). 28 VCC_PCS_DIFF_DRV VCC for the PCS differential driver. 6 JANUARY 31, 2003 Equivalent Circuit Vcc Vcc Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 1. CX74002 Pin Assignments and Signal Descriptions (3 of 3) Pin # Name Description Equivalent Circuit 29 PCS_DRV_OUT_A PCS DRV A is an open collector output. VCC inductor pull-up and external matching are required. 30 VCC_BIAS_SEC_DRV VCC for bias circuit of the second stage single-ended PCS drivers (shared by A and B) 31 PCS_DRV_OUT_B PCS DRV B is an open collector output. VCC inductor pull-up and external matching are required. 32 POT_CELL Resistor to set the Cellular driver bias current. 33 POT_PCS Resistor to set the PCS driver bias current. 34 VCC_MIXER_2 Open collector for external tank circuit for the differential UHF mixer. Internally connected to driver amplifier input. 35 VCC_MIXER_1 Open collector for external tank circuit for the differential UHF mixer. Internally connected to driver amplifier input. 36 IF_IN- IF input to the mixer is one of the dual VGA outputs. (See Figure 4.) 37 IF_IN+ IF input to the Mixer is one of the dual VGA outputs. (See Figure 4.) 38 VGA_OUT- VGA output is one of the dual VGA outputs. 39 VGA_OUT+ VGA output is one of the dual VGA outputs. 40 VGA_CTRL VGA control input voltage. VGA_OUT IF_IN Note 1: Required for UHF PLL On. Note 2: Required for VHF PLL On. Table 2. Absolute Maximum Ratings Parameter Symbol Minimum Typical Maximum Units Supply voltage -0.3 5.0 V Input voltage range -0.3 VCC V Ambient operating temperature -30 +80 C Storage temperature -40 +125 C Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 7 JANUARY 31, 2003 Data Sheet I CX74002 Table 3. Recommended Operating Conditions (@ +25 C) Parameter Symbol Minimum Typical Maximum Units Supply voltage 2.7 2.85 3.3 V Logic level high 1.9 V Logic level low 0.6 V Supply current in cellular mode: CDMA, 8 dBm output 103 108 mA Supply current in cellular mode: AMPS, 11 dBm output 107 112 mA Supply current in 1900 MHz: PCS, 9 dBm output 122 130 mA Supply current in sleep mode 45 70 A Table 4. Electrical Characteristics (1 of 4) (TA = +25 C, VCC = 2.85 V, PLO = -5 dBm, IS95A Input Waveform) Parameter Symbol Test Conditions Minimum Typical Maximum Units 200 260 700 MHz 2 harmonic (measured @ tank circuit) -30 -20 dBc 3rd harmonic (measured @ tank circuit) -20 -10 dBc Phase noise @ 100 kHz offset, Fc = 260 MHz, unloaded tank Q = 20 -117 -112 dBc/Hz 4 4.3 mA 1 1.0 200 1.4 210 mA mA A Carrier suppression @ CDMA @ PCS -40 -40 -35 -35 dBc dBc Residual sideband suppression: @ CDMA @ PCS -40 -39 -35 -35 dBc dBc IF VCO Frequency range for VCO nd Supply current Divide by 2/4, I/Q Modulator, VGA Current mode interface for IF block: Input current Input current swing (p-p differential) Reference current sinking into the device (set by external resistor) -1 dB bandwidth VGA Pout (with 500 load resistor): VGA_CTRL @ 2.5 V in AMPS mode VGA_CTRL @ 2.5 V in CDMA mode VGA_CTRL @ 2.5 V in PCS mode VGA frequency range (-1 dB bandwidth) 8 JANUARY 31, 2003 190 3 5 MHz -6.0 -6.0 - 6.0 -5.0 -5.0 -5.0 dBm dBm dBm 50 600 MHz Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 4. Electrical Characteristics (2 of 4) (TA = +25 C, VCC = 2.85 V, PLO = -5 dBm, IS95A Input Waveform) Parameter Symbol Test Conditions Minimum Typical Maximum Units Divide by 2/4, I/Q Modulator, VGA (continued) Gain control input impedance 30 40 VGA gain slope (0.5 V to 2.5 V) 42 45 Gain slope variation (over any 6 dB segment) -3 k 48 dB/V +3 dB -64 -62 dBc -68 -64 dBc -65 -62 dBc -68 -64 dBc Supply current @ maximum gain 29.0 30.0 mA Supply current @ minimum gain 20.0 20.8 mA In CDMA mode: ACPR in 30 kHz band @ 0.885 MHz offset, VGA_CTRL = 2.5 V ACPR in 30 kHz band @ 1.98 MHz offset, VGA_CTRL = 2.5 V In PCS mode: ACPR in 30 kHz band @ 1.25 MHz offset, VGA_CTRL = 2.5 V ACPR in 30 kHz band @ 1.98 MHz offset, VGA_CTRL = 2.5 V Cellular Upconverter and Driver LO frequency range 600 1100 MHz Output frequency 824 924 MHz RF gain dynamic range: @ CDMA mode 14.0 14.5 dB Output power in AMPS mode 11 dBm Output power in CDMA mode 8 dBm ACPR in 30 kHz at 885 kHz offset @ Po = 8 dBm -54 -50 dBc ACPR in 30 kHz at 1.98 MHz offset @ Po = 8 dBm -68 -64 dBc RF input return loss (externally matched) -13.5 -10 dB LO input return loss (externally matched) -13.5 -10 dB Output return loss (externally matched) -13.5 -10 dB Rx band noise @ maximum gain and Po = 8.0 dBm. Input to mixer block is thermal noise of -173.89 dBm/Hz -138 -135 dBm/Hz -5 0 dBm -21 -15 dBm LO input level -8 LO leakage power @ driver output 8 dBm Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 9 JANUARY 31, 2003 Data Sheet I CX74002 Table 4. Electrical Characteristics (3 of 4) (TA = +25 C, VCC = 2.85 V, PLO = -5 dBm, IS95A Input Waveform) Parameter Symbol Test Conditions Minimum Typical Maximum Units Supply current @ 8.0 dBm 65 68 mA Supply current FM @ 11 dBm 70 73 mA RF image rejection @ Po = 8 dBm -33 -20 dBc Cellular Upconverter and Driver (continued) PCS Upconverter and Driver LO frequency range 1600 2200 MHz Output frequency 1700 1950 MHz RF gain dynamic range 14 Output power 9 14.5 dB dBm ACPR in 30 kHz @ 1.25 MHz offset @ 9 dBm -52 -50 dBc ACPR in 30 kHz @ 1.98 MHz offset @ 9 dBm -68 -66 dBc LO input return loss (externally matched) -15 -10 dB Output return loss (externally matched) -10 -8 dB Rx band noise @ maximum gain, Po = 9.0 dBm. Input to block is thermal noise of -173.89 dBm/Hz -134 -132 dBm/Hz -5 0 dBm LO leakage power @ driver output 9 dBm -15 -12 dBm supply current @ Po = -10 dBm 60 63 mA supply current @ Po = 9 dBm 81 84 mA RF image rejection @ Po = 9 dBm -25 -15 dBc 600 200 2200 700 MHz MHz Reference range 1 25 MHz Phase detector frequency minimum range 10 1500 kHz Reference input sensitivity 300 LO input level -8 Dual UHF/VHF Synthesizer Input frequency minimum range Prescalar input sensitivity 10 JANUARY 31, 2003 RF IF @ 2.2 GHz 500 -15 mVp-p +6 dBm Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 4. Electrical Characteristics (4 of 4) (TA = +25 C, VCC = 2.85 V, PLO = -5 dBm, IS95A Input Waveform) Parameter Symbol Test Conditions Minimum Typical Maximum Units Dual UHF/VHF Synthesizer (continued) Charge pump current, RF (sel 1) 0.7 0.8 0.9 mA Charge pump current, RF (sel 2) 1.1 1.2 1.3 mA Charge pump current, RF (sel 3) 1.5 1.8 2.0 mA Charge pump current, RF (sel 4) 1.8 2.7 3.0 mA Charge pump current, IF (sel 1) 0.09 0.1 0.11 mA Charge pump current IF (sel 2) 0.18 0.2 0.22 mA Charge pump current IF (sel 3) 0.27 0.3 0.33 mA Charge pump current IF (sel 4) 0.36 0.4 0.44 mA Charge pump output voltage compliance minimum range 0.5 Vdd - 0.5 V Supply current, RF 4.85 mA Supply current, IF 1.65 mA Supply current, total 6.5 6.8 mA Cascaded Cellular Mode CDMA output power 8 dBm ACPR in 30 kHz at 885 kHz offset @ 8 dBm -52 -50 dBc ACPR in 30 kHz at 1.98 MHz offset @ 8 dBm -68 -64 dBc AMPS mode output power 11 Rx band noise @ maximum gain and Po = 8.0 dBm dBm -138 -135 dBm/Hz Cascaded PCS Mode Maximum output power 9 dBm ACPR in 30 kHz @ 1.25 MHz offset @ Po = 9 dBm -52 -50 dBc ACPR in 30 kHz @ 1.98 MHz offset @ Po = 9 dBm -68 -66 dBc Rx band noise @ maximum gain and Po = 9.0 dBm. -134 -132 dBm/Hz Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 11 JANUARY 31, 2003 Data Sheet I CX74002 Table 5. Serial Bus Interface for Synthesizer Control Bit # Function Description 0 (LSB) Control (CO) Logic 1 selects the Mode/Feature Control Register . Logic 0 selects the PLL Rregister 1 RF/IF or LD_UHF/VHF (Note 1) Logic 1 selects the UHF PLL and Logic 0 selects the VHF PLL 2 R/N Logic 1 selects the R divider and Logic 0 selects the N divider for the respective synthesizer (UHF or VHF) 3 Charge-pump polarity Logic 1 sets the charge pump output polarity inverted and Logic 0 sets it to normal polarity. BUFF_CURR_SEL1 BUFF_CURR_SEL2 See Table 9 for details. Power down Logic 1 selects power down. Logic 0 sets the normal operation. LD inih Logic 0 enables the LD test pin. Logic 1 disables it. 4 5:6 CP Sel 1, CP Sel 2 7 Three-state CP 8:9 LD Mode 1, LD Mode 2 CP SEL1 CP SEL2 UHF CP CURRENT VHF CP CURRENT Bit 5 0 1 0 1 Bit 6 0 0 1 1 0.8 mA 1.2mA 1.8 mA 2.7 mA 0.1 mA 0.2 mA 0.3 mA 0.4 mA Logic 1 three-states the charge-pump output. Logic 0 sets it to normal. LD MODE1 Bit 8 LD MODE2 Bit 9 0 0 Logic 00 muliplexes the ANDed lock detect of both PLL to LD output 0 1 Logic 01 multiplexes the selected PLL Rdiv output to LD output 1 0 Logic 10 multiplexes the selected PLL Ndiv output to LD output 1 1 Logic 11 multiplexes the selected PLL lock det output to LD output LD MODE 21 DIV2_SW See Table 10 for details. 22 CDMA_BIAS See Table 11 for details. 5:22 N Divider This 18-bit word is loaded into N counter latch; 16-bit word for VHF N counter. 10:22 R Divider This 13-bit word is loaded into R counter latch Key: 0 = low 1 = high Note 1: Explained in Table 7. 12 JANUARY 31, 2003 Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 6. Serial Bus Assignment 0 (LSB) CO 0 0 0 0 1 1 RF/IF 1 1 0 0 LD_UHF/VHF 2 R/N 0 1 0 1 X 3 Buf_curr_sel2 CP Polarity Buf_curr_sel1 CP Polarity PCS A/B 4 Power-down LD inih Power-down LD inih IFout1 5 CP Sel 1 CP Sel 1 VCO ON 6 CP Sel 2 CP Sel 2 IDLE 7 CP three-state CP three-state Cell/PCS 8 LD Mode 1 LD Mode 1 FM/CDMA 9 LD Mode 2 LD Mode 2 Divide 2/4 10 Both pcs_drv 11 FM Dig/Ana 12 13 14 Input Range b1 16-Bit N Divider (IF) 18-Bit N Divider (RF) USB/LSB Iref 1 15 IFout2 13-Bit R Divider (RF) 16 13-Bit R Divider (IF) 17 Bias Set 2 18 VGA Range 19 Block Control 1 20 Block Control 2 21 DIV2_SW V/C Interface 22 CDMA_BIAS Rx_sif Key: 0 = low 1 = high X = N/A Note: See Table 7 for Mode/Feature Logic Skyworks Solutions, Inc., Proprietary and Confidential 101253B Bias Set 1 [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 13 JANUARY 31, 2003 Data Sheet I CX74002 Table 7. Mode/Feature Control Logic (1 of 2) Mode Description LD_UHF/VHF = 1, UHF LD_UHF/VHF = 0, VHF Selects the LD pin to be connected to the UHF or VHF LD functions PCS A/B = 0, LOW Band Output (PCS Output B) PCS A/B = 1, HIGH Band Output (PCS Output A) PCS A/B controls the switching of the appropriate driver output for the lower or higher part of the PCS band. VCO_ON = 0, VCO = OFF VCO_ON = 1, VCO = ON VCO_ON controls the VHF VCO turn-on switching. VCO_ON acts independently of IDLE bit IDLE = 0, TX = OFF, IDLE = 1, TX = ON IDLE mode: When the handset is only receiving pages from the base station and the transmitter is completely shut OFF Cell/PCS = 0, CDMA Mode (Cellular) Cell/PCS switches between cellular and PCS band. Cell/PCS = 1, CDMA Mode (PCS) FM/CDMA = 0, AMPS Mode FM/CDMA is used to select the operating mode of the transmitter in AMPS and CDMA 800 MHz FM/CDMA = 1, CDMA Mode Note: When FM/CDMA = 0, the device is in AMPS mode, independent of Cell/PCS Divby2/4 = 0, Divide by 2 Divby2/4 = 1, Divide by 4 Divby2/4 controls the divide ratio for the VHF oscillator Both pcs_drv = 0, Only one PCS driver (either A or B) is ON, Both pcs_drv = 1, Both PCS drivers are ON Both pcs_drv controls the switching of one or both of the PCS drivers FM Dig/Ana = 0, Analog IF VCO modulation FM Dig/Ana = 1, FM Digital I/Q modulation FM Dig/Ana to switch between FM Digital (I/Q) modulation and Analog (IF VCO) modulation options in FM mode. USB/LSB = 0, Lower Side-Band injection USB/LSB = 1, Upper Side-Band Injection USB/LSB controls either the upper sideband (USB) or lower sideband (LSB) injection for the Local Oscillator (LO) Iref 1 = 0, No Reference Current Iref 1 = 1, Reference Current = 200 A (Sink) Iref 1 provides the reference bias current for the baseband device. Note: Iref 2 is not used in this design. The 200 A current can be adjusted by external resistor value. IFout1 = 0 and IFout2 = 0, Provide a 2-port filter between VGA output and Mixer input pins and VCC for VGA at VGA output pins, IFout1 = 0 and IFout2 = 1, Provide a 1-port tank and VCC for VGA at VGA output pins IFout1 = 1 and IFout2 = 0, Provide a 1-port tank and VCC for VGA at Mixer input pins IFout1 = 1 and IFout2 = 1, All switches disconnected Refer to Figure 4. IFout1 and IFout2 control the mode of operation between VGA output and Mixer input. Bias set 1 = 0 and Bias set 2 = 0, Highest current Bias set 1 = 0 and Bias set 2 = 1, Decrease by 15% Bias set 1 = 1 and Bias set 2 = 0, Decrease by 35% Bias set 1 = 1 and Bias set 2 = 1, Decrease by 57% Bias set 1 and Bias set 2 provide adjustment to the mixer core currents in the particular mode of operation. 14 JANUARY 31, 2003 Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 Table 7. Mode/Feature Control Logic (2 of 2) Mode Description Block Control 1 = 0, Block Control 2 = 0, VGA and Driver are punctured by TX puncture signal Block Control 1 = 0, Block Control 2 = 1, VGA, Mixer and Driver are punctured by TX puncture signal Block Control 1 = 1, Block Control 2 = 0, Iref, I/Q mod, VGA, Mixer, and Driver are puncture by TX puncture signal Block Control 1 = 1, Block Control 2 = 1 Driver is punctured by TX puncture signal Block Control 1 and Block Control 2 configure the state of the TX_PUNCTURE hardware pin. Depending on the combinations selected, the different blocks are enabled/disabled in the TX chip. Note: UHF PLL, IF VCO, and I/Q modulator are ON under all these conditions. V/C Interface = 0, Current Interface V/C Interface = 1, Voltage Interface V/C Interface controls the voltage or current interface for the I/Q modulator. Rx_sif = 0, 130 MHz IF for both Cellular and PCS bands. Rx_sif = 1, 230 MHz IF for cellular and 260 MHz IF for PCS bands Rx_sif controls the IF polyphase network Key: 0 = low 1 = high X = N/A Table 8. Voltage Regulator Programming Input Range_b1 VGA Range Voltage Regulator Bias 0 0 1.8 V 0 1 2.0 V 1 0 2.2 V 1 1 2.4 V Table 9. UHF LO Buffer Programming Buf_curr_sel1 Buf_curr_sel2 UHF LO 1st Buffer Bias 0 0 11% less current 0 1 Nominal current 1 0 11% more current 1 1 22% more current Table 10. Divide by 2 Before the VHF Prescalar Div2_sw Divider 2 on/off 0 Off 1 On Skyworks Solutions, Inc., Proprietary and Confidential 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 15 JANUARY 31, 2003 Data Sheet I CX74002 Table 11. Cellular Driver Biasing CDMA_BIAS Cellular Bias High/Low 0 High 1 Low Table 12. Synthesizer Timing Parameter Test Conditions High level digital I/O voltage Minimum Typical Maximum Units 0.7 VDD V Low level digital I/O voltage 0.3 VDD V Serial clock HIGH time (tCkH) 40 ns Serial clock LOW time (tCKL) 40 ns Data setup time to clock rising edge (tDSU) 40 ns Data hold time to clock rising edge (tDHD) 40 ns LE pPulse width (tLEW) 40 ns Clock falling edge to LE rising edge (tCLE) 40 ns LE falling edge to clock rising edge (tLEC) 40 ns D20 DATA tDSU D19 D18 D0 R/N RF/IF tCKH C0 = 0 tDHD CLOCK tLEC tCLE tCKL tLEW LE NOTE: LE MUST BE HELD HIGH WHEN THE BUS IS INACTIVE Figure 5. Synthesizer Timing Diagram 16 JANUARY 31, 2003 Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 WORD 1 DATA tDSU tCKH tDHD CLOCK tLEC tCLE tCKL tLEW LE NOTE: LE MUST BE HELD HIGH WHEN THE BUS IS INACTIVE Figure 6. Serial Data Word Format -35 -35 -30C -40 836.52MHz -45 80C ACPR (dBc) ACPR (dBc) -45 824.04MHz -40 25C -50 -55 -55 -60 -60 -65 -65 -70 848.37MHz -50 -70 0 1 2 3 4 5 6 7 8 0 1 2 3 Pout (dBm) 4 Figure 7. CELLULAR ACPR vs. Pout Over Temperature. Frequency = 836.52 MHz @ 885 kHz offset Vcc = 3.0 6 7 8 Figure 8. CELLULAR ACPR @ 885 kHz offset vs. Pout Over Frequency. Vcc = 3.0 V Temp = +25 C -25 - 35 2.7V - 40 -30C -30 - 45 Image Reejction (dBc) 3.0V 3.3V - 50 - 55 - 60 - 65 - 70 25C 80C -35 -40 -45 -50 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 Pout (dBm) Pout ( dBm) Figure 9. CELLULAR ACPR @ 885 kHz offset vs. Pout Over Vcc. Frequency = 836.5 MHz Temp = +25 C Figure 10. CELLULAR Image Rejection vs. Pout Over Temperature. Frequency = 836.5 MHz and Vcc = 3.0 V Skyworks Solutions, Inc., Proprietary and Confidential 101253B 5 Pout (dBm) [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 17 JANUARY 31, 2003 Data Sheet I CX74002 -25 -10 2.7V 25C -15 3.3V LO Leakage (dBm) Image Rejection(dBc) -30C 3.0V -30 -35 -40 -45 80C -20 -25 -30 -50 -35 0 1 2 3 4 5 6 7 8 0 1 2 3 Pout (dBm) Figure 11. CELLULAR Image Rejection vs. Pout Over Vcc. Frequency = 836.5 MHz and Temp = +25 C 5 7 8 120 2.7V 2.7V -15 3.0V 110 3.0V 3.3V 3.3V Current (mA) -20 -25 -30 100 90 80 -35 -40 70 0 1 2 3 4 5 6 7 8 0 1 2 3 Pout (dBm) 4 5 6 7 8 Pout (dBm) Figure 13. CELLULAR LO Leakage vs. Pout Over Vcc. Frequency = 836.5 MHz Temp +25 C Figure 14. CELLULAR Current vs. Pout Over Vcc. Frequency = 836.5 MHz, Temp = +25 C, and RFGC = 2.5 V -35 -35 -40 1.85GHz -40 -30C 1.88GHz 25C -45 -45 80C ACPR (dBc) ACPR (dBc) 6 Figure 12. CELLULAR LO Leakage vs. Pout Over Temperature. Frequency = 836.5 MHz Vcc = 3.0 V -10 LO Leakage (dBm) 4 Pout (dBm) -50 -55 1.91GHz -50 -55 -60 -60 -65 -65 -70 -70 0 1 2 3 4 5 6 7 8 9 -1 1 Pout (dBm) JANUARY 31, 2003 5 7 9 Pout (dBm) Figure 15. PCS ACPR @ 1.25 MHz offset vs. Pout Over Temperature. Frequency = 1.88 GHz and Vcc = 3.0 V 18 3 Figure 16. PCS ACPR @ 1.25 MHz offset vs. Pout Over Frequency. Vcc = 3.0 V Temp +25 C Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B Data Sheet I CX74002 -35 -20 -30C 2.7V -40 Image Rejection (dBc) ACPR (dBc) -45 25C -25 3.0V 3.3V -50 -55 -60 80C -30 -35 -40 -65 -70 -45 0 2 4 6 8 10 0 1 2 3 Pout (dBm) Figure 17. CS ACPR @ 1.25 MHz offset vs. Pout Over Vcc. Frequency = 1.88 GHz Temp = +25 C 6 7 8 9 -5 2.7V -30C 3.0V -25 LO Leakage (dBm) 3.3V -30 -35 25C -10 80C -15 -20 -40 -45 -25 0 2 4 6 8 10 0 2 4 Pout (dBm) 6 8 10 Pout (dBm) Figure 19. PCS Image Rejection vs. Pout Over Vcc. Frequency = 1.88 GHz Temp = +25 C Figure 20. PCS LO Leakage vs. Pout Over Temperature. Frequency = 1.88 GHz Vcc = 3.0 V -5 150 2.7V -10 3.0V 140 3.3V 130 Current (mA) LO Leakage (dBm) 5 Figure 18. PCS Image Rejection vs. Pout Over Temperature. Frequency = 1.88 GHz and Vcc = 3.0 V -20 Image Rejection (dBc) 4 Pout (dBm) -15 2.7V 3.0V 3.3V 120 110 100 -20 90 80 -25 0 2 4 6 8 10 0 2 4 6 Figure 21. PCS LO Leakage vs. Pout Over Vcc. Frequency = 1.88 GHz Temp = +25 C 10 Figure 22. PCS Current vs. Pout Over Vcc. Frequency = 1.88 GHz Vcc = 3.0 V Temp = +25 C Skyworks Solutions, Inc., Proprietary and Confidential 101253B 8 Pout (dBm) Pout (dBm) [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 19 JANUARY 31, 2003 Data Sheet I CX74002 140 130 120 130 3.0V 120 3.3V -30C 25C 80C 110 Iccc (mA) 110 Icc (mA) 2.7V 100 100 90 80 90 70 80 60 70 50 0.5 1.0 1.5 2.0 0.5 2.5 1.0 Figure 23. AMPS Current vs. VGA Control Voltage over Vcc @ 836.52 MHz +25C RFGC = 2.5V 2.5 110 2.7V 105 100 -30C 105 3.0V 25C 100 3.3V 95 80C 95 Icc (mA) Icc (mA) 2.0 Figure 24. AMPS Current vs. VGA Control Voltage over Temp @ 836.52 MHz 3V RFGC = 2.5V 110 90 85 90 85 80 80 75 75 70 70 0.5 1.0 1.5 2.0 2.5 0.5 1.0 VGA Control Voltage (V) 1.5 2.0 2.5 VGA Control Voltage (V) Figure 25. CELLULAR Current vs. VGA Control Voltage over Vcc @ 836.52 MHz +25C Figure 26. CELLULAR Current vs. VGA Control Voltage over Temp @ 836.52 MHz 3V. 125 130 120 125 120 115 115 110 110 105 105 Icc (mA) Icc (mA) 1.5 VGA Control Votlage (V) VGA Control Voltage (V) 100 95 3.0V 85 3.3V 95 90 2.7V 90 100 85 -30C 25C 80C 80 75 80 70 0.5 1.0 1.5 2.0 2.5 0.5 1.0 VGA Control Votlage (V) Figure 27. PCS Current vs. VGA Control Voltage over Vcc @ 1.88 GHz +25C 20 JANUARY 31, 2003 1.5 2.0 2.5 VGA Control Voltage (V) Figure 28. PCS Current vs. VGA Control Voltage over Temp @ 1.88 GHz 3V Skyworks Solutions, Inc., Proprietary and Confidential [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM 101253B [978] 241-7000 I FAX [978] 241-7906 I SALES@SKYWORKSINC.COM I WWW.SKYWORKSINC.COM Skyworks Solutions, Inc., Proprietary and Confidential U6 BBY53-03W C104 1000 pF C107 1000 pF PLL_VCC C110 33 pF R49 R55 120 K C1 C2 C C126 + 6.2 nF R64 4.7 k R63 4.7 k R59 10 C125 220 pF PLL_VCC IREF 11 10 9 C127 560 pF C128 220 pF POT_IREF DNI VCO_TANK- 8 VCO_TANK+ C115 1000 pF L30 (0603) 7.5 nH, 2 % IREF C102 1.0 F C103 6.2 pF R13 10 K 6 5 4 3 2 1 7 I- I+ U7 VGA_CTRL C121 33 pF C123 22 pF C122 4700 pF C119 4.7 F C120 1000 pF 12 L33 (0603) 27 nH, 2 % TCXO LOCK C178 22 pF C179 18 pF L32 (0603) 0.15 H C124 1.8 pF VGA_OUT- R60 1 K VCC_DIV C106 DNI R54 10 R53 10 K C101 1000 pF C108 BBY53-03W 6.2 pF 10 Q- Q+ VCC_IF VCC_IQ_MOD C113 DNI C117 1000 pF C116 1.0 F A1 A2 R52 10 K C108 1000 pF R39 5.1 R12 10 K R11 1K R38 0 C105 DNI R40 0 R41 NOTES: 1. COMPONENT VALUESMAYCHANGE 2. DNI = DO NOT INSTALL C109 33 pF L31 (0603) 7.5 nH, 2 % PLL_VCC C100 220 pF C137 1.0 F TX_VCC 0 R46 0 C112 1000 pF 0 R56 0 C114 DNI R50 R47 10 0 R51 R48 0 R57 C118 1.0 F R58 10 Anode 1 Cathode 1 BAND_SELECT TXI- TXI+ PLL_VCC TXQ- TXQ+ TX_VCC TX_AGC_ADJ Anode 2 Cathode 2 VGA_OUT+ VCC_VHF 40 VCC_CLK 39 13 TX_VCC + 38 VHF_CP C181 18 pF L33 (0603) 27 nH, 2 % C180 DNI L32(0603) 0.15 H L35 6.8 nH C132 1.2 pF L34 3.9 nH C182 33 pF CX74002 R129 0.01 F R67 1K 15 REF 16 LD_OUT C140 0.022 F C142 0.027 F + C131 4.7 F 17 UHF_CP 14 IF_IN+ 37 IF_IN- 36 VCC_MIXER_1 35 VCC_MIXER_2 TX_VCC C141 0.22 F 21 22 23 24 GND1 R83 50 DNI L20 3.3 nH CLK R87 100 OUT GND2 C149 4.7 F + R78 C150 1.0 F C143 1000 pF R90 DNI R86 0 R73 500 R77 500 R80 500 10 0 0 0 C148 0.1 F SYN_EN_TX C129 2.2 pF PLL_VCC L30 3.3 nH BAND_SELECT RX_LO SYN_CLK C164 DNI C156 DNI CELLULAR RF SAW U11 LA67F 1 6 IN 2 5 OUT 3 4 TX_VCC C173 33 pF PLL_VCC TX_VCC SYN_DATA R89 DNI L39 0 R79 0 TX_VCC L40 C145 0 0.1 F TX_VCC PA_ON C167 1.0 F R85 0 R82 2 K C109 1.5 pF BAND_SEL C136 33 pF C144 33 pF U8 VC-3R0A23-0967/1750 4 5 6 UHF VCO 2 C154 33 pF C160 15 pF LATCH_ENABLE DATA TX_PUNCTURE C168 33 pF VCC_CDMA_DRV 25 C177 8.2 pF R97 R94 C146 8.2 pF L37 27 nH L43 C174 4.7 nH DNI VCC_BIAS_DIFF_DRV C170 33 pF VCC_PCS_DIFF_DRV PCS_DRV_OUT_A R72 C147 8.2 pF L38 27 nH C138 33 F VCC_BIAS_SEC_DRV CDMA_DRV_OUT POWER 3 C135 33 pF C139 1800 F R69 1.8 K PCS_DRV_OUT_B R70 1.4 K TX_VCC 26 27 28 29 30 31 C134 DNI R68 10 CRL 1 50 ohms PLL_VCC R74 0 R75 2.74 K POT_CELL C158 8.2 pF 1 pF C133 33 pF L36 3.9 nH C130 33 pF 34 18 VCC_UHF POT_PCS 33 19 SYN_LO 32 20 101253B UHF_LO R61 10 C159 33 pF 1 2 3 6 5 4 OUT_2 OUT_1 R84 1 K C157 33 pF R81 1 K C152 33 pF 101253_004 C163 33 pF VCONT1 IN VCONT2 5 6 8 7 RF SWITCH CELL_OUT OUT1 GND OUT2 4 3 U9 UPG152TA IN_2 2 1 U10 B4214 PCS SPLIT-BAND FILTER IN_1 C155 33 pF C161 33 pF C153 33 pF TX_VCC PCS_OUT PCS_BAND_CNTL 1 PCS_BAND_CNTL2 Data Sheet I CX74002 Figure 29. CX74002 Schematic Diagram JANUARY 31, 2003 21 Pin #1 2.980 6.04 0.05 Solder Mask To metal pad edge Pin #1 0.500 Downset Paddle 6.04 0.05 Solder Mask Exposed Metal 5.200 R1.500 0.38 0.05 2.980 To metal pad edge Package Edge 0.040 REF 0.300 0.020 0.400 0.050 Detail A Top View Bottom View Detail A Mold 1.20 0.10 Substrate 0.30 0.05 All dimensions are in millimeters C1235 Figure 30. Package Dimensions - 40-Pin RFLGA (6 x 6 mm) Package 8.00 0.10 4.00 0.10 1.50 0.10 1.75 0.10 B A 5.50 0.10 Pin #1 indicator A 12.00 0.10 2.00 0.10 B 1.50 0.25 0.292 0.02 8o Max 7o Max 1.59 0.10 6.35 0.10 6.35 0.10 A B Notes: 1. Carrier tape: black conductive polycarbonate. 2. Cover tape material: transparent conductive PSA. 3. Cover tape size: 9.3 mm width 4. All dimensions are in millimeters Figure 31. Tape and Reel Dimensions - 40-Pin RFLGA (6 x 6) Package C1222 Ordering Information Model Name CX74002, Current Mode, Dual Band - Tri-Mode Manufacturing Part Number Product Revision CX74002-13 (c) 2002, 2003 Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks' Terms and Conditions of Sale for such products, Skyworks assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF SKYWORKSTM PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SKYWORKS FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS THAT MAY RESULT FROM THE USE OF THESE MATERIALS. SkyworksTM products are not intended for use in medical, lifesaving or life-sustaining applications. Skyworks' customers using or selling SkyworksTM products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. The following are trademarks of Skyworks Solutions, Inc.: SkyworksTM, the Skyworks symbol, SPRTM, Single Package RadioTM, and "Breakthrough Simplicity"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. RFLGATM is a trademark of Conexant Systems, Inc. Additional information, posted at www.skyworksinc.com, is incorporated by reference. General Information Skyworks Solutions, Inc. 20 Sylvan Rd. Woburn, MA 01801 www.skyworksinc.com