Symbol Min Typ Max Units
BV
DSS
30 V
V
DS
=30V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 1.5 1.95 2.5 V
I
D(ON)
140 A
6.6 8
T
J
=125°C 9.5 11.4
8.2 10.5 mΩ
g
FS
55 S
V
SD
0.72 1 V
I
S
35 A
C
iss
920 1150 1380 pF
C
oss
125 180 235 pF
C
rss
60 105 150 pF
R
g
0.55 1.1 1.65 Ω
Q
g
(10V) 16 20 24 nC
Q
g
(4.5V) 7.6 9.5 11.4 nC
Q
gs
2 2.7 3.2 nC
Q
gd
3 5 7 nC
t
D(on)
6.5 ns
t
r
2 ns
t
D(off)
17 ns
t
f
3.5 ns
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
Drain-Source Breakdown Voltage I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
µA
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
mΩ
On state drain current
V
GS
=4.5V, I
D
=20A
Forward Transconductance
Diode Forward Voltage
V
GS
=10V, V
DS
=15V, R
L
=0.75Ω,
R
GEN
=3Ω
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge
Reverse Transfer Capacitance V
GS
=0V, V
DS
=15V, f=1MHz
Turn-Off DelayTime
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=20A
SWITCHING PARAMETERS
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
V
GS
=10V, V
DS
=15V, I
D
=20A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
t
rr
78.7 10.5 ns
Q
rr
11 13.5 16 nC
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=500A/µs
I
F
=20A, dI/dt=500A/
s
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by package.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
I. The maximum current rating is limited by silicon
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