Rev. 1.3 October 2010 www.aosmd.com Page 1 of 19
AOZ1094
EZBuck™ 5A Simple Buck Regulator
LX
VIN
U1 VOUT
3.3V
VIN
Enable
FB
GND
EN
COMP
AGND
C1
22μF
C3
22μF
R1
R2
Rs
20Ω
RC
CC
C5
1000pF
Cs
1nF
L1 3.3μH
AOZ1094
C2
22μF
D1
General Description
The AOZ1094 is a high efficiency, simple to use, 5A buck
regulator. The AOZ1094 works from a 4.5V to 16V input
voltage range, and provides up to 5A of continuous
output current with an output voltage adjustable down
to 0.8V.
The AOZ1094 comes in SO-8 and DFN-8 packages
and is rated over a -40°C to +85°C ambient temperature
range.
Features
●4.5V to 16V operating input voltage range
●28mΩ internal PFET switch for high efficiency:
up to 95%
●Internal soft start
●Output voltage adjustable to 0.8V
●Built-in Overvoltage Protection (OVP)
– 18% OVP threshold
●5A continuous output current
●Fixed 500kHz PWM operation
●Cycle-by-cycle current limit
●Short-circuit protection
●Thermal shutdown
●Small size SO-8 and DFN-8 packages
Applications
●Point of load DC/DC conversion
●PCIe graphics cards
●Set top boxes
●DVD drives and HDD
●LCD panels
●Cable modems
●Telecom/networking/datacom equipment
Typical Application
Figure 1. 3.3V/5A Buck Down Regulator
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 2 of 19
Ordering Information
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Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
Pin Description
Part Number Ambient Temperature Range Package Environmental
AOZ1094AIL -40°C to +85°C SO-8 Green Product
AOZ1094DIL -40°C to +85°C DFN-8 Green Product
LX
LX
EN
COMP
1
2
3
4
VIN
PGND
AGND
FB
SO-8
(Top View)
8
7
6
5
VIN
PGND
AGND
FB
LX
LX
EN
COMP
4x5 DFN
(Top View)
LX
AGND
1
2
3
4
8
7
6
5
Pin Number Pin Name Pin Function
1V
IN Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
2 PGND Power ground. Electrically needs to be connected to AGND.
3 AGND Reference connection for controller section. Also used as thermal connection for controller
section. Electrically needs to be connected to PGND.
4 FB The FB pin is used to determine the output voltage via a resistor divider between the output
and GND.
5 COMP External loop compensation pin.
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 3 of 19
Block Diagram
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are required.
Human body model rating: 1.5kΩ in series with 100pF.
Recommended Operating Conditions
The device is not guaranteed to operate beyond the Maximum
Recommended Operating Conditions.
Note:
2. The value of ΘJA is measured with the device mounted on 1-in2 FR-4
board with 2oz. Copper, in a still air environment with TA = 25°C. The
6 EN The enable pin is active high. Connect EN pin to VIN if not used. Do not leave the EN pin floating.
7, 8 LX PWM output connection to inductor. Thermal connection for output stage.
Pin Number Pin Name Pin Function
500kHz/38kHz
Oscillator
AGND PGND
VIN
EN
FB
COMP
LX
OTP
Internal
+5V
ILimit
PWM
Control
Logic
5V LDO
Regulator
UVLO
& POR
Softstart
Reference
& Bias
0.8V
0.2V
Q1
PWM
Comp
Level
Shifter
+
FET
Driver
ISen
EAmp
+
–
+
–
0.96V
Frequency
Foldback
Comparator
+
–
Overvoltage
Protection
Comparator
+
–
+
–
+
Parameter Rating
Supply Voltage (VIN) 18V
LX to AGND -0.7V to VIN+0.3V
EN to AGND -0.3V to VIN+0.3V
FB to AGND -0.3V to 6V
COMP to AGND -0.3V to 6V
PGND to AGND -0.3V to +0.3V
Junction Temperature (TJ) +150°C
Storage Temperature (TS) -65°C to +150°C
ESD Rating(1) 2kV
Parameter Rating
Supply Voltage (VIN) 4.5V to 16V
Output Voltage Range 0.8V to VIN
Ambient Temperature (TA) -40°C to +85°C
Package Thermal Resistance (ΘJA)(2)
SO-8
DFN-8
82°C/W
50°C/W
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 4 of 19
value in any given application depends on the user's specific board
design.
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(3)
Note:
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Symbol Parameter Conditions Min. Typ. Max. Units
VIN Supply Voltage 4.5 16 V
VUVLO Input Under-Voltage Lockout Threshold VIN Rising
VIN Falling
4.00
3.70 V
IIN Supply Current (Quiescent) IOUT = 0, VFB = 1.2V, VEN > 1.2V 23mA
IOFF Shutdown Supply Current VEN = 0V 320µA
VFB Feedback Voltage 0.784 0.8 0.816 V
Load Regulation 0.5 %
Line Regulation 1%
IFB Feedback Voltage Input Current 200 nA
VEN EN Input Threshold Off Threshold
On Threshold 2.0
0.6 V
VHYS EN Input Hysteresis 100 mV
MODULATOR
fOFrequency 400 500 600 kHz
DMAX Maximum Duty Cycle 100 %
DMIN Minimum Duty Cycle 6%
Error Amplifier Voltage Gain 500 V / V
Error Amplifier Transconductance 200 µA / V
PROTECTION
ILIM Current Limit 6 8 A
Over-Temperature Shutdown Limit TJ Rising
TJ Falling
145
100 °C
VPR Output Over-voltage Protection Thresh-
old
Off Threshold
On Threshold
960
940 V
tSS Soft Start Interval 3ms
OUTPUT STAGE
High-Side Switch On-Resistance VIN = 12V
VIN = 5V
28
48
35
65 mΩ
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 5 of 19
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation Full Load (CCM) Operation
Full Load to Startup Light Load to Startup
50% to 100% Load Transient
2s/div2s/div
2ms/div2ms/div
200s/div
Vin
ripple
100mV/div
Vout ripple
200mV/div
Vin
5V/div
Vout
2V/div
lin
2A/div
lout
2A/div
Vin
5V/div
Vout
2V/div
lin
200mA/div
Vout
ripple
20mV/div
IL
2A/div
VLX
10V/div
Vin
ripple
200mV/div
Vout
ripple
20mV/div
IL
2A/div
VLX
10V/div
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 6 of 19
Typical Performance Characteristics (Continued)
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Full Load Turn Off Light Load Turn Off
Short Circuit Protection Short Circuit Recovery
2ms/div 2ms/div
100s/div 1ms/div
Vout
2V/div
IL
2A/div
Vout
2V/div
IL
2A/div
Vin
5V/div
Vout
2V/div
Iin
2A/div
Vin
5V/div
Vout
2V/div
Iin
2A/div
AOZ1094 Efficiency
Efficiency (VIN = 12V) vs. Load Current
50
60
70
80
90
1.8V OUTPUT
3.3V OUTPUT
5V OUTPUT
100
0 0.5 1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Load Current (A)
Efficieny (%)
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 7 of 19
Derating Curve at 5V Input
6
5
4
3
2
1
0
6
5
4
3
2
1
0
25 35 45 55 65 75 85
Ambient Temperature (T
A
)
Output Current (IO)
Output Current (IO)
Derating Curve at 12V Input
5.0V OUTPUT 3.3V OUTPUT
8.0V OUTPUT
5.0V OUTPUT
1.8V OUTPUT
1.8V OUTPUT
3.3V OUTPUT
25 35 45 55 65 75 85
Ambient Temperature (T
A
)
Thermal de-rating curves for SO-8 package part under typical input and output conditions. Circuit of Figure 1.
25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.
Derating Curve at 5V Input
6
5
4
3
2
1
0
6
5
4
3
2
1
0
25 35 45 55 65 75 85
Ambient Temperature (T
A
)
Output Current (IO)
Output Current (IO)
Derating Curve at 12V Input
1.8V OUTPUT
1.8V OUTPUT
8.0V OUTPUT
3.3V OUTPUT
3.3V OUTPUT
5.0V OUTPUT
5.0V OUTPUT
25 35 45 55 65 75 85
Ambient Temperature (T
A
)
Thermal de-rating curves for DFN-8 package part under typical input and output conditions. Circuit of Figure 1.
25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 8 of 19
Detailed Description
The AOZ1094 is a current-mode step down regulator
with integrated high side PMOS switch and a low side
freewheeling Schottky diode. It operates from a 4.5V to
16V input voltage range and supplies up to 5A of load
current. The duty cycle can be adjusted from 6% to 100%
allowing a wide range of output voltage. Features include
enable control, Power-On Reset, input under voltage
lockout, fixed internal soft-start and thermal shut down.
The AOZ1094 is available in SO-8 and thermally
enhanced DFN-8 package.
Enable and Soft Start
The AOZ1094 has internal soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.0V and voltage
on EN pin is HIGH. In soft start process, the output
voltage is ramped to regulation voltage in typically 3ms.
The 3ms soft start time is set internally.
The EN pin of the AOZ1094 is active high. Connect the
EN pin to VIN if enable function is not used. Pulling it to
ground will disable the AOZ1094. Do not leave it open.
The voltage on EN pin must be above 2.0V to enable
the AOZ1094. When voltage on EN pin falls below 0.6V,
the AOZ1094 is disabled. If an application circuit requires
the AOZ1094 to be disabled, an open drain or open
collector circuit should be used to interface to EN pin.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM).
The AOZ1094 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error
voltage, which shows on the COMP pin, is compared
against the current signal, which is sum of inductor
current signal and ramp compensation signal, at PWM
comparator input. If the current signal is less than the
error voltage, the internal high-side switch is on. The
inductor current flows from the input through the inductor
to the output. When the current signal exceeds the error
voltage, the high-side switch is off. The inductor current
is freewheeling through the external Schottky diode to
output.
The AOZ1094 uses a P-Channel MOSFET as the high
side switch. It saves the bootstrap capacitor normally
seen in a circuit which is using an NMOS switch. It allows
100% turn-on of the upper switch to achieve linear regu-
lation mode of operation. The minimum voltage drop from
VIN to VO is the load current times DC resistance of
MOSFET plus DC resistance of buck inductor. It can be
calculated by equation below:
where;
VO_MAX is the maximum output voltage,
VIN is the input voltage from 4.5V to 16V,
IO is the output current from 0A to 5A,
RDS(ON) is the on resistance of internal MOSFET, the value is
between 25mΩ and 55mΩ depending on input voltage and
junction temperature, and
Rinductor is the inductor DC resistance.
Switching Frequency
The AOZ1094 switching frequency is fixed and set by an
internal oscillator. The practical switching frequency
could range from 400kHz to 600kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the appli-
cation circuit shown in Figure 1. The resistor divider
network includes R1 and R2. Usually, a design is started
by picking a fixed R2 value and calculating the required
R1 with equation below
Some standard values of R1 and R2 for the most com-
monly used output voltage values are listed in Table 1.
Table 1.
VO (V) R1 (kΩ) R2 (kΩ)
0.8 1.0 Open
1.2 4.99 10
1.5 10 11.5
1.8 12.7 10.2
2.5 21.5 10
3.3 31.6 10
5.0 52.3 10
VO_MAX VIN IORDS ON()
Rinductor
+()×–=
VO0.8 1 R1
R2
-------
+
⎝⎠
⎜⎟
⎛⎞
×=
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 9 of 19
The combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
Protection Features
The AOZ1094 has multiple protection features to prevent
system circuit damage under abnormal conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1094 employs peak
current mode control, the COMP pin voltage is propor-
tional to the peak inductor current. The COMP pin
voltage is limited to be between 0.4V and 2.5V internally.
The peak inductor current is automatically limited cycle
by cycle.
The cycle by cycle current limit threshold is set between
6A and 8A. When the load current reaches the current
limit threshold, the cycle by cycle current limit circuit turns
off the high side switch immediately to terminate the
current duty cycle. The inductor current stop rising. The
cycle by cycle current limit protection directly limits
inductor peak current. The average inductor current is
also limited due to the limitation on peak inductor current.
When cycle by cycle current limit circuit is triggered, the
output voltage drops as the duty cycle decreasing.
The AOZ1094 has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to
the output voltage. Whenever FB pin voltage is below
0.2V, the short circuit protection circuit is triggered. As a
result, the converter is shut down and hiccups at a
frequency equals to 1/8 of normal switching frequency.
The converter will start up via a soft start once the short
circuit condition disappears. In short circuit protection
mode, the inductor average current is greatly reduced
because of the low hiccup frequency.
Over Voltage Protection (OVP)
AOZ1094 monitors FB for output over-voltage conditions.
When FB voltage exceeds 960mV, AOZ1094 immedi-
ately turns off the high-side switch to prevent output from
further rising. The high-side switch remains off until the
FB voltage falls below 860mV.
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage.
When the input voltage exceeds 4V, the converter starts
operation. When input voltage falls below 3.7V, the
converter will be shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
145°C. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100°C.
Application Information
The basic AOZ1094 application circuit is shown in
Figure 1. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the VIN pin and
PGND pin of the AOZ1094 to maintain steady input
voltage and filter out the pulsing input current. The
voltage rating of input capacitor must be greater than
maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
if let m equal the conversion ratio:
The relationship between the input capacitor RMS
current and voltage conversion ratio is calculated and
shown in Figure 2 on the next page. It can be seen that
when VO is half of VIN, CIN is under the worst current
stress. The worst current stress on CIN is 0.5 x IO.
ΔVIN
IO
fC
IN
×
----------------- 1VO
VIN
---------
–
⎝⎠
⎜⎟
⎛⎞
VO
VIN
---------
××=
ICIN_RMS IO
VO
VIN
---------1VO
VIN
---------
–
⎝⎠
⎜⎟
⎛⎞
×=
VO
VIN
---------m=
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 10 of 19
Figure 2. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN_RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the appli-
cation circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better temper-
ature and voltage characteristics. Note that the ripple
current rating from capacitor manufactures are based on
certain amount of life time. Further de-rating may be
necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is
The peak inductor current is:
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20%
to 30% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
Table 2 lists some inductors for typical output voltage
design.
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1
m
I
CIN_RMS
(m)
I
O
ΔIL
VO
fL×
-----------1VO
VIN
---------
–
⎝⎠
⎜⎟
⎛⎞
×=
ILpeak IO
ΔIL
2
--------
+=
Table 2. Typical Inductors
Vout L1 Manufacturer
5.0V Shielded, 4.7µH, MSS1278-472MLD Coilcraft
Shielded, 4.7µH, MSS1260-472MLD Coilcraft
3.3V Shielded, 3.3µH, VLF10045-3R3N6R9 TDK, tdk.com
Shielded, 3.3µH, DO1260-332NXD Coilcraft
Shielded, 3.3µH, CDRH105RNP-3R3NC Sumida sumida.com
Un-shielded, 3.3µH, 74456033 WURTH ELEKTRONIK, we-online.com
Shield, 3.3µH, ET553-3R3 ELYTONE
1.8V Shield, 2.2µH, ET553-2R2 ELYTONE
Un-shielded, 2.2µH, DO3316P-222MLD Coilcraft
Shielded, 2.2µH, MSS1260-222NXD Coilcraft
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 11 of 19
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck con-
verter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where,
CO is output capacitor value, and
ESRCO is the equivalent series resistance of the output
capacitor.
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum or aluminum
electrolytic capacitors are recommended to be used as
output capacitors.
In a buck converter, output capacitor current is contin-
uous. The RMS current of output capacitor is decided
by the peak to peak inductor ripple current. It can be
calculated by:
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
Schottky Diode Selection
The external freewheeling diode supplies the current to
the inductor when the high side PMOS switch is off. To
reduce the losses due to the forward voltage drop and
recovery of diode, Schottky diode is recommended to
use. The maximum reverse voltage rating of the chosen
Schottky diode should be greater than the maximum
input voltage, and the current rating should be greater
than the maximum load current.
Loop Compensation
The AOZ1094 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole and can
be calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
CO is the output filter capacitor,
RL is load resistor value, and
ESRCO is the equivalent series resistance of output capacitor.
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
and phase. Several different types of compensation
network can be used for the AOZ1094. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1094, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
where;
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V,
GVEA is the error amplifier voltage gain, which is 500 V/V, and
CC is compensation capacitor.
ΔVOΔILESRCO
1
8fC
O
××
-------------------------
+
⎝⎠
⎛⎞
×=
ΔVOΔIL
1
8fC
O
××
-------------------------
×=
ΔVOΔILESRCO
×=
ICO_RMS
ΔIL
12
----------
=
fP1
1
2πCORL
××
-----------------------------------
=
fZ1
1
2πCOESRCO
××
------------------------------------------------
=
fP2
GEA
2πCCGVEA
××
-------------------------------------------
=
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 12 of 19
The zero given by the external compensation network,
capacitor CC and resistor RC, is located at:
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high because of system stability
concern. When designing the compensation loop,
converter stability under all line and load condition must
be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. AOZ1094
operates at a fixed switching frequency range from
350kHz to 600kHz. It is recommended to choose a
crossover frequency less than 30kHz.
The strategy for choosing RC and CC is to set the cross
over frequency with RC and set the compensator zero
with CC. Using selected crossover frequency, fC, to
calculate RC:
where;
fC is the desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V, and
GCS is the current sense circuit transconductance, which is
9.02 A/V.
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected
crossover frequency. CC can is selected by:
The previous equation can also be simplified to:
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Table 3 lists the values for typical output voltage design
when output is 10µF ceramics capacitor and 100µF
tantalum capacitor.
Table 3.
Thermal Management and Layout
Consideration
In the AOZ1094 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the
LX pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of Schottky
diode, to the cathode of Schottky diode. Current flows in
the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1094.
In the AOZ1094 buck regulator circuit, the major power
dissipating components are the AOZ1094, the Schottky
diode and output inductor. The total power dissipation of
converter circuit can be measured by input power minus
output power:
The power dissipation in Schottky can be approximately
calculated as:
where;
VFW_Schottky is the Schottky diode forward voltage drop.
fZ2
1
2πCCRC
××
-----------------------------------
=
fC30kHz=
RCfC
VO
VFB
---------- 2πCO
×
GEA GCS
×
------------------------------
××=
CC
1.5
2πRCfP1
××
-----------------------------------
=
CC
CORL
×
RC
---------------------
=
VOUT L1 RCCC
1.8V 2.2µH 51.1kΩ 1.0nF
3.3V 3.3µH 20kΩ 1.0nF
5V 5.6µH 31.6kΩ1.0nF
8V 10µH 49.9kΩ 1.0nF
Ptotal_loss VIN IIN VOIO
×–×=
Pdiode_loss IO1D–()VFW_Schottky
××=
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 13 of 19
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor:
The actual junction temperature can be calculated with
power dissipation in the AOZ1094 and thermal
impedance from junction to ambient:
The maximum junction temperature of AOZ1094 is
145°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1094 under different ambient
temperature.
The thermal performance of the AOZ1094 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
The AOZ1094A is standard SO-8 package. The
AOZ1094D is a thermally enhanced DFN package, which
utilizes the exposed thermal pad at the bottom to spread
heat through PCB metal. Several layout tips are listed
below for the best electric and thermal performance.
Figure 3 illustrates a PCB layout example of AOZ1094A.
Figure 4 illustrates a PCB layout example of AOZ1094D.
1. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to
the PGND pin and the VIN pin to help thermal
dissipation.
2. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
3. A ground plane is preferred. If a ground plane is
not used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
4. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
6. The two LX pins are connected to internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
7. Keep sensitive signal trace far away form the LX
pins.
8. For the DFN package, thermal pad must be soldered
to the PCB metal. When multiple layer PCB is used,
4 to 6 thermal vias should be placed on the thermal
pad and connected to PCB metal on other layers to
help thermal dissipation.
Figure 3. AOZ1094 (SO-8) PCB Layout
Figure 4. AOZ1094 (DFN-8) PCB Layout
Pinductor_loss IO2Rinductor 1.1××=
Tjunction Ptotal_loss Pinductor_loss
–()Θ
JA
×=
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 14 of 19
Package Dimensions, SO-8L
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Symbols
A
A1
A2
b
c
D
E1
e
E
h
L
θ
Dimensions in millimeters
Min.
1.35
0.10
1.25
0.31
0.17
4.80
3.80
5.80
0.25
0.40
0°
D
C
L
h x 45°
7° (4x)
b
2.20
5.74
0.80
Unit: mm
1.27
A1
A2 A
0.1
θ
Gauge Plane Seating Plane
0.25
e
8
1
E1E
Nom.
1.65
—
1.50
—
—
4.90
3.90
1.27 BSC
6.00
—
—
—
Max.
1.75
0.25
1.65
0.51
0.25
5.00
4.00
6.20
0.50
1.27
8°
Symbols
A
A1
A2
b
c
D
E1
e
E
h
L
θ
Dimensions in inches
Min.
0.053
0.004
0.049
0.012
0.007
0.189
0.150
0.228
0.010
0.016
0°
Nom.
0.065
—
0.059
—
—
0.193
0.154
0.050 BSC
0.236
—
—
—
Max.
0.069
0.010
0.065
0.020
0.010
0.197
0.157
0.244
0.020
0.050
8°
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 15 of 19
Tape and Reel Dimensions, SO-8L
SO-8 Carrier Tape
SO-8 Reel
SO-8 Tape
Leader/Trailer
& Orientation
Tape Size
12mm
Reel Size
ø330
M
ø330.00
±0.50
Package
SO-8
(12mm)
A0
6.40
±0.10
B0
5.20
±0.10
K0
2.10
±0.10
D0
1.60
±0.10
D1
1.50
±0.10
E
12.00
±0.10
E1
1.75
±0.10
E2
5.50
±0.10
P0
8.00
±0.10
P1
4.00
±0.10
P2
2.00
±0.10
T
0.25
±0.10
N
ø97.00
±0.10
K0
Unit: mm
B0
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
A0
P1
P2
See Note 5
See Note 3
See Note 3
Feeding Direction
P0
E2
E1
E
D0
T
D1
W
13.00
±0.30
W1
17.40
±1.00
H
ø13.00
+0.50/-0.20
K
10.60
S
2.00
±0.50
G
—
R
—
V
—
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 16 of 19
Package Dimensions, DFN 5x4
D
Index Area
(D/2
x
E/2)
L
R
1
E2 E3
L1
D2 D3
aaa
C
ccc
C
ddd
C
bbb
aaa
C
D/2
E/2
A3
b
A1
2.125 1.775
0.6
2.2
0.950.5
0.8
2.7
Unit: mm
A
Ae
B
E
C
CAB
Seating
Plane
Pin #1 IDA
Notes:
1. Dimensions and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters.
3. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SP-002.
4. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the
optional radius on the other end of the terminal, the dimension b should not be measured in that radius area.
5. Coplanarity applies to the terminals and all other bottom surface metallization.
6. Drawing shown are for illustration only.
Symbols
A
A1
A3
b
D
D2
D3
E
E2
E3
e
L
L1
R
aaa
bbb
ccc
ddd
Dimensions in millimeters
Recommended Land Pattern
Min.
0.80
0.00
0.35
1.975
1.625
2.500
2.050
0.600
0.400
–
–
–
–
Nom.
0.90
0.02
0.20 REF
0.40
5.00 BSC
2.125
1.775
4.00 BSC
2.650
2.200
0.95 BSC
0.700
0.500
0.30 REF
0.15
0.10
0.10
0.08
Max.
1.00
0.05
0.45
2.225
1.875
2.750
2.300
0.800
0.600
–
–
–
–
Symbols
A
A1
A3
b
D
D2
D3
E
E2
E3
e
L
L1
R
aaa
bbb
ccc
ddd
Dimensions in inches
Min.
0.031
0.000
0.014
0.078
0.064
0.098
0.081
0.024
0.016
–
–
–
–
Nom.
0.035
0.001
0.008 REF
0.016
0.197 BSC
0.084
0.070
0.157 BSC
0.104
0.087
0.037 BSC
0.028
0.020
0.012 REF
0.006
0.004
0.004
0.003
Max.
0.039
0.002
0.018
0.088
0.074
0.108
0.091
0.031
0.024
–
–
–
–
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 17 of 19
Tape Dimensions, DFN 5x4
R0.40
P0
K0 A0
E
E2 D0
E1
D1
B0
Package
DFN 5x4
(12 mm)
A0 B0 K0 E E1 E2D0 D1 P0 P1 P2 T
5.30
±0.10 ±0.10
4.30
±0.10
1.20 Min.
1.50 1.50 12.00
±0.10
1.75
±0.10
5.50
±0.10
8.00
±0.20
4.00
±0.10
2.00
±0.05
0.30
Unit: mm
T
Typ.
0.20
Feeding
Direction
Tape
Leader/Trailer and Orientation
±0.30
+0.10 / –0
Trailer Tape
(300mm Min.)
Components Tape
Orientation in Pocket
Leader Tape
(500mm Min.)
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 18 of 19
Reel Dimensions, DFN 5x4
VIEW: C
C
0.05
3-1.8
ø96±0.2
6.45±0.05
3-ø2.9±0.05
3-ø1/8"
3-ø1/4"
8.9±0.1
11.90
14 REF
1.8
5.0
12 REF
41.5 REF
43.00
44.5±0.1
2.00
6.50
10.0
10.71
10°
3-ø3/16"
R48 REF
ø86.0±0.1
2.20
6.2
ø13.00
ø21.20
ø17.0
R1.10
R3.10
2.00
3.3
4.0
6.10
0.80
3.00
8.00
+0.05
0.00
R0.5
1.80
2.5
38°
44.5±0.1
46.0±0.1
8.0±0.1
40°
6°
3-ø3/16"
R3.95
6.50
ø90.00
6.0
1.8
1.8
R1
8.00
0.00
-0.05
N=ø100±2
A
A
A
R121
R127
R159
R6
R55
P
B
W1
M
II I
I
6.0±1
R1
Zoom In
III
Zoom In
II
Zoom In
A
AOZ1094
Rev. 1.3 October 2010 www.aosmd.com Page 19 of 19
AOZ1094AIL Part Marking
AOZ1094DIL Part Marking
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This data sheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without not ice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Z1094AI
FAY Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
SO-8 Green Package
WLT
Underscore denotes
Green Product
DFN-8 Green Package
Z1094DI
FAYWLT
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
Underscore denotes
Green Product
