Features lected Automatic power-down when dese- Transparent write (7CI61A) High speed 15 ns tay Low active power 550 mW Low standby power 220mW CMOS for optimum speed/power TTL-compatible inputs and outputs CYPRESS SEMICONDUCTOR CY7C161A CY7C162A e Capable of withstanding greater than 2001V electrostatic discharge. Functional Description The CY7C161A and CY7C 162A are high- performance CMOS static RAMs orga- nizes as 16,384 by 4 bits with separate I/O. Easy memory expansion is provided by ac- tive LOW chip enables (CE,, CE,) and three-state drivers. They have an automat- ic power-down feature, reducing the power consumption by 60% when deselected. Writing to the device is accomplished when the chip enable (CE,, CE2) and write en- able (WE) inputs are both LOW. Data on the four input pins (Ip through I;) is written 16,384 x 4 Static R/W RAM Separate I/O into the memary location specified on the address pins (Ag through Aj3). Reading the device is accomplished by tak- ing the chip enables (CE;, CE2) LOW while write enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the four data output pins. The output pins stay in high-impedance state when write enable (WE) is LOW (7C162A only). or one of the chip enables (CE,, CE.) are HIGH. A die coat is used to insure alpha immunity. ROW DECODER INPUT BUFFER Logic Block Diagram SENSE AMPS POWER Pin Configurations DIP fe Top View 7C181A Oc U7 re 1620 220 8 a1 Lcc Top View 8 w a agve 23 7CIGIA 7C1G2A COLUMN DECODER DOWN TE, Cleve CE, LE EEE We OE 1. C1BIA-1 Selection Guide TCIG1A-15 TCI6LA-20 7C161A-25 TC161A-35 7C1L61A-45 TC162A-15 7C162A-20 FC162A-25 7C162A-35 7C 1624-45 Maximum Access Time (ns) 15 20 25 35 45 Maximum Operating} Commercial 115 100 100 100 100 Current (mA) Military 100 100 100 100 Maximum Standby | Commercial 40/20 20 30/20 30/20 30/20 Current (mA) Military 40/20 40/20 30/20 30/20 2-197CY7CI61A SS, ys. SS SS Sar & SEMICONDUCTOR Maximum Ratings (Above which the useful life may be impaired. For user guidelines, nat tested.) Storage Temperature .................. -65C to +150C Static Discharge Voltage ........-.......0...02... > 2001V Ambient Temperature with (per MIL-STD-883, Method 3015) Power Applied ...............2..00-005 - 55C to + 125C Latch-Up Current..........0....0.0-2.00.0 0200s >200 mA Supply Voltage to Ground Potential : (Pin 24 to Pin 12) .....0.0.0.esceeeeeeeees -05Vto+7.0v Operating Range DC Voltage Applied to Outputs Ambient in High Z State ...... 0.0... eee eee ee -0.5V to +7.0V Range Temperature Vee DC Input Voltage ..............-..-2200. -3.0V to + 7.0V Commercial 0C to + 70C $V + 10% Output Current into Outputs (Low) ................. 20 mA Military!!! ~5Cto + 125C SV + 10% Electrical Characteristics Over the Operating Range?! FCIGIA-15 | 7C1G1A-20 | 7CIGLA-25 | 7CI61A-35,45 7C162A-15 | 7C162A-20 | 7C162A-25 | 7C162A-35,45 Parameters Description Test Conditions Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Units Vou Output HIGH Voltage | Vcc = Min..lon = -40mA] 2.4 2.4 2.4 2.4 Vv Voi Output LOW Voltage | Vec = Min., Io. = 8.0mA 0.4 0.4 0.4 0.4 Vv Vin Input HIGH Voltage 2.2 | Veco | 2.2 | Vee | 2.2 | Vee 2.2 Vee Vv Vi Input LOW Voltage!) -3.0 | 08 | -3.0 |] 08 | -3.0 |] 08 | -3.0 0.8 Vv Ix Input Load Current |] GND < Vi -< Vcc -10}+10})]-10] +10} -10 | +10; -10 +10 BA Output Leakage GND < V)< Vec. _ loz Current Output Disabled -10 | +10 | - 10 | +10 | -10 | +10 10 +10 BA Output Short Vcc = Max, _ . _ : Tos Circuit Current | Vour = GND 350 350 350 ~350 | mA Ice Vee Operating Veco = Max. Com} 115 100 100 100 mA Supply Current Iour = 0 mA Mil 100 100 100 Isp: Automatic CE Max. Vcc. Com! 40 40 30 30 mA Power-Down Current |CE > Vin, Min. Duty : Cycle = 100% Mil 40 40 30 I Automatic CE Max. Vee, Com! 20 20 20 20 | mA se Power-Down Current |CE; > Vec - 03V, Vin = Vee - 0.3V . or Viy < 03V Mil 20 20 20 Capacitance!) Parameters Description Test Conditions Max. Units Cin Input Capacitance Ta = 25C, f = 1 MHz, 10 pF Cour Output Capacitance Vec = 5.0V 10 pF Notes: 1. Ta is the instant on case temperature. 4. Not more than 1 output should be shorted at one time. Duration of 2. See the last page of this specification for Gcoup A subgroup testing information. 3. Vir min. = -3.0V for pulse durations less than 30 ns. AC Test Loads and Waveforms R1 4810. 5Y bv rr, OUTPUT! ~T t 30 pF A2 L 256.2 I INCLUDING INCLUDING JIG AND = JIG AND = SCOPE SCOPE (a) _ Equivalent to: THEVENIN EQUIVALENT 1679. OUTPUT 1.73V $$$ ve Tf 5 pF 14810. Ra 256. the short circuit should not exceed 30 seconds. Tested initially and afler any design or process changes that may affect these parameters. ALL INPUT PULSES CIBIA-4 2-198 < 57s CIBIA-5= CY7CI61A S35 foes CY7C162A Se SEMICONDUCTOR Switching Characteristics Over the Operating Range!?*7! TC161A-15 7C161A-20 7C 1614-25 7C161A-35 TC161A-45 7C162A-15 7162A-20 7C162A-25 7C 162A-35 7C162A-45 Parameters Description Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Min. | Max. | Units READ CYCLE tre Read Cycle Time 15 20 25 35 45 ns taa Address to Data Valid 1S 20 25 35 45 ns Output Hold from tons Address Change 3 5 5 5 5 ns tace CE LOW to Data Valid 15 20 25 35 45 ns tooe OE LOW to Data Valid 10 10 12 15 20 ns tiz0e OE LOW to LOW Z 3 3 3 3 3 ns tHzoE OE HIGH to HIGH Z 8 8 10 12 15 ns tizce CE LOW to Low Zi 5 5 5 5 5 ns tuzce Fgh 2) 8 8 10 15 1s | ns teu CE LOW to Power-Up 0 0 0 0 0 nis tep ne ene 15 20 20 20 25 | ns WRITE CYCLE"! twe Write Cycle Time 15 20 20 25 40 ns tscr CE LOW to Write End 12 15 20 25 30 ns taw piidress Set-Up to 12 15 20 25 30 ns tra press Fold from 0 0 0 0 0 ns Address Set-Up to Write tsa Start 0 0 0 0 0 ns trwe WE Pulse Width 12 1S 15 20 20 ns tso Raia Setup to 10 10 10 15 15 ns tuo yan oe from 0 0 0 0 0 ns WE HIGH to tizwe I Zi8l (7C162A) 5 5 5 5 5 ns WE LOW t 'hzwe High 7 (7C162A) 7 7 7 10 15 ns WE LOW to < < awe Data Valid (7CI6LA) 1s 20 25 30 35 | ns Data Valid to ~ tapv Output Valid (7C161A) Is 70 0 30 3 | ns Notes: 6. Test conditions assume signal transition time of 5 nsor less, timingref- 10. The infernal write time of the memory is defined by the overlap of CE, erence levels of t.5V, input pulse levels of 0 10 3.0V, and output load- LOW, CE2 LOW, and WE LOW. Both signals must be LOW to initiate ing of the specified Io, lon and 30-pF load capacitance. a write and either signal can terminate a write by going HIGH. The 7. BothCE, and CE; are represented by CE in the Switching Character- data input set-up and hold timing should be referenced to the rising istics and Waveforms sections. edge of the signal that terminates the write. 8. At any given temperature and voltage condition, tyz is less than tpz LL. WE is HIGH forread cycle, for any given device. 12. Device is continuously selected. CE). CE, = Vin. 9. tuzce and tyzwe are specified with CL = 5 pF asin part(b)of AC 13. Address valid prior to or coincident with CE,, CE; transition LOW. Test Loads and Waveforms. Transition is measured +500 mV from 14. If CE goes HIGH simultaneously with WE ELIGH, the output remains steady state voltage. 2-199 in a high-impedance state (7C162A only).a CY7C161A sees CY7C162A Se & SEMICONDUCTOR i) Switching Waveforms'! Read Cycle No. 1!) 121 ADDRESS x tac foHa DATA OUT PREVIOUS DATA VALID Pl] EX XX DATA VALID CI6IA-6 Read Cycle No. 2!'1. 3) CE OE tbo 20 HIGH IMPEDANCE hace HIGH IMPEDANCE DATA OUT DATA VALID toy Voc Icc SUPPLY 50% 50% CURRENT ISB Cle1A-7 Write Cycle No. 1 (WE Controlled)!" ADDRESS CE tewe tup tsp DATA IN DATA-IN VALID tawe HIGH IMPEDANCE tuzwe DATA OUT DATA UNDEFINED (7C162A) DATA OUT (7C161A) DATA UNDEFINED DATA VALID CIGtA-8 2-200CY7CI61A CY7C162A Switching Waveforms (continued) Controlled)!! 41 Write Cycle No. 2 ( ADDRESS CE tsp DATA IN DATA-IN VALID HIGH IMPEDANCE DATA OUT (7C162A) DATA UNDEFINED DATA OUT DATA UNDEFINED (7C161A) Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE vs. SUPPLY VOLTAGE 1.4 1.2 B12 3 10 ; Q 9 cc = 1 = 08 N 8 N 0.6 a a < <x z z 0.4 2 o4 g 02 Isp 0.2 0.0 0.0 40 45 5.0 55 6.0 -55 25 125 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE vs. AMBIENT TEMPERATURE 1.4 16 1.3 1.4 3 = QO 12 a "| N q 12 =z 144 = ra = x 5 1.0 2 10 9 | Veo = 5.0V 09 0.8 0.8 0.6 40 45 5.0 5.5 6.0 -55 25 125 AMBIENT TEMPERATURE (C) SUPPLY VOLTAGE (V) 2-201 DATA VALID CI61A-9 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 8 8 OUTPUT SOURCE CURRENT (mA) co B B 8B BS 0 1.0 2.0 3.0 40 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE = S Oo 120 8 20 0 0.0 OUTPUT SINK CURRENT (mA) 40 3.0 OUTPUT VOLTAGE (V) 1.0 2.0=/ SEMICONDUCTOR Typical DC and AC Characteristics (continued) TYPICAL POWER-ON CURRENT CY7CI161A CY7C162A vs. SUPPLY VOLTAGE NORMALIZED leg or = NN w an a an oa an a 0.0 Bit Map QUIPUTS | Si29 ot COLUMNS! 00 10 20 30 40 SUPPLY VOLTAGE (V) foley S23 ors O12 7B PLpae 4 ESET ema abitt 0h 30.0 25.0 nN 2 o DELTA taa (ns) a o 10.0 5.0 0.0 5.0 0 01230 0423 ys 8 | 46 a3 Fae 15 16 17 18 19 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 200 400 600 800 1000 CAPACITANCE (pF) NORMALIZED Ic vs. CYCLE TIME 1.25 T Voc = 5.0V Ta = 25C 8 Voc = 0.5V Q 1.00 N a S a ec 9 0.75 aT 0.50 10 20 30 40 CYCLE FREQUENCY (MHz) Address Designators Address Address Pin Name Function Number AS X3 1 A6 X4 2 A7 X5 3 A8 X6 4 Ad X7 5 Alo Yo 6 All Yl 7 Al2 YS 8 Al3 Y4 9 AO Y3 23 Al Y2 24 A2 X0 25 A3 X1 26 A4 X2 27 2-202SS. CY7C161A =~ SS J Sres CY7C162A See & = SEMICONDUCTOR Ordering Information Speed Package | Operating Speed Package | Operating (ns) Ordering Code Type Range (ns) Ordering Code Type Range 15 CY7C161A-15PC P21 Commercial 15 CY7C162A-15PC P21 Commercial CY7CI6LA-ISVC V21 CY7C162A-1SVC V21 CY7C161A-15DC D22 CY7C162A-15DC D22 CY7C161A-15LC LS4 CY7C162A-15LC L54 20 CY7C161A-20PC P21 Commercial 20 CY7C162A4-20PC P21 Commercial CY7TCIG1A-20VC V2i1 CY7C162A-20VC V21 CY7C16LA-20DC D22 CY7C162A-20DC D22 CY7C161A-20LC L54 CY7C162A-20LC L54 CY7C161A-20DMB D22 Military CY7C162A-20DMB D22 Military CY7TC161A-20LMB Ls4 CY7C162A-20LMB Ls4 25 CY7C161A~-25PC P21 Commercial CY7C162A-20KMB K74 CY7C161LA-25VC V21 25 CY7C162A-25PC P21 Commercial CY7C161A-25DC D22 CY7C162A-25VC V21 CY7C161A-25LC L54 CY7C162A-25DC D22 CY7C161A-25DMB D22 Military CY7C161A-25LC LS4 CY7C161A-25LMB L54 CY7C162A-25DMB D22 Military 35 CY7C161A-35PC P21 Commercial CY7C162A-25LMB L54 CY7C161A-35VC V21 CY7C162A-25KMB K74 CY7C161A-35DC D22 35 CY7C 162A-35PC P21 Commercial CY7C161A-35LC LS4 CY7C162A-35VC V21 CY7C161A-35DMB D22 Military CY7C162A-35DC D22 CY7C161A-35LMB Ls4 CY7C162A-35LC L354 45 CY7C161A-45PC P21 Commercial CY7C162A-35DMB D22 Military CY7C161A-45VC V21 CY7C162A-35LMB L54 CY7C161A-45DC D22 CY7C162A-35KMB K74 CY7C161A-45LC Ls4 45 CY7C162A-45PC P21 Commercial CY7C161A-45DMB D22 Military CY7C162A-45VC V21 CY7C161A-45LMB L54 CY7C162A-45DC D22 CY7C162A-45LC L354 CY7C162A-45DMB D22 Military CY7C162A-45LMB L54 CY7C162A-45KMB K74 2-203aes ee 4 Sr = SEMICONDUCTOR MILITARY SPECIFICATIONS CY7CI161A CY7C162A Group A Subgroup Testing DC Characteristics Parameters Subgroups Vou 1, 2,3 Vor 1, 2,3 Vin 1, 2,3 Vu Max. 1, 2,3 Ix 1, 2,3 loz 1, 2,3 Tos 1, 2,3 lee 1,2,3 Ist 1, 2,3 Isp2 1,2.3 Switching Characteristics Parameters Subgroups READ CYCLE tre 7, 8, 9, 10, 11 faa 7, 8,9, 10, 11 tora 7, 8,9, 10, 11 tack 7, 8,9, 10, 11 tpoE 7, 8,9, 10, 11 WRITE CYCLE twe 7, 8.9, 10, 11 tsce 7, 8,9, 10, 11 taw 7, 8,9, 10, 11 CHa 7, 8,9, 10, 11 fsa 7, 8, 9. 10, 11 tepwe 7, 8,9, 10. 11 tsp 7, 8, 9, 10, 11 tub 7, 8,9, 10, 11 tawell) 7, 8,9, 10, 11 tapy! 7, 8,9, 10, 11 Notes: 15. 7C161A only. Document #: 38-00116 2-204