'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
REV. D
M114163
DAT-31575-PN+
071025
Page 1 of 12
Product Features
• Dual Supply Voltage: VDD=+3V, VSS=-3V
• Immune to latch up
• Excellent accuracy, 0.1 dB Typ
• Parallel control interface
• Fast switching control frequency, 1 MHz Typ.
• Low Insertion Loss
• High IP3, +52 dBm Typ.
• Very low DC power consumption
• Excellent return loss, 20 dB Typ
• Small size 4.0 x 4.0 mm
Typical Applications
• Base Station Infrastructure
• Portable Wireless
• CATV & DBS
• MMDS & Wireless LAN
• Wireless Local Loop
• UNII & Hiper LAN
• Power amplifier distortion canceling loops
General Description
The DAT-31575-PN+ is a 75Ω RF digital step attenuator that offers an attenuation range up to 31.5 dB in
0.5 dB steps. The control is a 6-bit parallel interface, operating on dual supply voltage: VDD=+3V, VSS=-3V.
The DAT-31575-PN+ is produced using a unique CMOS process on silicon, offering the performance of
GaAs, with the advantages of conventional CMOS devices.
Digital Step Attenuator
31.5 dB, 0.5 dB Step
6 Bit, Parallel Control Interface, Dual Supply Voltage
75Ω DC-2000 MHz
Simplified Schematic
RF Input 16dB 8dB 4dB 2dB 1dB
Parallel Control
Internal Control Logic Interface
Latch Enable
0.5dB RF Out
DAT-31575-PN+
+ RoHS compliant in accordance
with EU Directive (2002/95/EC)
The +Suffix has been added in order to identify RoHS
Compliance. See our web site for RoHS Compliance
methodologies and qualifications.
Page 2 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
RF Electrical Specifications, DC-2000 MHz, TAMB=25°C, VDD=+3V, VSS=-3V
Absolute Maximum Ratings
Parameter Ratings
Operating Temperature -40°C to 85°C
Storage Temperature -55°C to 100°C
VDD -0.3V Min., 4V Max.
VSS -4V Min., 0.3V Max.
Voltage on any input -0.3V Min., VDD+0.3V Max.
ESD, HBM 500V
ESD, MM 100V
Input Power +24dBm
Parameter Min. Typ. Max. Units
V
DD
, Supply Voltage 2.7 3 3.3 V
V
SS
, Supply Voltage -3.3 -3 -2.7 V
I
DD
(I
SS
), Supply Current — — 100 μA
Control Input Low — — 0.3xV
DD
V
Control Input High 0.7xV
DD
——V
Control Current — — 1 μA
DC Electrical Specifications
Parameter Min. Typ. Max. Units
Switching Speed, 50% Control to 0.5dB
of Attenuation Value — 1.0 —
μ
Sec
Switching Control Frequency — 1.0 — MHz
Switching Specifications
Parameter Freq. Range
(GHz) Min. Typ. Max. Units
Accuracy @ 0.5 dB Attenuation Setting DC-1.2 — 0.03 0.17 dB
1.2-2.0 — 0.05 0.18 dB
Accuracy @ 1 dB Attenuation Setting DC-1.2 — 0.03 0.24 dB
1.2-2.0 — 0.1 0.25 dB
Accuracy @ 2 dB Attenuation Setting DC-1.2 — 0.07 0.28 dB
1.2-2.0 — 0.15 0.3 dB
Accuracy @ 4 dB Attenuation Setting DC-1.2 — 0.05 0.36 dB
1.2-2.0 — 0.15 0.4 dB
Accuracy @ 8 dB Attenuation Setting DC-1.2 — 0.1 0.52 dB
1.2-2.0 — 0.24 0.6 dB
Accuracy @ 16 dB Attenuation Setting DC-1.2 — 0.23 0.84 dB
1.2-2.0 — 0.8 1.0 dB
Insertion Loss(note1) @ all attenuator set to 0dB DC-1.2 — 1.2 1.8 dB
1.2-2.0 — 1.6 2.1 dB
Input IP3(note 2) (at Min. and Max. Attenuation) DC-2.0 — +52 — dBm
Input Power @ 0.2dB Compression (note 2)
(at Min. and Max. Attenuation) DC-2.0 — +24 — dBm
VSWR DC-1.2 — 1.6 2.0 —
1.2-2.0 — 1.7 2.0 —
2. Input IP3 and 1dB compression degrades below 1 MHz
Notes:
1. I. Loss values are de-embedded from test board Loss (test board’s Insertion Loss: 0.10dB @100MHz, 0.40dB @1200MHz,
0.55dB @2000MHz, 0.75dB @4000MHz)
Page 3 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Function Pin
Number Description
C16 1 Control for Attenuation bit, 16dB (Note 3)
RF in 2 RF in port (Note 1)
N/C 3 Not connected (Note 4)
GND 4 Ground connection
LE 5 Latch Enable Input (Note 2)
VDD 6 Positive Supply Voltage
PUP1 7 Power-up selection bit
PUP2 8 Power-up selection bit
VDD 9 Positive Supply Voltage
GND 10 Ground connection
GND 11 Ground connection
VSS 12 Negative Supply Voltage
GND 13 Ground Connection
RF out 14 RF out port (Note 1)
C8 15 Control for attenuation bit, 8 dB
C4 16 Control for attenuation bit, 4 dB
C2 17 Control for attenuation bit, 2 dB
GND 18 Ground Connection
C1 19 Control for attenuation bit, 1 dB
C0.5 20 Control for attenuation bit, 0.5 dB
GND Paddle Paddle ground (Note 5)
Notes:
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.
2. Latch Enable (LE) has an internal 100KΩ resistor to VDD.
3. Place a 10KΩ resistor in series, as close to pin as possible to avoid freq. resonance.
4. Place a shunt 10KΩ resistor to GND.
5. The exposed solder pad on the bottom of the package (See Pin configuration) must
be grounded for proper device operation.
Pin Description
2x2mm
Paddle
ground
1
2
3
4
5
6
7
8
9
10
13
11
12
14
15
20
19
18
17
16
GND
GND
VSS
RFout
C8
N/C
LE
GND
RFin
C16
VDD
PUP1
PUP2
GND
VDD
GND
C1
C0.5
C4
C2
Pin Configuration (Top View)
Page 4 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Typical Performance Curves
ATTENUATION (0.5dB) @ +25°C, +85°C, -45°C
0
0.2
0.4
0.6
0.8
1
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
ATTENUATION (1dB) @ +25°C, +85°C, -45°C
0.4
0.6
0.8
1
1.2
1.4
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
ATTENUATION (2dB) @ +25°C, +85°C, -45°C
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
ATTENUATION (4dB) @ +25°C, +85°C, -45°C
3
3.2
3.4
3.6
3.8
4
4.2
4.4
4.6
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
ATTENUATION (8dB) @ +25°C, +85°C, -45°C
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
8.2
8.4
8.6
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
INSERTION LOSS (Ref) @ +25°C, +85°C, -45°C
0
1
2
3
4
5
6
7
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
+85°C
+25°C
-45°C
Page 5 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Typical Performance Curves
ATTENUATION (16dB) @ +25°C, +85°C, -45°C
12
12.5
13
13.5
14
14.5
15
15.5
16
16.5
17
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
RETURN LOSS IN S11 (Ref) @ +25°C, +85°C, -45°C
0
10
20
30
40
50
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
RETURN LOSS OUT S22 (Ref) @ +25°C, +85°C, -45°C
0
10
20
30
40
50
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
RETURN LOSS IN S11 (Major Attenuation Steps) @ +25°C
0
10
20
30
40
50
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
ATT=0dB ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB ATT=8dB
ATT=16dB ATT=31.5dB
RETURN LOSS OUT S22 (Major Attenuation Steps) @ +25°C
0
10
20
30
40
50
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
ATT=0dB ATT=0.5dB
ATT=1dB ATT=2dB
ATT=4dB ATT=8dB
ATT=16dB ATT=31.5dB
ATTENUATION (31.5dB) @ +25°C, +85°C, -45°C
22
23
24
25
26
27
28
29
30
31
32
33
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
(dB)
-45°C
+25°C
+85°C
Page 6 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Typical Performance Curves
IP-3 INPUT (Major Attenuation Steps) @ +25°C
0
10
20
30
40
50
60
70
0 200 400 600 800 1000 1200 1400 1600 1800 200
0
Frequency (MHz)
(dBm)
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31.5dB
IP-3 INPUT (Major Attenuation Steps) @ +85°C
0
10
20
30
40
50
60
70
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
(dBm)
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31.5dB
IP-3 INPUT (Major Attenuation Steps) @ -45°C
0
10
20
30
40
50
60
70
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
(dBm)
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31.5dB
COMPRESSION @INPUT POWER=+24dBm (+25°C)
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
(dB)
ATT=0dB ATT=0.5dB
ATT=1dB ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB ATT=31.5dB
COMPRESSION @INPUT POWER=+24dBm (+85°C)
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
(dB)
ATT=0dB ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB ATT=8dB
ATT=16dB ATT=31.5dB
COMPRESSION @INPUT POWER=+24dBm(-45°C)
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
(dB)
ATT=0dB ATT=0.5dB
ATT=1dB ATT=2dB
ATT=4dB ATT=8dB
ATT=16dB ATT=31.5dB
Page 7 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Outline Drawing (DG983-1)
Device Marking
Outline Dimensions ( )
inch
mm
A
BCDEFGHJ K L M N P Q R WT.
GRAMS
.157 .157 .035 .008 .081 .081 .010 — .022 .020 .166 .166 .070 .012 .026 .070 .04
4.00 4.00 0.90 0.20 2.06 2.06 0.25 — 0.56 0.50 4.22 4.22 1.78 0.31 0.66 1.78
31575
MCL
+
Pin 1
Index
Date
Code
Suggested Layout,
Tolerance to be within ±.002
PCB Land Pattern
Page 8 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Suggested Layout for PCB Design (PL-183)
The suggested Layout shows only the footprint area of the DAT, and the components located near this area
(i.e.: R1, R7). For the complete Layout, see photo and schematic diagram on page 11 of 12.
NOTES:
1. TRACE WIDTH IS SHOWN FOR FR4 WITH DIELECTRIC THICKNESS.
.025” ±.002”. COPPER: 1/2 OZ. EACH SIDE.
FOR OTHER MATERIALS TRACE WIDTH MAY NEED TO BE MODIFIED.
2. 0603, 0402 SIZE CHIP FOOT PRINTS SHOWN FOR REFERENCE,
VALUES OF RESISTORS WILL VARY BASED ON APPLICATION.
3. BOTTOM SIDE OF THE PCB IS CONTINUOUS GROUND PLANE.
DENOTES PCB COPPER LAYOUT WITH SMOBC
(SOLDER MASK OVER BARE COPPER)
DENOTES COPPER LAND PATTERN FREE OF SOLDERMASK
Page 9 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
The parallel interface timing requirements are defined by Figure 1 (Parallel Interface Timing Diagram) and
Table 2 (Parallel Interface AC Characteristics), and switching speed.
For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenuation
state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device.
For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation
state control values will change device state to new attenuation. Direct mode is ideal for manual control of
the device (using hardwire, switches, or jumpers).
Simplified Schematic
Figure 1: Parallel Interface Timing Diagram
The DAT-31575-PN+ parallel interface consists of 6 control bits that select the desired attenuation state, as
shown in Table 1: Truth Table
Table 1. Truth Table
Attenuation
State C16 C8 C4 C2 C1 C0.5
Reference 0 00000
0.5 (dB) 0 00001
1 (dB) 0 00010
2 (dB) 0 00100
4 (dB) 0 01000
8 (dB) 0 10000
16 (dB) 1 00000
31.5 (dB) 1 11111
Note: Not all 64 possible combinations of C0.5 - C16 are shown in table
Table 2. Parallel Interface AC Characteristics
Symbol Parameter Min. Max. Units
tLEPW LE minimum pulse width 10 ns
tPDSUP
Data set-up time before
clock rising edge of LE 10 ns
tPDHLD
Data hold time after clock
falling edge of LE 10 ns
t
PDSUP
t
PDHLD
Parallel Data
C16:C0.5
LE
t
LEPW
RF Input
16dB 8dB
4dB 2dB
1dB
Parallel Control
Internal Control Logic Interface
Latch Enable
0.5dB
RF Out
Page 10 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
The DAT-31575-PN+ always assumes a specifiable attenuation setting on power-up, allowing a known at-
tenuation state to be established before an initial parallel control word is provided.
When the attenuator powers up with LE=0, the control bits are automatically set to one of four possible val-
ues .These four values are selected by the two power-up control bits,PUP1 and PUP2 ,as shown in Table 3:
(Power-Up Truth Table, Parallel Mode).
Power-up Control Settings
Power-Up with LE=1 provides normal parallel operation with C0.5-C16, and PUP1 and PUP2 are not active.
Table 3. Power-Up Truth Table, Parallel Mode
Attenuation State PUP1 PUP2 LE
Reference 0 0 0
8 (dB) 0 1 0
16 (dB) 1 0 0
31 (dB) 1 1 0
Defined by C0.5-C16
(See Table 1-Truth Table) X (Note 1) X (Note 1) 1
Note 1: PUP1 and PUP2 Connection may be 0, 1, GROUND, or not con-
nect, without effect on attenuation state.
Page 11 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
TB-341 Evaluation Board Schematic Diagram
DAT
C0.5
C1
GND
C2
C4
C16
RFin
N/C
LE
V
DD
PUP1
PUP2
V
DD
GND
C8
RFout
GND
GND
R7
RFin
RFout
C11
R8
C9
C10
20 19 18 17 16
15
14
13
12
11
109876
5
4
3
2
1
7
DC SUPPLY
J2.1
LE CONTROL
J1.2
C3 R1
C4 C5 C6 C7 C8
R2 R3 R4 R5 R6
Vss
IC1
642
14 7
13 5
8101213 11 9
IC2
642
14 7
13 5
8101213 11 9
R9 R10
C2
C4
C8
GND
GND
C16
C0.5
C1
12345678
GND
V
DD
12
DC SUPPLY
J2.2
C2
C1
+
GND
LE
12
IC3
PARALLEL
CONTROL
J1.1
16
2
5
GND
Vss
V
DD
GND
1234
+
+
C12
C13
GND
TB-341
Bill of Materials
R1 - R8 Resistor 0603 10 KOhm +/- 1%
R10, R11 Resistor 0603 470 Ohm +/- 1%
R9 Resistor 0402 10 KOhm +/- 1%
C2 - C10 & C13 NPO Capacitor 0603 100pF +/- 5%
C1, C11 & C12 Tantalum Capacitor 100nF +/- 10%
IC1, IC2 Hex inverting Schmitt trigger MM74HC14
IC3 Dual non-inverting Schmitt trigger SN74LVC2G17
Page 12 of 12
DAT-31575-PN+
Digital Step Attenuator
'.)''#$/&-')#.')+"$()')%&*(**!'(("& '&$"&*"&""),"+*-*"+
Tape and Reel Packaging Information
Table T&R
TR
No.
No. of Devices Designation
Letter
Reel Size Tape
Width
Pitch Unit
Orientation
3000 T 13 inch
T-005
multiples of 10,
less than full
reel of 3K
PR 13 inch
12 mm 8 mm
multiples of 10,
on tape only Enot
applicable
Ordering Information
Model No. Description
Packaging
Designation Letter
(See Table T&R)
Quantity
Min.
No. of Units
Price
$
Ea.
DAT-31575-PN+
Parallel Interface,
Dual Voltage (Negative
and Positive)
E 10 $3.80
TB-341 Test Board Only Not Applicable 1 $79.95
How to Order
Example: 3000 pieces of DAT-31575-PN+
3K DAT-31575-PN+ T&R=T
Quantity Model No. T&R designation letter (see Table T&R)
Direction of Feed
Tape
Cavity
