© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 3 1Publication Order Number:
NVMFD5489NL/D
NVMFD5489NL
Power MOSFET
60 V, 65 mW, 12 A, Dual N−Ch Logic Level
Features
•Small Footprint (5x6 mm) for Compact Designs
•Low RDS(on) to Minimize Conduction Losses
•Low Capacitance to Minimize Driver Losses
•175°C Operating Temperature
•NVMFD5489NLWF − Wettable Flank Option for Enhanced Optical
Inspection
•AEC−Q101 Qualified and PPAP Capable
•This is a Pb−Free Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 60 V
Gate−to−Source Voltage VGS "20 V
Continuous Drain Cur
-
rent RJ−mb
(Notes 1, 2, 3, 4) Steady
State
Tmb = 25°CID12 A
Tmb = 100°C 8.8
Power Dissipation
RJ−mb (Notes 1, 2, 3
)
Tmb = 25°CPD23.4 W
Tmb = 100°C 11.7
Continuous Drain Cur
-
rent RJA
(Notes 1, 3 & 4) Steady
State
TA = 25°CID4.5 A
TA = 100°C 3.2
Power Dissipation
RJA (Notes 1 & 3) TA = 25°CPD3.0 W
TA = 100°C 1.5
Pulsed Drain Current TA = 25°C, tp = 10 sIDM 62 A
Operating Junction and Storage Temperature TJ, Tstg −55 to
175 °C
Source Current (Body Diode) IS22 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, IL(pk) = 19.5 A, L = 0.1 mH,
RG = 25 )
EAS 19 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3) RJ−mb 6.4
°C/W
Junction−to−Ambient − Steady State (Note 3) RJA
50
Junction−to−Ambient − Steady State
(min footprint) 161
1. The e ntire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi () is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second are higher but are dependent on pulse duration and duty cycle.
ORDERING INFORMATION
www.onsemi.com
Device Package Shipping†
V(BR)DSS RDS(on) MAX ID MAX
60 V 65 m @ 10 V 12 A
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
DFN8 5x6
(SO8FL)
CASE 506BT
MARKING DIAGRAM
79 m @ 4.5 V
NVMFD5489NLT1G DFN8
(Pb−Free) 1500/
Tape & Ree
l
NVMFD5489NLT3G DFN8
(Pb−Free) 5000/
Tape & Ree
l
Dual N−Channel
D1
S1
G1
1
D2
S2
G2
XXXXXX = 5489NL
XXXXXX = (NVMFD5489NL) or
XXXXXX = 5489LW
XXXXXX = (NVMFD5489NLWF)
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
D1
D1
D2
D2
S1
G1
S2
G2
XXXXXX
AYWZZ
D2
D1
D2
D1
NVMFD5489NLWFT1G DFN8
(Pb−Free) 1500/
Tape & Ree
l
NVMFD5489NLWFT3G DFN8
(Pb−Free) 5000/
Tape & Ree
l
NVMFD5489NL
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 A60 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/TJReference to 25°C
ID = 250 A67 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 60 V TJ = 25°C1.0 A
TJ = 125°C10
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 A1.5 2.5 V
Negative Threshold Temperature Co-
efficient VGS(TH)/TJReference to 25°C
ID = 250 A4.86 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 15 A 52 65 m
VGS = 4.5 V, ID = 7.5 A 66 79
CHARGES AND CAPACITANCES
Input Capacitance Ciss VGS = 0 V, f = 1.0 MHz, VDS = 25 V
330 pF
Output Capacitance Coss 80
Reverse Transfer Capacitance Crss 39
Total Gate Charge QG(TOT)
VGS = 10 V, VDS = 48 V,
ID = 6 A
12.4 nC
Threshold Gate Charge QG(TH) 0.31
Gate−to−Source Charge QGS 1.3
Gate−to−Drain Charge QGD 4.74
SWITCHING CHARACTERISTICS (Note 6)
T urn−On Delay Time td(on)
VGS = 10 V, VDS = 48 V,
ID = 6 A, RG = 2.5
7ns
Rise Time tr11
T urn−Off Delay Time td(off) 31
Fall Time tf21
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 10 A TJ = 25°C0.83 1.2 V
TJ = 125°C0.71
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/s,
IS = 10 A
24.2 ns
Charge Time ta20.2
Discharge Time tb4.0
Reverse Recovery Charge QRR 26.5 nC
PACKAGE PARASITIC VALUES
Source Inductance LS
TA = 25°C
0.93 nH
Drain Inductance LD0.005
Gate Inductance LG1.84
Gate Resistance RG12
5. Pulse Test: pulse width = 300 s, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
NVMFD5489NL
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3
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
543210
0
5
10
15
20
25
30
54321
0
5
10
15
20
25
Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
10987654
0.050
0.054
0.058
0.066
0.074
0.078
0.086
0.090
1814106202
0.02
0.04
0.06
0.08
0.10
0.11
Figure 5. On−Resistance Variation with
Temperature Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1251007550250−25−50
0.5
0.7
0.9
1.1
1.3
1.7
1.9
2.3
555040302520105
1.0E−12
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (m)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
IDSS, LEAKAGE (A)
VGS = 10 to 6.5 V 5.5 V
4.5 V
4.3 V
4.1 V
3.9 V
3.7 V
3.5 V
3.3 V
3.1 V
3.0 V
2.7 V
VDS = 10 V
TJ = 125°CTJ = −55°C
TJ = 25°C
0.062
0.070
0.082 ID = 10 A
TJ = 25°C
161284
0.03
0.05
0.07
0.09
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
175
1.5
ID = 7.5 A
VGS = 10 V
TJ = 125°C
TJ = 150°C
TJ = 25°C
15 35 45 60
1.0E−11
1.0E−10
1.0E−09
1.0E−08
1.0E−07
1.0E−06
1.0E−05
1.0E−04
RDS(on), DRAIN−TO−SOURCE RESISTANCE (m)
150
2.1
NVMFD5489NL
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4
TYPICAL CHARACTERISTICS
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
50403020 60100
0
100
200
300
400
500
600
141086420
0
1
3
4
5
7
9
10
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE ()VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
1
10
100
1000
0.80.60.50.40.30.20.10
0
1
3
4
5
7
9
10
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1001010.1
0.01
0.1
1
10
100
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
TJ = 25°C
VGS = 0 V
Ciss
Coss
Crss
2
6
8
TJ = 25°C
VDD = 48 V
VGS = 10 V
ID = 6 A
QT
Qgs
VDD = 48 V
VGS = 10 V
ID = 6 A
tr
tf
td(off)
td(on)
0.7 0.9
2
6
8TJ = 25°C
VGS = 0 V
TC = 25°C
VGS = 10 V
Single Pulse
RDS(on) Limit
Thermal Limit
Package Limit
10 s
100 s
1 ms
10 ms
dc
12
Qgd
NVMFD5489NL
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6
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
CASE 506BT
ISSUE E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.27
0.75
1.40
3.70
4.56
8X
PITCH
6.59
4.84
1.00
DIMENSION: MILLIMETERS
2.30
4X
0.70
5.55
4X
0.56
2X
2.08
2X
M3.25
h−−−
3.50
−−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA
.
1234
56
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 h
D
E
B
A
0.20 C
0.20 C
2X
2X
DIM MINMILLIMETERS
A0.90
A1 −−−
b0.33
c0.20
D5.15 BSC
D1 4.70
D2 3.90
E6.15 BSC
E1 5.70
E2 3.90
e1.27 BSC
G0.45
K0.51
L0.48
A
0.10 C
0.10 C
14
8
e
8X
D2
b1 E2
b
A0.10 B
C
0.05 C
L
DETAIL A
A1
c
4X
5
MAX
−−−
−−−
0.42
−−−
4.90
4.10
5.90
4.15
0.55
−−−
0.61
M
N1.80 2.00
78
N
PIN ONE
IDENTIFIER
NOTE 7
NOTE 4 CSEATING
PLANE
DET AIL A NOTE 6
4X
K
NOTE 3
D3 1.50 1.70
b1 0.33 0.42
ÉÉ
ÉÉ
ÉÉ
4X
D3
G
4X
DETAIL B
DETAIL B
ALTERNATE
CONSTRUCTION
K1 0.56 −−−
K1
3.75
12
_
MAX
1.10
0.05
0.51
0.33
5.10
4.30
6.10
4.40
0.65
−−−
0.71
2.20
1.90
0.51
−−−
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