Data Sheet No. PD60263
Typical Connection
Product Summary
VOFFSET 600 V max.
IO+/- 130 mA/270 mA
VOUT 10 V - 20 V
ton/off (typ.) 680 ns/150 ns
Deadtime (typ.) 520 ns
HALF-BRIDGE DRIVER
Features
•Floating channel designed for bootstrap operation
•Fully operational to +600 V
•Tolerant to negative transient voltage, dV/dt
immune
•Gate drive supply range from 10 V to 20 V
•Undervoltage lockout
•3.3 V, 5 V, and 15 V logic compatible
•Cross-conduction prevention logic
•Matched propagation delay for both channels
•Internal set deadtime
•High-side output in phase with HIN input
•Low-side output out of phase with input
Description
The IRS2103 is a high voltage, high speed power
MOSF
ET and IGBT drivers with d
ependent high- and
low-side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge-
dized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down
to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side
configuration which operates up to 600 V.
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IRS2103(S)PbF
(Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to
our Application Notes and DesignTips for proper circuit board layout.
Packages
8-Lead PDIP
IRS2103
8-Lead SOIC
IRS2103S
•
RoHS compliant
IRS2103(S)PbF
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Symbol Definition Min. Max. Units
VBHigh-side floating absolute voltage-0.3625
VSHigh-side floating supply offset voltageVB - 25VB + 0.3
VHOHigh-side floating output voltageVS - 0.3VB + 0.3
VCCLow-side and logic fixed supply voltage-0.325
VLOLow-side output voltage-0.3VCC + 0.3
VIN Logic input voltage (HIN & )-0.3V
CC + 0.3
dVs/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25 °C(8 Lead PDIP) — 1.0
(8 Lead SOIC) — 0.625
RthJA Thermal resistance, junction to ambient (8 Lead PDIP) — 125
(8 Lead SOIC) — 200
TJJunction temperature — 150
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential.
Symbol Definition Min. Max. Units
VBHigh-side floating supply absolute voltageVS + 10VS + 20
VSHigh-side floating supply offset voltageNote 1600
VHOHigh-side floating output voltageVSVB
VCCLow-side and logic fixed supply voltage1020
VLOLow-side output voltage0VCC
VIN Logic input voltage (HIN & )0V
CC
TAAmbient temperature -40 125
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
°C
V
V
W
°C/W
°C
IRS2103(S)PbF
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Symbol Definition Min. Typ. Max. Units Test Conditions
VIH Logic “1” (HIN) & Logic “0” (LIN) input voltage 2.5 — —
VIL Logic “0” (HIN) & Logic “1” (LIN) input voltage — — 0.8
VOH High level output voltage, VBIAS - VO— 0.05 0.2
VOL Low level output voltage, VO— 0.02 0.1
ILK Offset supply leakage current — — 50 VB = VS = 600 V
IQBS Quiescent VBS supply current — 30 55
IQCC Quiescent VCC supply current — 150 270
IIN+ Logic “1” input bias current — 3 1 0 HIN = 5 V, LIN = 0 V
IIN-
Logic “0” input bias current — — 5 HIN = 0 V, LIN = 5 V
VCCUV+ VCC supply undervoltage positive going 8 8.9 9.8
threshold
VCCUV- VCC supply undervoltage negative going 7.4 8.2 9
threshold
IO+ Output high short circuit pulsed current 130 290 — VO = 0 V, VIN = VIH
PW ≤ 10 µs
IO- Output low short circuit pulsed current 270 600 — VO = 15 V, VIN = VIL
PW ≤ 10 µs
Symbol Definition Min. Typ. Max. Units Test Conditions
ton Turn-on propagation delay — 680 820 VS = 0 V
toff Turn-off propagation delay — 150 220 VS = 600 V
trTurn-on rise time — 70 170
tfTurn-off fall time — 35 90
DT Deadtime, LS turn-off to HS turn-on & 400 520 650
HS turn-on to LS turn-off
MT Delay matching, HS & LS turn-on/off — — 60
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified.
V
ns
V
mA
µA
VCC = 10 V to 20 V
IO = 2 mA
VIN = 0 V or 5 V
IRS2103(S)PbF
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Functional Block Diagram
Lead Definitions
Symbol Description
HINLogic input for high-side gate driver output (HO), in phase
Logic input for low-side gate driver output (LO), out of phase
VBHigh-side floating supply
HOHigh-side gate drive output
VSHigh-side floating supply return
VCCLow-side and logic fixed supply
LOLow-side gate drive output
COMLow-side return
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IRS2103PbF IRS2103SPbF
1
2
3
4
8
7
6
5
VCC
HIN
LIN
COM
VB
HO
VS
LO
1
2
3
4
8
7
6
5
VCC
HIN
LIN
COM
VB
HO
VS
LO
VB
HO
VS
VCC
IHN
LIN
DEAD TIME &
SHOOT-THROUGH
PREVENTION
PULSE
GEN
PULSE
FILTER
HV
LEVEL
SHIFT R
S
Q
VCC
LO
COM
UV
DETECT
IRS2103(S)PbF
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Figure 1. Input/Output Timing Diagram
Figure 3. Deadtime Waveform Definitions
Figure 2. Switching Time Waveform Definitions
IRS2103(S)PbF
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Turn-On Delay Time (ns)
Figure 4A. T urn-On Time vs. T emperature
VBIAS Supply Voltage (V)
Figure 4B. T urn-On Time vs. Supply V oltage
Turn-Off Delay Time (ns)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
Typ.
Turn-Off Delay Time (ns)
Temperature (
o
C)
Figure 5A. T urn-Off Time vs. T emperature
VBIAS Supply Voltage (V)
Figure 5B. T urn-Off Time vs. Supply V oltage
0
200
400
600
800
1000
1200
1400
10 12 14 16 18 20
Max.
Typ.
0
100
200
300
400
500
10 12 14 16 18 20
Max.
Typ.
0
200
400
600
800
1000
0 2 4 6 8101214161820
Turn-On Delay Time (ns
)
Input V ol t age (V)
Max.
Typ
.
0
200
400
600
800
1000
1200
1400
-50 -25 0 25 50 75 100 125
Max.
Typ.
Temperature (
o
C)
Turn-On Delay Time (ns)
Figure 4C. T urn-On Time vs. Input V olt age
0
200
400
600
800
100
0
024681012141618
Turn-Of f Delay T ime (ns
)
Input Voltage (V)
Max.
Typ
.
Figure 5C. T urn-Off Time vs. Input V oltage
Turn-Off Delay Time (ns)
IRS2103(S)PbF
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Figure 7A. T urn-Off Fall T ime
vs. Temperature
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
Figure 7B. T urn-Off Fall Time vs. V olt age
Temperature (oC) VBIAS Supply Voltage (V)
Deadtime (ns)
Figure 8B. Dead time vs. V oltage
Deadtime (ns)
Figure 8A. Deadtime vs. Temperature
0
200
400
600
800
1000
1200
1400
10 12 14 16 18 20
Max.
Typ.
Min.
0
200
400
600
800
1000
1200
1400
-50-250 255075100125
Max.
Ty
Min.
p.
Turn-On Rise Time (ns)
Figure 6A. T urn-On Rise Time
vs. Temperature
Turn-On Rise Time (ns)
Figure 6B. T urn-On Rise Time
vs. V oltage
0
100
200
300
400
500
10 12 14 16 18 20
Max.
Typ.
VBIAS Supply Voltage (V)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (oC)
Max.
Typ. 0
100
200
300
400
500
10 12 14 16 18 20
0
50
100
150
200
-50 -25 0 25 50 75 100 125
Te mperature (oC)
0
50
100
150
200
10 12 14 16 18 20
Input Voltage (V)
Max.
Typ.
Max.
Typ.
Max.
Typ.
IRS2103(S)PbF
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Input Voltage (V)
Figure 10B. Logic "0"(HIN) & Logic "1" ( )
Input Voltage vs. Voltage
Figure 11A. High Level Output Voltage
vs. Temperature
Figure 11B. High Level Output Voltage
vs. Supply Voltage
High Level Output Voltage (V)
VBIAS Supply Voltage (V)
Input Voltage (V)
0
0.8
1.6
2.4
3.2
4
10 12 14 16 18 20
Max.
Vcc Supply Voltage (V)
0
0.8
1.6
2.4
3.2
4
-50 -25 0 25 50 75 100 125
Max.
Temperature (oC)
Figure 10A. Logic "0"(HIN) & Logic "1" ( )
Input Voltage vs. Temperature
Temperature (oC)
Input Voltage (V)
Input Voltage (V)
Figure 9A. Logic "1" Input Voltage
vs. Temperature Figure 9B. Logic "1" Input Voltage
vs. Supply Voltage
1
2
3
4
5
-50 -25 0 25 50 75 100 125 1
2
3
4
5
10 12 14 16 18 20
VBAIS Supply Voltage (V)
Input Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18 20
Min.
Min.
Typ.
Max.
Typ.
Max.
High Level Output Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100 125
Temperature (oC)
LIN
LIN
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IRS2103(S)PbF
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Offset Supply Leakge Current (µA)
0
100
200
300
400
500
0 200 400 600 800
Max.
Figure 13A. Offset Supply Current
vs. Temperature Figure 13B. Offset Supply Current vs. V oltage
Figure 14A. VBS Supply Current
vs. Temperature Figure 14B. VBS Supply Current vs. Voltage
Temperature (oC)
Temperature (oC)
VBS Supply Current (µA)
Offset Supply Leakge Current (µA)
VB Boost Voltage (V)
VBS Supply Current (µA)
VBS Floating Supply Voltage (V)
0
30
60
90
120
150
10 12 14 16 18 20
Max.
Typ.
0
30
60
90
120
150
-50 -25 0 25 50 75 100 125
Max.
Typ.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
Figure 12A. Low Level Output V oltage
vs. Temperature Figure 12B. Low Level Output V oltage
vs. Supply V oltage
Low Level Output Voltage (V)
Low Level Output Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Typ.
Max.
Typ.
Max.
IRS2103(S)PbF
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Vcc Supply Voltage (V)
Figure 16A. Logic "1" Input Current
vs. Temperature
Figure 16B. Logic "1" Input Current
vs. Voltage
Figure 17A. Logic "0" Input Current
vs. Temperature
Figure 17B. Logic "0" Input Current
vs. Voltage
Logic “1” Input Current (µA)
Temperature (oC)
Logic “1” Input Current (µA)
Logic “0” Input Current (µA)
0
5
10
15
20
25
30
-50 -25 0 25 50 75 100 125
Max.
Typ.
Max
0
5
10
15
20
25
30
10 12 14 16 18 20
Max.
Typ.
Figure 15A. Vcc Supply Current
vs. Temperature
Figure 15B. Vcc Supply Current vs. Voltage
VCC Supply Current (µA)
VCC Supply Current (µA)
0
100
200
300
400
500
600
700
-50 -25 0 25 50 75 100 125
Max.
Typ.
Temperature (oC)
0
100
200
300
400
500
600
700
10 12 14 16 18 20
Max.
Typ.
Vcc Supply Voltage (V)
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "0" Input Bias Current (µA)
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Supply Voltage (V)
Logic "0" Input Bias Current (µA)
IRS2103(S)PbF
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Output Source Current (mA)
Figure 19A. Output Source Current
vs. Temperature Figure 19B. Output Source Current
vs. Supply V oltage
Figure 20A. Output Sink Current
vs. Temperature Figure 20B. Output Sink Current
vs. Supply V oltage
Temperature (oC) VBIAS Supply Voltage (V)
Output Sink Current (mA)
Output Source Current (mA)
Output Sink Current (mA)
Figure 18A. Vcc Undervoltage Threshold(+)
vs. Temperature Figure 18B. Vcc UndervoltageThreshold (-)
vs. Temperature
Temperature (oC)
Temperature (oC)
VCC UVLO Threshold +(V)
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Min.
Max.
Typ.
Typ.
VCC UVLO Threshold -(V)
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Max.
Typ.
Min.
Typ.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (oC)
0
100
200
300
400
500
10 12 14 16 18 20
VBIAS Supply Voltage (V)
0
200
400
600
800
1000
-50 -25 0 25 50 75 100 125 0
200
400
600
800
1000
10 12 14 16 18 20
Typ.
Min.
Typ.
Min.
Typ.
Min.
Typ.
Min.
IRS2103(S)PbF
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01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
87
5
65
D B
E
A
e
6X
H
0. 25 [.010 ] A
6
4312
4 . OUT L INE CONFORMS T O JEDE C OUTLINE MS-012 AA .
NOTES:
1. DI MENSI ONING & TOLERANCING PER ASME Y14.5M-1994.
2 . CONT ROLL ING DIMENSION : MIL LIMETER
3 . D IMENSIONS ARE SH OW N IN MILLIMET ERS [INCHES] .
7
K x 4 5°
8X L 8X c
y
FOOTPRINT
8X 0.72 [ . 02 8]
6. 46 [ . 2 55]
3X 1.27 [ . 05 0] 8X 1.78 [ . 07 0]
5 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 D IMENSION IS THE LENGT H OF LEA D FOR SOL DERING T O
A SUBSTRATE.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
0. 25 [.010 ] CAB
e1 A
A1
8X b
C
0. 10 [.004 ]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASI C
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINC HE S MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASI C 0.635 BASIC
Case Outlines
IRS2103(S)PbF
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CARRIER TAPE DIM ENSION FOR 8SOICN
Code Min Max Min Max
A 7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 11.70 12.30 0.46 0.484
D 5.45 5.55 0.214 0.218
E 6.30 6.50 0.248 0.255
F 5.10 5.30 0.200 0.208
G 1.50 n/a 0.059 n/a
H 1.50 1.60 0.059 0.062
Metric Imperial
REEL DIMENSIONS FOR 8SOICN
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B 20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D 1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
F n/a 18.40 n/a 0.724
G 14.50 17.10 0.570 0.673
H 12.40 14.40 0.488 0.566
Metric Imperial
E
F
A
C
D
G
A
BH
N
OT E : CO NTROLLING
D
IMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
Tape & Reel
8-lead SOIC
IRS2103(S)PbF
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ORDER INFORMATION
8-Lead PDIP IRS2103PbF
8-Lead SOIC IRS2103SPbF
8-Lead SOIC Tape & Reel IRS2103STRPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
LEADFREE PART MARKING INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
S
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
Data and specifications subject to change without notice. 11/27/2006
