-
+
LME49720
-
+
-
+
LME49720
-
+
+
+
INPUT
OUTPUT
Note: 1% metal film resistors, 5% polypropylene capacitors
47 k:
3320:
150:
909:
26.1 k:
3.83 k:
100:
150:
22 nF//4.7 nF//500 pF
3320:
47 nF//33 nF
10 pF
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LME49720
SNAS393D –MARCH 2007–REVISED NOVEMBER 2016
LME49720 Dual High Performance, High Fidelity Audio Operational Amplifier
1
1 Features
1• Easily Drives 600ΩLoads
• Optimized for Superior Audio Signal Fidelity
• Output Short Circuit Protection
• PSRR and CMRR Exceed 120dB (typ)
• SOIC, PDIP, TO-99 Metal Can Packages
• Key Specifications
– Power Supply Voltage Range: ±2.5 to ±17V
– THD+N (AV= 1, VOUT = 3VRMS, fIN = 1kHz):
– RL= 2kΩ: 0.00003% (typ)
– RL= 600Ω: 0.00003% (typ)
– Input Noise Density: 2.7nV/√Hz (typ)
– Slew Rate: ±20V/μs (typ)
– Gain Bandwidth Product: 55MHz (typ)
– Open Loop Gain (RL= 600Ω): 140dB (typ)
– Input Bias Current: 10nA (typ)
– Input Offset Voltage: 0.1mV (typ)
– DC Gain Linearity Error: 0.000009%
2 Applications
• Ultra High Quality Audio Amplification
• High Fidelity Preamplifiers
• High Fidelity Multimedia
• State of the Art Phono Pre Amps
• High Performance Professional Audio
• High Fidelity Equalization and Crossover
Networks
• High Performance Line Drivers
• High Performance Line Receivers
• High Fidelity Active Filters
3 Description
The LME49720 device is part of the ultra-low
distortion, low noise, high slew rate operational
amplifier series optimized and fully specified for high
performance, high fidelity applications. Combining
advanced leading-edge process technology with
state-of-the-art circuit design, the LME49720 audio
operational amplifiers deliver superior audio signal
amplification for outstanding audio performance. The
LME49720 combines extremely low voltage noise
density (2.7nV/√Hz) with vanishingly low THD+N
(0.00003%) to easily satisfy the most demanding
audio applications.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LME49720 TO-99 (8) 9.08mm × 9.08mm
SOIC (8) 4.90mm × 3.91mm
PDIP (8) 9.81mm × 6.35mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Passively Equalized RIAA Phono Preamplifier
2
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics .......................................... 5
7.6 Typical Characteristics.............................................. 6
8 Parameter Measurement Information ................ 24
8.1 Distortion Measurements........................................ 24
9 Detailed Description............................................ 26
9.1 Overview................................................................. 26
9.2 Functional Block Diagram....................................... 26
9.3 Feature Description................................................. 26
9.4 Device Functional Modes........................................ 27
10 Application and Implementation........................ 27
10.1 Application Information.......................................... 27
10.2 Typical Applications .............................................. 27
11 Power Supply Recommendations ..................... 35
11.1 Power Supply Decoupling Capacitors .................. 35
12 Layout................................................................... 36
12.1 Layout Guidelines ................................................. 36
12.2 Layout Example .................................................... 36
13 Device and Documentation Support................. 39
13.1 Receiving Notification of Documentation Updates 39
13.2 Community Resources.......................................... 39
13.3 Trademarks........................................................... 39
13.4 Electrostatic Discharge Caution............................ 39
13.5 Glossary................................................................ 39
14 Mechanical, Packaging, and Orderable
Information........................................................... 39
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (April 2013) to Revision D Page
• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,Power
Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
• Changed RθJA values for D and P packages from 145 °C/W to 107.9 °C/W (D) and from 102 °C/W to 72.9 °C/W (P)
in the Thermal Information table............................................................................................................................................. 4
8
4
62
5
7
3
1
V+
OUTPUT BOUTPUT A
INVERTING
INPUT A
V-
INVERTING
INPUT B
NON-INVERTING
INPUT A
NON-INVERTING
INPUT B
1
2
3
4
8
7
6
5
Output A
InputA -
InputA +
V-
V+
Output B
Input B-
Input B+
1
2
3
4
8
7
6
5
Output A
InputA -
InputA +
V-
V+
Output B
InputB -
InputB +
3
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5 Device Comparison Table
Device Number Amplifier Type Number of Channel Output Current
(mA) Input Noise Density
(nV/rtHz) THD+N (%)
LME49710 Audio Operational 1 37 2.5 0.00003
LME49720 Audio Operational 2 26 2.7 0.00003
LME49721 Audio Operational 2 100 4 0.0002
LME49723 Audio Operational 2 25 3.2 0.0002
6 Pin Configuration and Functions
D Package
8 Pin SOIC
Top View P Packages
8 Pin PDIP
Top View
LMC Package
8 Lead TO-99
Pin Functions
PIN I/O DESCRIPTION
NAME SOIC PDIP TO-99
V+ 8 8 8 - Positive supply voltage
V- 4 4 4 - Negative supply voltage
InputA- 2 2 2 I Negative audio input
InputA+ 3 3 3 I Positive audio input
Output A 1 1 1 O Audio output A
InputB– 6 6 6 I Negative audio input
InputB+ 5 5 5 I Positive audio input
Output B 7 7 7 O Audio output B
4
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SNAS393D –MARCH 2007–REVISED NOVEMBER 2016
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(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
(2) Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For enusred
specifications and test conditions, see Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
Some performance characteristics may degrade when the device is not operated under the listed test conditions.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) Amplifier output connected to GND, any number of amplifiers within a package.
7 Specifications
7.1 Absolute Maximum Ratings
see (1)(2)(3)
MIN MAX UNIT
Power Supply Voltage (VS= V+– V–) 36 V
Input Voltage (V–) – 0.7V (V+) + 0.7 V
Output Short Circuit (4) Continuous
Power Dissipation Internally Limited
Junction Temperature 150 °C
Temperature Range TMIN ≤TA≤TMAX –40 85 °C
Supply Voltage Range ±2.5V ≤VS≤
± 17V V
Storage Temperature −65 150 °C
(1) Human body model, 100pF discharged through a 1.5kΩresistor.
7.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM) (1) All pins 2000 V
Machine Model (MM), per EIAJ IC-121-
1981Application and Implementation Pins 1, 4, 7 and 8 200
Pins 2, 3, 5 and 6 100
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
V+,V– Supply voltage ±2.5 ±17 V
TAOperating free-air temperature –40 85 °C
TJOperating junction temperature –40 150 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) Thermal performance of a TO-99 package will depend strongly on mounting condition and there is no standard mounting configuration
on a JEDEC PCB for that package type.
7.4 Thermal Information
THERMAL METRIC(1)
LME49720
UNIT
D
(SOIC) P
(PDIP) LMC
(TO-99)(2)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 107.9 72.9 150 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52 77.2 35 °C/W
RθJB Junction-to-board thermal resistance 48.3 44.9 – °C/W
ψJT Junction-to-top characterization parameter 8.2 35.7 – °C/W
ψJB Junction-to-board characterization parameter 47.8 49.9 – °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A – °C/W
5
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(1) Tested limits are ensured to AOQL (Average Outgoing Quality Level).
(2) Typical specifications are specified at +25ºC and represent the most likely parametric norm.
(3) PSRR is measured as follows: VOS is measured at two supply voltages, ±5V and ±15V. PSRR = | 20log(ΔVOS/ΔVS) |.
7.5 Electrical Characteristics
The following specifications apply for VS= ±15V, RL= 2kΩ, fIN = 1kHz, and TA= 25°C, unless otherwise specified.
PARAMETER TEST CONDITIONS MIN(1) TYP (2) MAX(1) UNIT
THD+N Total harmonic distortion +
noise AV= 1, VOUT = 3Vrms
RL= 2kΩ
RL= 600Ω
0.00003
0.00003 0.00009 %
IMD Intermodulation distortion AV= 1, VOUT = 3VRMS
Two-tone, 60Hz & 7kHz 4:1 0.00005 %
GBWP Gain bandwidth product 45 55 MHz
SR Slew rate ±15 ±20 V/μs
FPBW Full power bandwidth VOUT = 1VP-P, –3dB
referenced to output magnitude
at f = 1kHz
10 MHz
tsSettling time AV= –1, 10V step, CL= 100pF
0.1% error range 1.2 μs
en
Equivalent input noise voltage fBW = 20Hz to 20kHz 0.34 0.65 μVRMS
Equivalent input noise density f = 1kHz
f = 10Hz 2.7
6.4 4.7 nV/√Hz
inCurrent noise density f = 1kHz
f = 10Hz 1.6
3.1 pA/√Hz
VOS Offset voltage ±0.1 ±0.7 mV
ΔVOS/ΔTe
mp Average input offset voltage
drift vs temperature –40°C ≤TA≤85°C 0.2 μV/°C
PSRR Average input offset voltage
shift vs power supply voltage ΔVS= 20V (3) 110 120 dB
ISOCH-CH Channel-to-Channel isolation fIN = 1kHz
fIN = 20kHz 118
112 dB
IBInput bias current VCM = 0V 10 72 nA
ΔIOS/ΔTe
mp Input bias current drift vs
temperature –40°C ≤TA≤85°C 0.1 nA/°C
IOS Input offset current VCM = 0V 11 65 nA
VIN-CM Common-Mode input voltage
range (V+) – 2.0
(V-) + 2.0 +14.1
–13.9 V
CMRR Common-Mode rejection –10V<Vcm<10V 110 120 dB
ZIN
Differential input impedance 30 kΩ
Common mode input
impedance –10V<Vcm<10V 1000 MΩ
AVOL Open loop voltage gain –10V<Vout<10V, RL= 600Ω125 140 dB–10V<Vout<10V, RL= 2kΩ140
–10V<Vout<10V, RL= 10kΩ140
VOUTMAX Maximum output voltage swing RL= 600Ω±12.5 ±13.6 VRL= 2kΩ±14.0
RL= 10kΩ±14.1
IOUT Output current RL= 600Ω, VS= ±17V ±23 ±26 mA
IOUT-CC Instantaneous short circuit
current +53
–42 mA
ROUT Output impedance fIN = 10kHz
Closed-Loop
Open-Loop
0.01
13 Ω
CLOAD Capacitive load drive overshoot 100pF 16 %
ISTotal quiescent current IOUT = 0mA 10 12 mA
100m 2500m 1
0.00001
0.01
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
105200m
OUTPUT VOLTAGE (V)
THD + N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
10m 120
10
OUTPUT VOLTAGE (V)
THD+N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
10m 120
10
OUTPUT VOLTAGE (V)
THD+N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
OUTPUT VOLTAGE (V)
10m 120
10
THD+N (%)
6
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7.6 Typical Characteristics
Figure 1. Thd+N vs Output Voltage VCC = 15V, VEE = –15V RL
= 2kΩ
Figure 2. Thd+N vs Output Voltage VCC = 12V, VEE = –12v RL
= 2kΩ
Figure 3. Thd+N vs Output Voltage VCC = 17V, VEE = –17v RL
= 2kΩFigure 4. Thd+N vs Output Voltage VCC = 2.5V, VEE = –2.5V
RL= 2kΩ
Figure 5. Thd+N vs Output Voltage VCC = 15V, VEE = –15V RL
= 600ΩFigure 6. Thd+N vs Output Voltage VCC = 12V, VEE = –12V RL
= 600Ω
100m 2500m 1
0.00001
0.01
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
105200m
OUTPUT VOLTAGE (V)
THD + N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
10m 120
10
THD+N (%)
OUTPUT VOLTAGE (V)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
10m 120
100m 10
OUTPUT VOLTAGE (V)
THD+N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
10m 1 20
10
THD+N (%)
OUTPUT VOLTAGE (V)
100m 2500m 1
0.00001
0.01
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
10
5200m
OUTPUT VOLTAGE (V)
THD + N (%)
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
100m
10m 120
10
THD+N (%)
OUTPUT VOLTAGE (V)
7
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Typical Characteristics (continued)
Figure 7. Thd+N vs Output Voltage VCC = 17V, VEE = –17V RL
= 600ΩFigure 8. Thd+N vs Output Voltage VCC = 2.5V, VEE = –2.5V
RL= 600Ω
Figure 9. Thd+N vs Output Voltage VCC = 15V, VEE = –15V RL
= 10kΩ
Figure 10. Thd+N vs Output Voltage VCC = 12V, VEE = –12V
RL= 10kΩ
Figure 11. Thd+N vs Output Voltage VCC = 17V, VEE = –17V
RL= 10kΩFigure 12. Thd+N vs Output Voltage VCC = 2.5V, VEE = –2.5V
RL= 10kΩ
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
FREQUENCY (Hz)
THD+N (%)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
FREQUENCY (Hz)
THD+N (%)
8
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Typical Characteristics (continued)
Figure 13. Thd+N vs Frequency VCC = 15V, VEE = –15V, VOUT
= 3VRMS RL= 2kΩ
Figure 14. Thd+N vs Frequency VCC = 12V, VEE = –12V, VOUT
= 3VRMS RL= 2kΩ
Figure 15. Thd+N vs Frequency VCC = 17V, VEE = –17V, VOUT
= 3VRMS RL= 2kΩ
Figure 16. Thd+N vs Frequency VCC = 15V, VEE = –15V, VOUT
= 3VRMS RL= 600Ω
Figure 17. Thd+N vs Frequency VCC = 12V, VEE = –12V, VOUT
= 3VRMS RL= 600Ω
Figure 18. Thd+N vs Frequency VCC = 17V, VEE = –17V, VOUT
= 3VRMS RL= 600Ω
1
OUTPUT VOLTAGE (V)
102 5
0.00001
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
0.01
IMD (%)
100m 200m 500m
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000007
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000007
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
THD+N (%)
FREQUENCY (Hz)
20 100 1k 10k 20k
0.00001
0.0001
0.001
0.01
0.00002
0.0002
0.002
0.00005
0.0005
0.005
50 200 2k500 5k
FREQUENCY (Hz)
THD+N (%)
9
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Typical Characteristics (continued)
Figure 19. Thd+N vs Frequency VCC = 15V, VEE = –15V, VOUT
= 3VRMS RL= 10kΩ
Figure 20. Thd+N vs Frequency VCC = 12V, VEE = –12V, VOUT
= 3VRMS RL= 10kΩ
Figure 21. Thd+N vs Frequency VCC = 17V, VEE = –17V, VOUT
= 3VRMS RL= 10kΩ
Figure 22. IMD vs Output Voltage VCC = 15V, VEE = –15V RL
= 2kΩ
Figure 23. IMD vs Output Voltage VCC = 12V, VEE = –12V RL
= 2kΩ
Figure 24. IMD vs Output Voltage VCC = 2.5V, VEE = –2.5V RL
= 2kΩ
OUTPUT VOLTAGE (V)
100m
0.00001
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
0.01
IMD (%)
300m 500m 700m 1
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000006
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000006
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000007
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000007
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000006
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
10
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Typical Characteristics (continued)
Figure 25. IMD vs Output Voltage VCC = 17V, VEE = –17V RL
= 2kΩ
Figure 26. IMD vs Output Voltage VCC = 15V, VEE = –15V RL
= 600Ω
Figure 27. IMD vs Output Voltage VCC = 12V, VEE = –12V RL
= 600Ω
Figure 28. IMD vs Output Voltage VCC = 17V, VEE = –17V RL
= 600Ω
Figure 29. IMD vs Output Voltage VCC = 2.5V, VEE = –2.5V RL
= 600Ω
Figure 30. IMD vs Output Voltage VCC = 15V, VEE = –15V RL
= 10kΩ
20 20k
FREQUENCY (Hz)
+0
CROSSTALK (dB)
10k1k 2k 5k50 100 200 500
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
1100
FREQUENCY (Hz)
1
10
100
CURRENT NOISE (pA/ Hz)
10 1000 10000 100000
1
10
100
VS = 30V
VCM = 15V
1.6 pA/ Hz
0.00001
0.01
0.00002
0.00005
0.0001
0.0002
0.0005
0.001
0.002
0.005
100m 1300m 500m 700m
OUTPUT VOLTAGE (V)
IMD (%)
1100
FREQUENCY (Hz)
1
10
100
VOLTAGE NOISE (nV/ Hz)
10 1000 10000 100000
1
10
100
VS = 30V
VCM = 15V
2.7 nV/ Hz
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000006
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
0.00001
0.0001
0.001
0.01
IMD (%)
0.00002
0.0002
0.002
0.000006
0.00005
0.0005
0.005
OUTPUT VOLTAGE (V)
5100m 200m 500m 1 2 10
11
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Typical Characteristics (continued)
Figure 31. IMD vs Output Voltage VCC = 12V, VEE = –12V RL
= 10kΩ
Figure 32. IMD vs Output Voltage VCC = 17V, VEE = –17V RL
= 10kΩ
Figure 33. IMD vs Output Voltage VCC = 2.5V, VEE = –2.5V RL
= 10kΩ
Figure 34. Voltage Noise Density vs Frequency
Figure 35. Current Noise Density vs Frequency Figure 36. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 3VRMS AV= 0dB, RL= 2kΩ
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CROSSTALK (dB)
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CROSSTALK (dB)
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10k1k 2k 5k50 100 200 500
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-10
12
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SNAS393D –MARCH 2007–REVISED NOVEMBER 2016
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Typical Characteristics (continued)
Figure 37. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 10VRMS AV= 0dB, RL= 2kΩ
Figure 38. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 3VRMS AV= 0dB, RL= 2kΩ
Figure 39. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 10VRMS AV= 0dB, RL= 2kΩ
Figure 40. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 3VRMS AV= 0dB, RL= 2kΩ
Figure 41. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 10VRMS AV= 0dB, RL= 2kΩFigure 42. Crosstalk vs Frequency VCC = 2.5V, VEE = –2.5V,
VOUT = 1VRMS AV= 0dB, RL= 2kΩ
20 20k
FREQUENCY (Hz)
+0
CROSSTALK (dB)
10k1k 2k 5k50 100 200 500
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CROSSTALK (dB)
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CROSSTALK (dB)
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13
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Typical Characteristics (continued)
Figure 43. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 3VRMS AV= 0dB, RL= 600Ω
Figure 44. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 10VRMS AV= 0dB, RL= 600Ω
Figure 45. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 3VRMS AV= 0dB, RL= 600Ω
Figure 46. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 10VRMS AV= 0dB, RL= 600Ω
Figure 47. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 3VRMS AV= 0dB, RL= 600Ω
Figure 48. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 10VRMS AV= 0dB, RL= 600Ω
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20 20k
FREQUENCY (Hz)
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CROSSTALK (dB)
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-40
-30
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-10
14
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Typical Characteristics (continued)
Figure 49. Crosstalk vs Frequency VCC = 2.5V, VEE = –2.5V,
VOUT = 1VRMS AV= 0dB, RL= 600ΩFigure 50. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 3VRMS AV= 0dB, RL= 10kΩ
Figure 51. Crosstalk vs Frequency VCC = 15V, VEE = –15V,
VOUT = 10VRMS AV= 0dB, RL= 10kΩ
Figure 52. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 3VRMS AV= 0dB, RL= 10kΩ
Figure 53. Crosstalk vs Frequency VCC = 12V, VEE = –12V,
VOUT = 10VRMS AV= 0dB, RL= 10kΩFigure 54. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 3VRMS AV= 0dB, RL= 10kΩ
FREQUENCY (Hz)
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FREQUENCY (Hz)
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CROSSTALK (dB)
15
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Typical Characteristics (continued)
Figure 55. Crosstalk vs Frequency VCC = 17V, VEE = –17V,
VOUT = 10VRMS AV= 0dB, RL= 10kΩ
Figure 56. Crosstalk vs Frequency VCC = 2.5V, VEE = –2.5V,
VOUT = 1VRMS AV= 0dB, RL= 10kΩ
Figure 57. PSRR+ vs Frequency VCC = 15V, VEE = –15V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 58. PSRR- vs Frequency VCC = 15V, VEE = –15V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp
Figure 59. PSRR+ vs Frequency VCC = 15V, VEE = –15V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 60. PSRR- vs Frequency VCC = 15V, VEE = –15V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp
FREQUENCY (Hz)
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0
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PSRR (dB)
200k
16
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Typical Characteristics (continued)
Figure 61. PSRR+ vs Frequency VCC = 15V, VEE = –15V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp Figure 62. PSRR- vs Frequency VCC = 15V, VEE = –15V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp
Figure 63. PSRR+ vs Frequency VCC = 12V, VEE = –12V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 64. PSRR– vs Frequency VCC = 12V, VEE = –12V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp
Figure 65. PSRR+ vs Frequency VCC = 12V, VEE = –12V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 66. PSRR– vs Frequency VCC = 12V, VEE = –12V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp
FREQUENCY (Hz)
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FREQUENCY (Hz)
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FREQUENCY (Hz)
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PSRR (dB)
200k
17
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Typical Characteristics (continued)
Figure 67. PSRR+ vs Frequency VCC = 12V, VEE = –12V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp Figure 68. PSRR– vs Frequency VCC = 12V, VEE = –12V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp
Figure 69. PSRR+ vs Frequency VCC = 17V, VEE = –17V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 70. PSRR– vs Frequency VCC = 17V, VEE = –17V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp
Figure 71. PSRR+ vs Frequency VCC = 17V, VEE = –17V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 72. PSRR– vs Frequency VCC = 17V, VEE = –17V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp
FREQUENCY (Hz)
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FREQUENCY (Hz)
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FREQUENCY (Hz)
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PSRR (dB)
200k
18
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Typical Characteristics (continued)
Figure 73. PSRR+ vs Frequency VCC = 17V, VEE = –17V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp Figure 74. PSRR– vs Frequency VCC = 17V, VEE = –17V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp
Figure 75. PSRR+ vs Frequency VCC = 2.5V, VEE = –2.5V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 76. PSRR– vs Frequency VCC = 2.5V, VEE = –2.5V RL=
10kΩ, F = 200kHz, VRIPPLE = 200mvpp
Figure 77. PSRR+ vs Frequency VCC = 2.5V, VEE = –2.5V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp Figure 78. PSRR– vs Frequency VCC = 2.5V, VEE = –2.5V RL=
2kΩ, F = 200kHz, VRIPPLE = 200mvpp
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100 1k 10k 100k
FREQUENCY (Hz)
CMRR (dB)
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FREQUENCY (Hz)
CMRR (dB)
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FREQUENCY (Hz)
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PSRR (dB)
200k
19
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Typical Characteristics (continued)
Figure 79. PSRR+ vs Frequency VCC = 2.5V, VEE = –2.5V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp Figure 80. PSRR– vs Frequency VCC = 2.5V, VEE = –2.5V RL=
600Ω, F = 200kHz, VRIPPLE = 200mvpp
Figure 81. Cmrr vs Frequency VCC = 15V, VEE = –15V RL=
2kΩ
Figure 82. Cmrr vs Frequency VCC = 12V, VEE = –12V RL=
2kΩ
Figure 83. Cmrr vs Frequency VCC = 17V, VEE = –17V RL=
2kΩ
Figure 84. Cmrr vs Frequency VCC = 2.5V, VEE = –2.5V RL=
2kΩ
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-20
0
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FREQUENCY (Hz)
CMRR (dB)
FREQUENCY (Hz)
CMRR (dB)
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0
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10 100 1k 10k 100k 200k
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FREQUENCY (Hz)
CMRR (dB)
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FREQUENCY (Hz)
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FREQUENCY (Hz)
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FREQUENCY (Hz)
CMRR (dB)
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0
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-100
10 100 1k 10k 100k 200k
20
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Typical Characteristics (continued)
Figure 85. Cmrr vs Frequency VCC = 15V, VEE = –15V RL=
600ΩFigure 86. Cmrr vs Frequency VCC = 12V, VEE = –12V RL=
600Ω
Figure 87. Cmrr vs Frequency VCC = 17V, VEE = –17V RL=
600Ω
Figure 88. Cmrr vs Frequency VCC = 2.5V, VEE = –2.5V RL=
600Ω
Figure 89. Cmrr vs Frequency VCC = 15V, VEE = –15V RL=
10kΩFigure 90. Cmrr vs Frequency VCC = 12V, VEE = –12V RL=
10kΩ
500 10k600 800 2k 5k
LOAD RESISTANCE (:)
OUTPUT (Vrms)
11.0
12.0
11.5
12.5
13.0
13.5
10.0
10.5
500 10k600 800 2k 5k
LOAD RESISTANCE (:)
OUTPUT (Vrms)
0.00
0.25
0.50
0.75
1.00
1.25
500 10k600 800 2k 5k
LOAD RESISTANCE (:)
OUTPUT (Vrms)
9.0
10.0
9.5
10.5
11.0
11.5
500 10k600 800 2k 5k
LOAD RESISTANCE (:)
OUTPUT (Vrms)
7.0
8.0
7.5
8.5
9.0
9.5
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100 1k 10k 100k
FREQUENCY (Hz)
CMRR (dB)
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10 200k100 1k 10k 100k
FREQUENCY (Hz)
CMRR (dB)
21
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Typical Characteristics (continued)
Figure 91. Cmrr vs Frequency VCC = 17V, VEE = –17V RL=
10kΩ
Figure 92. Cmrr vs Frequency VCC = 2.5V, VEE = –2.5V RL=
10kΩ
Figure 93. Output Voltage vs Load Resistance VDD = 15V,
VEE = –15v Thd+N = 1% Figure 94. Output Voltage vs Load Resistance VDD = 12V,
VEE = –12v Thd+N = 1%
Figure 95. Output Voltage vs Load Resistance VDD = 17V,
VEE = –17v Thd+N = 1% Figure 96. Output Voltage vs Load Resistance VDD = 2.5V,
VEE = –2.5v Thd+N = 1%
8.0
8.5
9.0
9.5
10.0
10.5
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
8.0
8.5
9.0
9.5
10.0
10.5
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
4
6
8
10
12
14
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
2
0
8.0
8.5
9.0
9.5
10.0
10.5
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
4
6
8
10
12
14
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
2
0
2
4
6
8
10
12
2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
0
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Typical Characteristics (continued)
Figure 97. Output Voltage vs Supply Voltage RL= 2kΩ,
Thd+N = 1% Figure 98. Output Voltage vs Supply Voltage RL= 600Ω,
Thd+N = 1%
Figure 99. Output Voltage vs Supply Voltage RL= 10kΩ,
Thd+N = 1% Figure 100. Supply Current vs Supply Voltage RL= 2kΩ
Figure 101. Supply Current vs Supply Voltage RL= 600ΩFigure 102. Supply Current vs Supply Voltage RL= 10kΩ
1
': 0.00s
@: -1.01 Ps': 0.00V
@: -80.0 mV
M 200 ns A Ch1 2.00 mV
50.40%
Ch1 50.0 mV
1
': 0.00s
@: -1.01 Ps': 0.00V
@: -80.0 mV
M 200 ns A Ch1 2.00 mV
50.40%
Ch1 50.0 mV
100 10000 10000000
100000000
100000
1000
10
FREQUENCY (Hz)
1000000
180
-20
20
80
GAIN (dB), PHASE LAG (o)
140
120
60
40
0
100
160
100 10k 10M 100M100k
1k
10
FREQUENCY (Hz)
1M
2
-18
-14
-8
MAGNITUDE (dB)
-2
-4
-10
-12
-16
-6
0
1
0 dB = 1 VP-P
23
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Typical Characteristics (continued)
Figure 103. Full Power Bandwidth vs Frequency Figure 104. Gain Phase vs Frequency
Figure 105. Small-Signal Transient Response AV= 1, CL=
10pf Figure 106. Small-Signal Transient Response AV= 1, CL=
100pf
Figure 107. RIAA Preamp Voltage Gain,
RIAA Deviation vs Frequency Figure 108. Flat Amp Voltage Gain vs Frequency
Distortion Signal Gain = 1+(R2/R1)
+
-
LME49720
1000:
R1
10:
R2
Analyzer Input
Audio Precision
System Two
Cascade
Generator Output
Actual Distortion = AP Value/100
24
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8 Parameter Measurement Information
All parameters are measured according to the conditions described in the Specifications section.
8.1 Distortion Measurements
The vanishingly low residual distortion produced by LME49720 is below the capabilities of all commercially
available equipment. This makes distortion measurements just slightly more difficult than simply connecting a
distortion meter to the amplifier’s inputs and outputs. The solution, however, is quite simple: an additional
resistor. Adding this resistor extends the resolution of the distortion measurement equipment.
The LME49720’s low residual distortion is an input referred internal error. As shown in Figure 109, adding the
10Ωresistor connected between the amplifier’s inverting and non-inverting inputs changes the amplifier’s noise
gain. The result is that the error signal (distortion) is amplified by a factor of 101. Although the amplifier’s closed-
loop gain is unaltered, the feedback available to correct distortion errors is reduced by 101, which means that
measurement resolution increases by 101. To ensure minimum effects on distortion measurements, keep the
value of R1 low as shown in Figure 109.
This technique is verified by duplicating the measurements with high closed loop gain and/or making the
measurements at high frequencies. Doing so produces distortion components that are within the measurement
equipment’s capabilities. This datasheet’s THD+N and IMD values were generated using the above described
circuit connected to an Audio Precision System Two Cascade.
Figure 109. THD+N and IMD Distortion Test Circuit
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Distortion Measurements (continued)
Complete shielding is required to prevent induced pick up from external sources. Always check with oscilloscope for
power line noise.
Total Gain: 115 dB @F = 1 kHz
Input Referred Noise Voltage: En= V0/560,000 (V)
Figure 110. Noise Measurement Circuit
B
-+
A
- +
7OUTPUT B
8V+
6INVERTING INPUT B
5NON-INVERTING
INPUT B
NON-INVERTING
INPUT A
3
V-4
INVERTING INPUT A 2
OUTPUT A 1
26
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9 Detailed Description
9.1 Overview
The LME49720 audio operational amplifier delivers superior audio signal amplification for outstanding audio
performance.
To ensure that the most challenging loads are driven without compromise, the LME49720 has a high slew rate of
±20V/μs and an output current capability of ±26mA. Further, dynamic range is maximized by an output stage that
drives 2kΩloads to within 1V of either power supply voltage and to within 1.4V when driving 600Ωloads.
The LME49720's outstanding CMRR (120dB), PSRR (120dB), and VOS (0.1mV) give the amplifier excellent
operational amplifier DC performance.
The LME49720 has a wide supply range of ±2.5V to ±17V. Over this supply range the LME49720’s input circuitry
maintains excellent common-mode and power supply rejection, as well as maintaining its low input bias current.
The LME49720 is unity gain stable. This Audio Operational Amplifier achieves outstanding AC performance while
driving complex loads with values as high as 100pF.
The LME49720 is available in 8–lead narrow body SOIC, 8–lead PDIP, and 8–lead TO-99. Demonstration
boards are available for each package.
9.2 Functional Block Diagram
9.3 Feature Description
9.3.1 Capacitive Load
The LME49720 is a high speed op amp with excellent phase margin and stability. Capacitive loads up to 100pF
will cause little change in the phase characteristics of the amplifiers and are therefore allowable.
Capacitive loads greater than 100pF must be isolated from the output. The most straightforward way to do this is
to put a resistor in series with the output. This resistor will also prevent excess power dissipation if the output is
accidentally shorted.
9.3.2 Balance Cable Driver
With high peak-to-peak differential output voltage and plenty of low distortion drive current, the LME49720 makes
an excellent balanced cable driver. Combining the single-to-differential configuration with a balanced cable driver
results in a high performance single-ended input to balanced line driver solution.
Although the LME49720 can drive capacitive loads up to 100pF, cable loads exceeding 100pF can cause
instability. For such applications, series resistors are needed on the outputs before the capacitive load.
27
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9.4 Device Functional Modes
This device does not have operation mode.
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
These typical connection diagrams highlight the required external components and system level connections for
proper operation of the device. Any design variation can be supported by TI through schematic and layout
reviews. Visit e2e.ti.com for design assistance and join the audio amplifier discussion forum for additional
information
10.2 Typical Applications
10.2.1 Single Ended Converter
VO= V1–V2
Figure 111. Balanced To Single Ended Converter
10.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1.
Table 1. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Power Supply ±15
Speaker 2 KΩ
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10.2.1.2 Detailed Design Procedure
10.2.1.2.1 Surface Mount Capacitors
Temperature and applied DC voltage influence the actual capacitance of high-K materials. Table 2 shows the
relationship between the different types of high-K materials and their associated tolerances, temperature
coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to 15% of its
capacitance within its working temperature range.
Select high-K ceramic capacitors according to the following rules:
1. Use capacitors made of materials with temperature coefficients of X5R, X7R, or better.
2. Use capacitors with DC voltage ratings of at least twice the application voltage.
3. Choose a capacitance value at least twice the nominal value calculated for the application.
Multiply the nominal value by a factor of 2 for safety. If a 10-µF capacitor is required, use 20µF.
The preceding rules and recommendations apply to capacitors used in connection with this device. The
LME49720 cannot meet its performance specifications if the rules and recommendations are not followed.
Table 2. Typical Tolerance and Temperature Coefficient of Capacitance by Material
Material COG/NPO X7R X5R
Typical Tolerance ±5% ±10% 80/–20%
Temperature ±30ppm ±15% 22/–82%
Temperature Range, ºC –55/125ºC –55/125ºC –30/85 ºC
10.2.1.3 Application Curves
For application curves, see the figures listed in Table 3.
Table 3. Table of Graphs
DESCRIPTION FIGURE NUMBER
THD+N vs Output Power See Figure 1
THD+N vs Frequency See Figure 13
Crosstalk vs Frequency See Figure 36
PSRR vs Frequency See Figure 58
=
p
o
1
f
2 RC
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10.2.2 Other Applications
AV= 34.5
F = 1 kHz
En= 0.38 μV
A Weighted
Figure 112. Nab Preamp
Figure 113. Nab Preamp Voltage Gain vs
Frequency
VO= V1 + V2 −V3 −V4
Figure 114. Adder/Subtracter
Figure 115. Sine Wave Oscillator
0 BP LP LH
1 1 R2 R2 R2
f ,Q 1 , A QA QA
2 C1R1 2 R0 RG RG
æ ö
= = + + = = =
ç ÷
pè ø
o
if C1 C2 C
2
R1
2 C
R2 2 R1
= =
=
w
= ´
o
if R1 R2 R
2
C1
R
C1
C2
2
= =
=
w
=
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Illustration is f0= 1 kHz
Figure 116. Second Order High Pass Filter
(Butterworth)
Illustration is f0= 1 kHz
Figure 117. Second Order Low Pass Filter
(Butterworth)
Illustration is f0= 1 kHz, Q = 10, ABP = 1
Figure 118. State Variable Filter
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Figure 119. AC/DC Converter
Figure 120. 2 Channel Panning Circuit (Pan Pot)
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Figure 121. Line Driver
Illustration is:
fL= 32 Hz, fLB = 320 Hz
fH=11 kHz, fHB = 1.1 kHz
Figure 122. Tone Control
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Figure 123. RIAA Preamp Behavior
Av= 35 dB
En= 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 124. RIAA Preamp
Illustration is:
V0 = 101(V2 −V1)
Figure 125. Balanced Input Mic Amp
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Figure 126. 10 Band Graphic Equalizer
Table 4. Typical Values for Band Graphic Equalizer
fo (Hz) C1C2R1R2
32 0.12μF 4.7μF 75kΩ500Ω
64 0.056μF 3.3μF 68kΩ510Ω
125 0.033μF 1.5μF 62kΩ510Ω
250 0.015μF 0.82μF 68kΩ470Ω
500 8200pF 0.39μF 62kΩ470Ω
1k 3900pF 0.22μF 68kΩ470Ω
2k 2000pF 0.1μF 68kΩ470Ω
4k 1100pF 0.056μF 62kΩ470Ω
8k 510pF 0.022μF 68kΩ510Ω
16k 330pF 0.012μF 51kΩ510Ω
35
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11 Power Supply Recommendations
The LME49720 is designed to operate a power supply from ±2.5V to ±17V. Therefore, the output voltage range
of the power supply must be within this range. The current capability of upper power must not exceed the
maximum current limit of the power switch.
11.1 Power Supply Decoupling Capacitors
The LME49720 requires adequate power supply decoupling to ensure a low total harmonic distortion (THD).
Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, within 2 mm of the V+ and V-
pins. This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the
line. In addition to the 0.1 µF ceramic capacitor, it is recommended to place a 2.2 µF to 10 µF capacitor on the
V+ and V- pins. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply,
thus helping to prevent any droop in the supply voltage.
Output A
Via to Bottom Ground Plane
Top Layer Ground Plane Top Layer Traces
Pad to Top Layer Ground Plane
Decoupling capacitors
placed as close as
possible to the device
Input Resistors
placed as close as
possible to the device
LME49720
1
2
3
4
8
7
6
5
Via to Power Supply
0.1µF
InputA-
R
R
R
InputA+
R
Output B
InputB-
RR
10µF
InputB+
R
R
Input Resistors
placed as close as
possible to the device
Copyright © 2016, Texas Instruments Incorporated
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12 Layout
12.1 Layout Guidelines
12.1.1 Component Placement
Place all the external components close to the device. Placing the decoupling capacitors as close as possible to
the device is important for low total harmonic distortion (THD). Any resistance or inductance in the trace between
the device and the capacitor can cause a loss in efficiency.
12.2 Layout Example
Figure 127. LME49720SOIC Layout Example
Output A
Via to Bottom Ground Plane
Top Layer Ground Plane Top Layer Traces
Pad to Top Layer Ground Plane
Decoupling capacitors
placed as close as
possible to the device
Input Resistors
placed as close as
possible to the device
LME49720
1
2
3
4
8
7
6
5
Via to Power Supply
0.1µF
InputA-
R
R
R
InputA+
R
Output B
InputB-
RR
10µF
InputB+
R
R
Input Resistors
placed as close as
possible to the device
Copyright © 2016, Texas Instruments Incorporated
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Layout Example (continued)
Figure 128. LME49720PDIP Layout Example
Output A
Via to Bottom Ground Plane
Top Layer Ground Plane Top Layer Traces
Pad to Top Layer Ground Plane
Decoupling capacitors
placed as close as
possible to the device
Input Resistors
placed as close as
possible to the device
Via to Power Supply
0.1µF
InputA-
InputA+
Output B
InputB-
10µF
InputB+
R
R
Input Resistors
placed as close as
possible to the device
LME49720
2
1
3
R
R4
6
7
8
5
R
R
R
R
Copyright © 2016, Texas Instruments Incorporated
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Layout Example (continued)
Figure 129. LME49720TO-99 Layout Example
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13 Device and Documentation Support
13.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 7-Nov-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LME49720MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L49720
MA
LME49720NA/NOPB ACTIVE PDIP P 8 40 Green (RoHS
& no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 85 LME
49720NA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 7-Nov-2017
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LME49720MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LME49720MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2017
Pack Materials-Page 2
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