JFET Transistor
N–Channel
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Gate Voltage VDG 25 Vdc
Reverse Gate–Source Voltage VGS(r) 25 Vdc
Forward Gate Current IG(f) 10 mAdc
Continuous Device Dissipation at or Below
TC = 25°C
Linear Derating Factor
PD200
2.8 mW
mW/°C
Storage Channel Temperature Range Tstg –65 to +150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR–5 Board(1)
TA = 25°C
Derate above 25°C
PD225
1.8
mW
mW/°C
Thermal Resistance, Junction to Ambient RJA 556 °C/W
Junction and Storage Temperature TJ, Tstg –55 to +150 °C
DEVICE MARKING
MMBF5484LT1 = 6B
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Gate–Source Breakdown Voltage
(IG = –1.0 µAdc, VDS = 0) V(BR)GSS –25 — Vdc
Gate Reverse Current
(VGS = –20 Vdc, VDS = 0)
(VGS = –20 Vdc, VDS = 0, TA = 100°C)
IGSS —
—–1.0
–0.2 nAdc
µAdc
Gate Source Cutoff Voltage
(VDS = 15 Vdc, ID = 10 nAdc) VGS(off) –0.3 –3.0 Vdc
ON CHARACTERISTICS
Zero–Gate–Voltage Drain Current
(VDS = 15 Vdc, VGS = 0) IDSS 1.0 5.0 mAdc
SMALL–SIGNAL CHARACTERISTICS
Forward Transfer Admittance
(VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |Yfs| 3000 6000 µmhos
Output Admittance
(VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |yos| — 50 µmhos
1. FR–5 = 1.0 0.75 0.062 in.
Preferred devices are ON Semiconductor recommended choices for future use and best overall value.
ON Semiconductor
Semiconductor Components Industries, LLC, 2001
November, 2001 – Rev. 2 1Publication Order Number:
MMBF5484LT1/D
MMBF5484LT1
ON Semiconductor Preferred Device
12
3
CASE 318–08, STYLE 10
SOT–23 (TO–236AB)
2 SOURCE
3
GATE
1 DRAIN
MMBF5484LT1
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2
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
SMALL–SIGNAL CHARACTERISTICS (Continued)
Input Capacitance
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Ciss — 5.0 pF
Reverse Transfer Capacitance
(VDS = 15 Vdc, VGS = 0, f = 10 MHz) Crss — 1.0 pF
Output Capacitance
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Coss — 2.0 pF
f, FREQUENCY (MHz)
30
10
bis @ IDSS
f, FREQUENCY (MHz)
5.0
Figure 1. Input Admittance (yis) Figure 2. Reverse Transfer Admittance (yrs)
COMMON SOURCE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C)
f, FREQUENCY (MHz)
20
f, FREQUENCY (MHz)
10
Figure 3. Forward Transadmittance (yfs) Figure 4. Output Admittance (yos)
gis, INPUT CONDUCTANCE (mmhos)
20
10
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
20 30 50 70 100 200 300 500 700 1000
bis, INPUT SUSCEPTANCE (mmhos)
gfs, FORWARD TRANSCONDUCTANCE (mmhos)
|bfs|, FORWARD SUSCEPTANCE (mmhos)
grs, REVERSE TRANSADMITTANCE (mmhos)
brs, REVERSE SUSCEPTANCE (mmhos)
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
gos, OUTPUT ADMITTANCE (mhos)
bos, OUTPUT SUSCEPTANCE (mhos)
3.0
0.05
0.07
0.1
0.2
0.3
0.7
0.5
1.0
2.0
10 20 30 50 70 100 200 300 500 700 1000
10 20 30 50 70 100 200 300 500 700 1000 0.01
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10 20 30 50 70 100 200 300 500 700 1000
bis @ 0.25 IDSS
gis @ IDSS
gis @ 0.25 IDSS
brs @ IDSS
0.25 IDSS
grs @ IDSS, 0.25 IDSS
gfs @ IDSS
|bfs| @ IDSS
|bfs| @ 0.25 IDSS
bos @ IDSS and 0.25 IDSS
gos @ IDSS
gos @ 0.25 IDSS
gfs @ 0.25 IDSS
MMBF5484LT1
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3
Figure 5. S11s Figure 6. S12s
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
1.0
0.9
0.8
0.7
0.6
0.4
0.3
0.2
0.1
0.0
1.0
0.9
0.8
0.7
0.6
0.6
0.5
0.4
0.3
0.3
0.4
0.5
0.6
900 900
800
700
600
500
400
300
200
100
800
700
600
500
400
300
200
100
ID = 0.25 IDSS
ID = IDSS
100
200
300
400
600 700
800
900
500
ID = IDSS, 0.25 IDSS
900
500
800
700
600
500
400
300 200
100
ID = 0.25 IDSS
ID = IDSS 100
200
300
400
900
600
700
800
900
800
600
400
300
200
200
100 ID = 0.25 IDSS
ID = IDSS
900
100 500
700
300
400
500
600
700
800
Figure 7. S21s Figure 8. S22s
COMMON SOURCE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
MMBF5484LT1
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4
f, FREQUENCY (MHz)
10
gig @ IDSS
f, FREQUENCY (MHz)
0.5
Figure 9. Input Admittance (yig) Figure 10. Reverse Transfer Admittance (yrg)
COMMON GATE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDG = 15 Vdc, Tchannel = 25°C)
f, FREQUENCY (MHz) f, FREQUENCY (MHz)
Figure 11. Forward Transfer Admittance (yfg) Figure 12. Output Admittance (yog)
gig, INPUT CONDUCTANCE (mmhos)
20
10
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
20 30 50 70 100 200 300 500 700 1000
big, INPUT SUSCEPTANCE (mmhos)
gfg, FORWARD TRANSCONDUCTANCE (mmhos)
bfg, FORWARD SUSCEPTANCE (mmhos)
grg, REVERSE TRANSADMITTANCE (mmhos)
brg, REVERSE SUSCEPTANCE (mmhos)
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
gog, OUTPUT ADMITTANCE (mmhos)
bog, OUTPUT SUSCEPTANCE (mmhos)
0.3
0.01
0.1
0.2
10 20 30 50 70 100 200 300 500 700 1000
10 20 30 50 70 100 200 300 500 700 1000 0.01
0.02
0.03
0.3
10 20 30 50 70 100 200 300 500 700 1000
big @ 0.25 IDSS
big @ IDSS
grg @ 0.25 IDSS
gfg @ IDSS
gfg @ 0.25 IDSS
brg @ 0.25 IDSS
bog @ IDSS, 0.25 IDSS
gog @ IDSS
gog @ 0.25 IDSS
0.2 0.005
0.007
0.02
0.03
0.05
0.07
0.1
0.05
0.07
0.1
0.2
0.5
0.7
1.0
brg @ IDSS
0.25 IDSS
gig @ IDSS, 0.25 IDSS
bfg @ IDSS
MMBF5484LT1
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5
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
0°350°340°330°10°20°30°
180°190°200°210°170°160°150°
320°
310°
300°
290°
280°
270°
260°
250°
240°
230°
220°
40°
50°
60°
70°
80°
90°
100°
110°
120°
130°
140°
Figure 13. S11g Figure 14. S12g
Figure 15. S21g Figure 16. S22g
0.7
0.6
0.5
0.4
0.3
0.04
0.5
0.4
0.3
0.2
1.0
0.9
0.8
0.7
0.6
0.03
0.02
0.01
0.0
0.01
0.02
0.03
0.04
0.1
900
900
800
700
600
500
300
200
100
800
700
600
500
400
300
200
100
ID = 0.25 IDSS
ID = IDSS
100 200 300 400
500
600
700
800
900
900
600
700
800
ID = 0.25 IDSS
ID = IDSS
100
900
100
900
ID = 0.25 IDSS
ID = IDSS
1.5
100 400
500
600 700
800 900
ID = IDSS, 0.25 IDSS
COMMON GATE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
MMBF5484LT1
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6
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
PD = TJ(max) – TA
RθJA
PD = 150°C – 25°C
556°C/W = 225 milliwatts
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined b y T J(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT–23
package, PD can be calculated as follows:
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
•Always preheat the device.
•The delta temperature between the preheat and
soldering should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
MMBF5484LT1
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7
PACKAGE DIMENSIONS
CASE 318–08
ISSUE AF
SOT–23 (TO–236AB)
DJ
K
L
A
C
BS
H
GV
3
12
DIM
A
MIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0140 0.0285 0.35 0.69
L0.0350 0.0401 0.89 1.02
S0.0830 0.1039 2.10 2.64
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
MMBF5484LT1
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without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
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For additional information, please contact your local
Sales Representative.
MMBF5484LT1/D
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