RT9724GQW - Richtek - Product.Network

RT9724

DS9724-02 July 2012 www.richtek.com

Ordering Information

100mΩΩ

ΩΩ

Ω, 2A Slew Rate Controlled Load Switch

General Description

The RT9724 is a cost-effective, low-voltage, single

N-MOSFET high-side Power Switch IC. Low switch-on

resistance (typ. 100mΩ) and low supply current (typ. 50uA)

are realized in this IC. The RT9724 integrates an over-

current protection circuit, a short fold back circuit, a

thermal shutdown circuit and an under-voltage lockout

circuit for overall protection. Besides, a slew rate

controlled function is embedded for turn-on rising time

control. The RT9724 is available in SOT-23-5 and WDFN-

8L 2x2 package.

Features

z100mΩΩ

ΩΩ

Ω (typ.) N-MOSFET Switch

zOperating Range : 2.7V to 5.5V

zReverse Blocking Current

zUnder Voltage Lockout

zThermal Protection with Foldback

zOver Current Protection

zShort Circuit Protection

zSlew Rate Limited Turn-On Time 3ms (5V)

zRoHS Compliant and Halogen Free

Applications

zCellular Phones

zDigital still Camera

zHot swap Supplies

zNotebook Computers

zPersonal Communication Devices

zPersonal Digital Assistants

Marking Information

Pin Configurations

(TOP VIEW)

WDFN-8L 2x2

SOT-23-5

VOUT

VIN

VINEN

GND

9VIN

EN GND VOUT

VIN VIN

RT9724

Package Type

B : SOT-23-5

QW : WDFN-8L 2x2 (W-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

1Y=DNN

1Y= : Product Code

DNN : Date Code

GVW

GV : Product Code

W : Date Code

RT9724GB

RT9724GQW

RT9724

DS9724-02 July 2012www.richtek.com

Function Block Diagram

Functional Pin Description

Pin No.

SOT-23-5 WDFN-8L 2x2

P in Na me P in Fun ctio n

1 3 EN Chip Enable (Active High).

2 4,

9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and

connected to GND for maximum power dissipation.

3 2 VOUT Power-Switch Output.

4, 5 5, 6, 7, 8 VIN Power Input Voltage.

-- 1 NC No Internal Connection.

Gate

Control

Output Voltage

Detection

Oscillator

UVLO

Charge

Pump

Bias

Thermal

Protection

Current

Limiting

VOUT

VIN

GND

Auto Discharge

Typical Application Circuit

VOUTVIN

GND

RT9724

2.7V to 5.5V

Chip Enable

Load

COUT

0.1µF

1µF

CIN

RT9724

DS9724-02 July 2012 www.richtek.com

Electrical Characteristics

(VIN = 5V, CIN = 1μF, COUT = 0.1μF, T A = 25°C, unless otherwise specified)

Recommended Operating Conditions (Note 4)

zSupply Voltage, VIN ------------------------------------------------------------------------------------------------------ 2.7V to 5.5V

z Enable Input Voltage, EN ------------------------------------------------------------------------------------------------ 0V to 5.5V

zJunction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 100°C

zAmbient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C

Absolute Maximum Ratings (Note 1)

zSupply Voltage, VIN ------------------------------------------------------------------------------------------------------ 6V

zEnable Input Voltage, EN ------------------------------------------------------------------------------------------------ −0.3V to 6V

zPower Dissipation, PD @ TA = 25°C

SOT-23-5 -------------------------------------------------------------------------------------------------------------------- 0.458W

WDFN-8L 2x2 -------------------------------------------------------------------------------------------------------------- 0.833W

zPackage Thermal Resistance (Note 2)

SOT-23-5, θJA -------------------------------------------------------------------------------------------------------------- 218.1°C/W

WDFN-8L 2x2, θJA -------------------------------------------------------------------------------------------------------- 120°C/W

zJunction Temperature ----------------------------------------------------------------------------------------------------- 150°C

zLead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C

zESD Susceptibility (Note 3)

HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 4kV

Parameter Symbol Test Conditions Min Typ Max Unit

Operation Voltage VIN 2.7 -- 5 V

Under Voltage Lookout VUVLO V

IN Falling 1.3 1.7 2.1 V

Under Voltage Lockout

Hysteresis ΔVUVLO -- 50 -- mV

Quiescent Current IQ EN = High -- 50 70 μA

Off Supply Current ISHDN EN = Low, VOUT = Open -- -- 1 μA

Off Switch Current ILEAKAGE EN = Low, VOUT = 0 -- -- 1 μA

On-Resistance RDS(ON) V

IN = 3.3V, IOUT = 1.3 A -- 100 120 mΩ

Current Limiting ILIM V

IN = 3.3V, VOUT = 2.3V 1.5 2 2.5 A

Short Circuit Current ISC_FB VOUT = 0V, Measured Prior to

Thermal Shutdown 0.4 0.8 1.5 A

VOUT > 1V -- 130 -- °C

Thermal shutdown Threshold TSD VOUT = 0V -- 100 -- °C

Hysteresis -- 20 -- °C

Logic-Low VIL V

IN = 2.7V to 5.5V -- -- 0.8 V

EN Threshold

Voltage Logic-High VIH V

IN = 2.7V to 5.5V 2 -- -- V

Enable Input Leakage IEN V

EN = 5.5V -- -- 1 μA

RT9724

DS9724-02 July 2012www.richtek.com

Parameter Symbol Test Conditions Min Typ Max Unit

Output Turn-On Delay Time TD_ON V

IN = 5V, RLOAD = 10Ω -- 60 100 μs

Output Turn-On Rise Time TON V

IN = 5V, RLOAD = 10Ω 1 3 -- ms

Output Turn-Off Delay Time TD_OFF V

IN = 5V, RLOAD = 10Ω -- 4 10 μs

Output Pull-Down Resistance

During OFF RDISCHA RGE EN = Low -- 150 -- Ω

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

RT9724

DS9724-02 July 2012 www.richtek.com

Typical Operating Characteristics

Shutdown Current vs. Tem perature

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

-40-20 0 20406080100

Temperature (°C)

Shutdown Current (µA) 1

VIN = 5.5V, VEN = 0V, No Load

Shutdown Current vs. Input Voltage

0.00

0.05

0.10

0.15

0.20

0.25

0.30

2.7 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Shutdown Current (µA) 1

VEN = 0V,No Load

Quiescent Current vs. Temperature

-40 -20 0 20 40 60 80 100

Temperature (°C)

Quiescent Current (µA

)

VIN = VEN = 5.5V, No Load

Quiesce nt Current vs. Input Vo ltage

2.7 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Quiescent Current (µA

)

VEN = 5V, No Load

On Resistance vs. Temperature

100

110

120

130

140

150

-40 -20 0 20 40 60 80 100

Temperature (°C)

On Resistance (mΩ)

VIN = VEN = 5V, IOUT = 1.5A

On Resistance vs. Input Voltage

110

111

112

113

114

115

2.7 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

On Resistance (mΩ)

EN = 5V, IOUT = 1.5A

RT9724

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Current Limit vs. Te mperature

1.5

1.6

1.7

1.8

1.9

-40 -20 0 20 40 60 80 100

Temperature (°C)

Current Limit (A)

VEN = 5V

Short Current vs . Te m p e rature

0.7

0.8

0.9

1.1

1.2

-40-20 0 20406080100

Temperature (°C)

Short Current (A)

VIN = VEN = 5V

Short Current vs. Input Voltage

0.7

0.8

0.9

1.1

1.2

2.7 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Short Current (A)

VEN = 5V

Output Voltage vs. Output Current

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2

Output Current (A)

Output Voltage (V)

VIN = 3.3V

VIN = 5.5V

VEN = 5V

UVLO Threshold vs. Tem perature

1.1

1.3

1.5

1.7

1.9

2.1

-40-20 0 20406080100

Temperature (°C)

UVLO Threshold (V)

Rising

Falling

VEN = 5V

Current Lim it vs. Input Voltage

1.5

1.6

1.7

1.8

1.9

2.7 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5

Input Voltage (V)

Current Limit (A)

VEN = 5V

RT9724

DS9724-02 July 2012 www.richtek.com

Turn-Off Delay Tim e vs. Input Voltage

0.2

0.4

0.6

0.8

1.2

2.7 3.1 3.4 3.7 4 4.3 4.6 5 5.2 5.5

Input Voltage (V)

Turn-Off Delay Time (µs)

VEN = 5V, RLOAD = 10Ω

Power On from EN

VOUT

(2V/Div)

VEN

(5V/Div)

IOUT

(1V/Div)

Time (2.5ms/Div)

VIN = VEN = 5.5V, RLOAD = 3Ω

Power On from VIN

VIN

(2V/Div)

VOUT

(2V/Div)

Time (5ms/Div)

VIN = VEN = 5V, No Load

Turn-On Rising Time vs. Input Voltage

2.5

2.8

3.1

3.4

3.7

2.7 3.1 3.4 3.7 4 4.3 4.6 5 5.2 5.5

Input Voltage (V)

Turn-On Rising Time (ms

)

VEN = 5V, RLOAD = 10Ω

Turn On Rising Time vs. Temperature

3.4

3.8

4.2

4.6

-40 -20 0 20 40 60 80 100

Temperature (°C)

Turn On Rising Time (ms)

VIN = VEN = 5V, RLOAD = 10Ω

Turn Off Dela y Time vs. Tem perature

0.2

0.3

0.4

0.5

0.6

-40-200 20406080100

Temperature (°C)

Turn Off Delay Time (µs)

VEN = 5V, RLOAD = 10Ω

RT9724

DS9724-02 July 2012www.richtek.com

Universal Serial Bus (USB) & Power Distribution

The goal of USB is to enable device from different vendors

to interoperate in an open architecture. USB features

include ease of use for the end user, a wide range of

workloads and applications, robustness, synergy with the

PC industry, and low-cost implementation. Benefits

include self-identifying peripherals, dynamically attachable

and reconfigurable peripherals, multiple connections

(support for concurrent operation of many devices), support

for as many as 127 physical devices, and compatibility

with PC Plug-and-Play architecture.

The Universal Serial Bus connects USB devices with a

USB host: each USB system has one USB host. USB

devices are classified either as hubs, which provide

additional attachment points to the USB, or as functions,

which provide capabilities to the system (for example, a

digital joystick). Hub devices are then classified as either

Bus-Power Hubs or Self-Powered Hubs.

A Bus-Powered Hub draws all of the power to any internal

functions and downstream ports from the USB connector

power pins. The hub may draw up to 500mA from the

upstream device. External ports in a Bus-Powered Hub

can supply up to 100mA per port, with a maximum of four

external ports.

Applications Information

The RT9724 is a single N-MOSFET high-side power

switches with enable input, optimized for self-powered and

bus-powered Universal Serial Bus (USB) applications. The

RT9724 is equipped with a charge pump circuitry to drive

the internal N-MOSFET switch; the switch's low RDS(ON),

100mΩ, meets USB voltage drop requirements.

Input and Output

VIN (input) is the power source connection to the internal

circuitry and the drain of the MOSFET. VOUT (output) is

the source of the MOSFET. In a typical application, current

flows through the switch from VIN to VOUT toward the load.

If VOUT is greater than VIN, current will flow from VOUT to

VIN since the MOSFET is bidirectional when on.

Unlike a normal MOSFET, there is no parasitic body diode

between drain and source of the MOSFET, the RT9724

prevents reverse current flow if VOUT is externally forced

to a higher voltage than VIN when the chip is disabled

(VEN < 0.8V).

Chip Enable Input

The switch will be disabled when the EN pin is in a logic

low condition. During this condition, the internal circuitry

and MOSFET will be turned off, reducing the supply current

to 0.1μA typical. Floating the EN may cause unpredictable

operation. EN should not be allowed to go negative with

respect to GND. The EN pin may be directly tied to VIN to

keep the part on.

Soft Start for Hot Plug-In Applications

In order to eliminate the upstream voltage droop caused

by the large inrush current during hot-plug events, the

“soft-start” feature effectively isolates the power source

from extremely large capacitive loads, satisfying the USB

voltage droop requirements.

Under Voltage Lockout

Under Voltage Lockout (UVLO) prevents the MOSFET

switch from turning on until the input voltage exceeds

approximately 1.75V. If input voltage drops below

approximately 1.7V, UVLO turns off the MOSFET switch.

Under-voltage detection functions only when the switch

is enabled.

Current Limiting and Short-Circuit Protection

The current limit circuitry prevents damage to the MOSFET

switch and the hub downstream port but can deliver load

current up to the current limit threshold of typically 2A.

When a heavy load or short circuit is applied to an enabled

switch, a large transient current may flow until the current

limit circuitry responds. Once this current limit threshold

is exceeded, the device enters constant current mode

until the thermal shutdown occurs or the fault is removed.

Normal MOSFET RT9724

RT9724

DS9724-02 July 2012 www.richtek.com

Supply Filter/Bypa ss Ca pa citor

A 1uF low-ESR ceramic capacitor from VIN to GND, located

at the device is strongly recommended to prevent the input

voltage drooping during hot-plug events. However, higher

capacitor values will further reduce the voltage droop on

the input. Furthermore, without the bypass capacitor, an

output short may cause sufficient ringing on the input (from

source lead inductance) to destroy the internal control

circuitry. The input transient must not exceed 6V of the

absolute maximum supply voltage even for a short duration.

Output Filter Capacitor

A low-ESR 150uF aluminum electrolytic or tantalum

between VOUT and GND is strongly recommended to meet

the 330mV maximum droop requirement in the hub VBUS

(Per USB 2.0, output ports must have a minimum 120μF

of low-ESR bulk capacitance per hub). Standard bypass

methods should be used to minimize inductance and

Self-Powered Hub power for the internal functions and

downstream ports does not come from the USB, although

the USB interface may draw up to 100mA from its

upstream connection, to allow the interface to function

when the remainder of the hub is powered down. The hub

must be able to supply up to 500mA on all of its external

downstream ports. Please refer to Universal Serial

Specification Revision 2.0 for more details on designing

compliant USB hub and host systems.

Over current protection devices such as fuses and PTC

resistors (also called polyfuse or polyswitch) have slow

trip times, high on-resistance, and lack the necessary

circuitry for USB-required fault reporting.

The faster trip time of the RT9724 power distribution allows

designers to design hubs that can operate through faults.

The RT9724 provides low on-resistance and internal fault-

reporting circuitry to meet voltage regulation and fault

notification requirements.

Because the devices are also power switches, the designer

of self-powered hubs has the flexibility to turn off power to

output ports. Unlike a normal MOSFET, the devices have

controlled rise and fall times to provide the needed inrush

current limiting required for the bus-powered hub power

switch.

resistance between the bypass capacitor and the

downstream connector to reduce EMI and decouple voltage

droop caused when downstream cables are hot-insertion

transients. Ferrite beads in series with VBUS, the ground

line and the 0.1μF bypass capacitors at the power

connector pins are recommended for EMI and ESD

protection. The bypass capacitor itself should have a low

dissipation factor to allow decoupling at higher frequencies.

Voltage Drop

The USB specification states a minimum port-output

voltage in two locations on the bus, 4.75V out of a Self-

Powered Hub port and 4.4V out of a Bus-Powered Hub

port. As with the Self-Powered Hub, all resistive voltage

drops for the Bus-Powered Hub must be accounted for to

guarantee voltage regulation (see Figure 7-47 of Universal

Serial Specification Revision 2.0 ).

The following calculation determines VOUT (MIN) for multi-

ple ports (NPORTS) ganged together through one switch (if

using one switch per port, NPORTS is equal to 1) :

VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x RCABLE ) ] −

(0.1A x NPORTS x RSWITCH ) − VPCB

Where

RCONN = Resistance of connector contacts

(two contacts per connector)

RCABLE = Resistance of upstream cable wires

(one 5V and one GND)

RSWITCH = Resistance of power switch

(90mΩ typical for RT9715)

VPCB = PCB voltage drop

The USB specification defines the maximum resistance

per contact (RCONN) of the USB connector to be 30mΩ

and the drop across the PCB and switch to be 100mV.

This basically leaves two variables in the equation: the

resistance of the switch and the resistance of the cable.

If the hub consumes the maximum current (II) of 500mA,

the maximum resistance of the cable is 90mΩ.

RT9724

DS9724-02 July 2012www.richtek.com

The resistance of the switch is defined as follows :

RSWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x

90mΩ) ] − VPCB } ÷( 0.1A x NPORTS )

= (200mV − VPCB ) ÷( 0.1A x NPORTS )

If the voltage drop across the PCB is limited to 100mV,

the maximum resistance for the switch is 250mΩ for four

ports ganged together. The RT9724, with its maximum

100mΩ on-resistance over temperature, can fit the demand

of this requirement.

Thermal Shutdown

Thermal protection limits the power dissipation in the

RT9724. When the operation junction temperature

exceeds 130°C, the OTP circuit starts the thermal

shutdown function and turns the pass element off. The

pass element turn on again after the junction temperature

cools to 80°C. The RT9724 lowers its OTP trip level from

130°C to 100°C when output short circuit occurs (VOUT <

1V) as shown in Figure 1.

Figure 1. Short Circuit Thermal Folded Back Protection

when Output Short Circuit Occurs (Patent)

VOUT Short to GND

VOUT

IOUT

Thermal

Shutdown

OTP Trip Point

130 C

°110 C

100 C

80 C

IC Temperature

Thermal Considerations

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient. The maximum power dissipation can

be calculated by following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the ambient temperature, and θJA is the junction to ambient

thermal resistance.

For recommended operating conditions specification, the

maximum junction temperature is 125°C. The junction to

ambient thermal resistance θJA is layout dependent. For

SOT-23-5 package, the thermal resistance θJA is

218.1°C/W on the standard JEDEC 51-7 four layers

thermal test board. For WDFN-8L 2x2 package, the

thermal resistance θJA is 120°C/W on the standard JEDEC

51-7 four layers thermal test board. The maximum power

dissipation at TA = 25°C can be calculated by following

formula :

PD(MAX) = (125°C − 25°C) / (218.1°C/W) = 0.458W for

SOT-23-5 package

PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for

WDFN-8L 2x2 package

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA. The Figure 2 of derating curves allows the

designer to see the effect of rising ambient temperature

on the maximum power allowed.

Figure 2. Derating Curve of Maximum Power Dissipation

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

0255075100125

Ambient Temperature (°C)

Maximum Power Dissipation (W

)

WDFN-8L 2x2

SOT-23-5

Single Layer PCB

RT9724

DS9724-02 July 2012 www.richtek.com

Layout Consideration

For best performance of the RT9724.The following

guidelines must be followed :

`Input and Output capacitors should be placed close to

the IC and connected to ground plane to reduce noise

coupling.

`The GND shoule be connected to a strong ground plane

for heat sink.

`Keep the main current traces as possible as short and

wide.

VOUT

VIN

GND VIN

GND

COUT

CIN

The input and output capacitor should be

placed as close as possible to the IC.

The main current trace should be

as possible as short and wide.

Figure 4. PCB Layout for WDFN Package

EN GND VOUT

VIN VIN

COUT

CIN

The input and output capacitor should be

placed as close as possible to the IC.

The main current trace should be

as possible as short and wide.

Figure 3. PCB Layout Guide for SOT-23-5 Package

RT9724

DS9724-02 July 2012www.richtek.com

AA1

Dimensions In Millimeters Dimensions In Inches

Symbol Min Max Min Max

A 0.889 1.295 0.035 0.051

A1 0.000 0.152 0.000 0.006

B 1.397 1.803 0.055 0.071

b 0.356 0.559 0.014 0.022

C 2.591 2.997 0.102 0.118

D 2.692 3.099 0.106 0.122

e 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

L 0.300 0.610 0.012 0.024

SOT-23-5 Surface Mount Package

Outline Dimension

RT9724

DS9724-02 July 2012 www.richtek.com

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

W-Type 8L DFN 2x2 Package

Dimensions In Millimeters Dimensions In Inch es

Symbol Min Max Min Max

A 0.700 0.800 0.028 0.031

A1 0.000 0.050 0.000 0.002

A3 0.175 0.250 0.007 0.010

b 0.200 0.300 0.008 0.012

D 1.950 2.050 0.077 0.081

D2 1.000 1.250 0.039 0.049

E 1.950 2.050 0.077 0.081

E2 0.400 0.650 0.016 0.026

e 0.500 0.020

L 0.300 0.400

0.012 0.016

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

DETAIL A

Pin #1 ID and Tie Bar Mark Options

SEE DETAIL A